xref: /openbmc/qemu/include/hw/misc/mchp_pfsoc_ioscb.h (revision edf5ca5dbe8031e7814ea34eb109b8f7d4024ae5)
1 /*
2  * Microchip PolarFire SoC IOSCB module emulation
3  *
4  * Copyright (c) 2020 Wind River Systems, Inc.
5  *
6  * Author:
7  *   Bin Meng <bin.meng@windriver.com>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 or
12  * (at your option) version 3 of the License.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License along
20  * with this program; if not, see <http://www.gnu.org/licenses/>.
21  */
22 
23 #ifndef MCHP_PFSOC_IOSCB_H
24 #define MCHP_PFSOC_IOSCB_H
25 
26 typedef struct MchpPfSoCIoscbState {
27     SysBusDevice parent;
28     MemoryRegion container;
29     MemoryRegion lane01;
30     MemoryRegion lane23;
31     MemoryRegion ctrl;
32     MemoryRegion qspixip;
33     MemoryRegion mailbox;
34     MemoryRegion cfg;
35     MemoryRegion ccc;
36     MemoryRegion pll_mss;
37     MemoryRegion cfm_mss;
38     MemoryRegion pll_ddr;
39     MemoryRegion bc_ddr;
40     MemoryRegion io_calib_ddr;
41     MemoryRegion pll_sgmii;
42     MemoryRegion dll_sgmii;
43     MemoryRegion cfm_sgmii;
44     MemoryRegion bc_sgmii;
45     MemoryRegion io_calib_sgmii;
46     qemu_irq irq;
47 } MchpPfSoCIoscbState;
48 
49 #define TYPE_MCHP_PFSOC_IOSCB "mchp.pfsoc.ioscb"
50 
51 #define MCHP_PFSOC_IOSCB(obj) \
52     OBJECT_CHECK(MchpPfSoCIoscbState, (obj), TYPE_MCHP_PFSOC_IOSCB)
53 
54 #endif /* MCHP_PFSOC_IOSCB_H */
55