1d811d61fSMark Cave-Ayland /* 2d811d61fSMark Cave-Ayland * Definitions for talking to the PMU. The PMU is a microcontroller 3d811d61fSMark Cave-Ayland * which controls battery charging and system power on PowerBook 3400 4d811d61fSMark Cave-Ayland * and 2400 models as well as the RTC and various other things. 5d811d61fSMark Cave-Ayland * 6d811d61fSMark Cave-Ayland * Copyright (C) 1998 Paul Mackerras. 7d811d61fSMark Cave-Ayland * Copyright (C) 2016 Ben Herrenschmidt 8d811d61fSMark Cave-Ayland */ 9d811d61fSMark Cave-Ayland 10d811d61fSMark Cave-Ayland #ifndef PMU_H 11d811d61fSMark Cave-Ayland #define PMU_H 12d811d61fSMark Cave-Ayland 13588c5b0bSBALATON Zoltan #include "hw/input/adb.h" 14ec150c7eSMarkus Armbruster #include "hw/misc/mos6522.h" 15ec150c7eSMarkus Armbruster #include "hw/misc/macio/gpio.h" 16db1015e9SEduardo Habkost #include "qom/object.h" 17ec150c7eSMarkus Armbruster 18d811d61fSMark Cave-Ayland /* 19d811d61fSMark Cave-Ayland * PMU commands 20d811d61fSMark Cave-Ayland */ 21d811d61fSMark Cave-Ayland 22d811d61fSMark Cave-Ayland #define PMU_POWER_CTRL0 0x10 /* control power of some devices */ 23d811d61fSMark Cave-Ayland #define PMU_POWER_CTRL 0x11 /* control power of some devices */ 24d811d61fSMark Cave-Ayland #define PMU_ADB_CMD 0x20 /* send ADB packet */ 25d811d61fSMark Cave-Ayland #define PMU_ADB_POLL_OFF 0x21 /* disable ADB auto-poll */ 26d811d61fSMark Cave-Ayland #define PMU_WRITE_NVRAM 0x33 /* write non-volatile RAM */ 27d811d61fSMark Cave-Ayland #define PMU_READ_NVRAM 0x3b /* read non-volatile RAM */ 28d811d61fSMark Cave-Ayland #define PMU_SET_RTC 0x30 /* set real-time clock */ 29d811d61fSMark Cave-Ayland #define PMU_READ_RTC 0x38 /* read real-time clock */ 30d811d61fSMark Cave-Ayland #define PMU_SET_VOLBUTTON 0x40 /* set volume up/down position */ 31d811d61fSMark Cave-Ayland #define PMU_BACKLIGHT_BRIGHT 0x41 /* set backlight brightness */ 32d811d61fSMark Cave-Ayland #define PMU_GET_VOLBUTTON 0x48 /* get volume up/down position */ 33d811d61fSMark Cave-Ayland #define PMU_PCEJECT 0x4c /* eject PC-card from slot */ 34d811d61fSMark Cave-Ayland #define PMU_BATTERY_STATE 0x6b /* report battery state etc. */ 35d811d61fSMark Cave-Ayland #define PMU_SMART_BATTERY_STATE 0x6f /* report battery state (new way) */ 36d811d61fSMark Cave-Ayland #define PMU_SET_INTR_MASK 0x70 /* set PMU interrupt mask */ 37d811d61fSMark Cave-Ayland #define PMU_INT_ACK 0x78 /* read interrupt bits */ 38d811d61fSMark Cave-Ayland #define PMU_SHUTDOWN 0x7e /* turn power off */ 39d811d61fSMark Cave-Ayland #define PMU_CPU_SPEED 0x7d /* control CPU speed on some models */ 40d811d61fSMark Cave-Ayland #define PMU_SLEEP 0x7f /* put CPU to sleep */ 41d811d61fSMark Cave-Ayland #define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */ 42d811d61fSMark Cave-Ayland #define PMU_I2C_CMD 0x9a /* I2C operations */ 43d811d61fSMark Cave-Ayland #define PMU_RESET 0xd0 /* reset CPU */ 44d811d61fSMark Cave-Ayland #define PMU_GET_BRIGHTBUTTON 0xd9 /* report brightness up/down pos */ 45d811d61fSMark Cave-Ayland #define PMU_GET_COVER 0xdc /* report cover open/closed */ 46d811d61fSMark Cave-Ayland #define PMU_SYSTEM_READY 0xdf /* tell PMU we are awake */ 47d811d61fSMark Cave-Ayland #define PMU_DOWNLOAD_STATUS 0xe2 /* Called by MacOS during boot... */ 48d811d61fSMark Cave-Ayland #define PMU_READ_PMU_RAM 0xe8 /* read the PMU RAM... ??? */ 49d811d61fSMark Cave-Ayland #define PMU_GET_VERSION 0xea /* read the PMU version */ 50d811d61fSMark Cave-Ayland 51d811d61fSMark Cave-Ayland /* Bits to use with the PMU_POWER_CTRL0 command */ 52d811d61fSMark Cave-Ayland #define PMU_POW0_ON 0x80 /* OR this to power ON the device */ 53d811d61fSMark Cave-Ayland #define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 54d811d61fSMark Cave-Ayland #define PMU_POW0_HARD_DRIVE 0x04 /* Hard drive power 55d811d61fSMark Cave-Ayland * (on wallstreet/lombard ?) */ 56d811d61fSMark Cave-Ayland 57d811d61fSMark Cave-Ayland /* Bits to use with the PMU_POWER_CTRL command */ 58d811d61fSMark Cave-Ayland #define PMU_POW_ON 0x80 /* OR this to power ON the device */ 59d811d61fSMark Cave-Ayland #define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 60d811d61fSMark Cave-Ayland #define PMU_POW_BACKLIGHT 0x01 /* backlight power */ 61d811d61fSMark Cave-Ayland #define PMU_POW_CHARGER 0x02 /* battery charger power */ 62d811d61fSMark Cave-Ayland #define PMU_POW_IRLED 0x04 /* IR led power (on wallstreet) */ 63d811d61fSMark Cave-Ayland #define PMU_POW_MEDIABAY 0x08 /* media bay power 64d811d61fSMark Cave-Ayland * (wallstreet/lombard ?) */ 65d811d61fSMark Cave-Ayland 66d811d61fSMark Cave-Ayland /* Bits in PMU interrupt and interrupt mask bytes */ 67d811d61fSMark Cave-Ayland #define PMU_INT_PCEJECT 0x04 /* PC-card eject buttons */ 68d811d61fSMark Cave-Ayland #define PMU_INT_SNDBRT 0x08 /* sound/brightness up/down buttons */ 69d811d61fSMark Cave-Ayland #define PMU_INT_ADB 0x10 /* ADB autopoll or reply data */ 70d811d61fSMark Cave-Ayland #define PMU_INT_BATTERY 0x20 /* Battery state change */ 71d811d61fSMark Cave-Ayland #define PMU_INT_ENVIRONMENT 0x40 /* Environment interrupts */ 72d811d61fSMark Cave-Ayland #define PMU_INT_TICK 0x80 /* 1-second tick interrupt */ 73d811d61fSMark Cave-Ayland 74d811d61fSMark Cave-Ayland /* Other bits in PMU interrupt valid when PMU_INT_ADB is set */ 75d811d61fSMark Cave-Ayland #define PMU_INT_ADB_AUTO 0x04 /* ADB autopoll, when PMU_INT_ADB */ 76d811d61fSMark Cave-Ayland #define PMU_INT_WAITING_CHARGER 0x01 /* ??? */ 77d811d61fSMark Cave-Ayland #define PMU_INT_AUTO_SRQ_POLL 0x02 /* ??? */ 78d811d61fSMark Cave-Ayland 79*a1a62cedSMichael Tokarev /* Bits in the environment message (either obtained via PMU_GET_COVER, 80d811d61fSMark Cave-Ayland * or via PMU_INT_ENVIRONMENT on core99 */ 81d811d61fSMark Cave-Ayland #define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */ 82d811d61fSMark Cave-Ayland 83d811d61fSMark Cave-Ayland /* I2C related definitions */ 84d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_SIMPLE 0 85d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_STDSUB 1 86d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_COMBINED 2 87d811d61fSMark Cave-Ayland 88d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_STATUS 0 89d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_SYSCLK 1 90d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_POWER 2 91d811d61fSMark Cave-Ayland 92d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_OK 0 93d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_DATAREAD 1 94d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_BUSY 0xfe 95d811d61fSMark Cave-Ayland 96d811d61fSMark Cave-Ayland /* Kind of PMU (model) */ 97d811d61fSMark Cave-Ayland enum { 98d811d61fSMark Cave-Ayland PMU_UNKNOWN, 99d811d61fSMark Cave-Ayland PMU_OHARE_BASED, /* 2400, 3400, 3500 (old G3 powerbook) */ 100d811d61fSMark Cave-Ayland PMU_HEATHROW_BASED, /* PowerBook G3 series */ 101d811d61fSMark Cave-Ayland PMU_PADDINGTON_BASED, /* 1999 PowerBook G3 */ 102d811d61fSMark Cave-Ayland PMU_KEYLARGO_BASED, /* Core99 motherboard (PMU99) */ 103d811d61fSMark Cave-Ayland PMU_68K_V1, /* 68K PMU, version 1 */ 104d811d61fSMark Cave-Ayland PMU_68K_V2, /* 68K PMU, version 2 */ 105d811d61fSMark Cave-Ayland }; 106d811d61fSMark Cave-Ayland 107d811d61fSMark Cave-Ayland /* PMU PMU_POWER_EVENTS commands */ 108d811d61fSMark Cave-Ayland enum { 109d811d61fSMark Cave-Ayland PMU_PWR_GET_POWERUP_EVENTS = 0x00, 110d811d61fSMark Cave-Ayland PMU_PWR_SET_POWERUP_EVENTS = 0x01, 111d811d61fSMark Cave-Ayland PMU_PWR_CLR_POWERUP_EVENTS = 0x02, 112d811d61fSMark Cave-Ayland PMU_PWR_GET_WAKEUP_EVENTS = 0x03, 113d811d61fSMark Cave-Ayland PMU_PWR_SET_WAKEUP_EVENTS = 0x04, 114d811d61fSMark Cave-Ayland PMU_PWR_CLR_WAKEUP_EVENTS = 0x05, 115d811d61fSMark Cave-Ayland }; 116d811d61fSMark Cave-Ayland 117d811d61fSMark Cave-Ayland /* Power events wakeup bits */ 118d811d61fSMark Cave-Ayland enum { 119d811d61fSMark Cave-Ayland PMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */ 120d811d61fSMark Cave-Ayland PMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */ 121d811d61fSMark Cave-Ayland PMU_PWR_WAKEUP_AC_CHANGE = 0x04, 122d811d61fSMark Cave-Ayland PMU_PWR_WAKEUP_LID_OPEN = 0x08, 123d811d61fSMark Cave-Ayland PMU_PWR_WAKEUP_RING = 0x10, 124d811d61fSMark Cave-Ayland }; 125d811d61fSMark Cave-Ayland 126d811d61fSMark Cave-Ayland /* 127d811d61fSMark Cave-Ayland * This table indicates for each PMU opcode: 128d811d61fSMark Cave-Ayland * - the number of data bytes to be sent with the command, or -1 129d811d61fSMark Cave-Ayland * if a length byte should be sent, 130d811d61fSMark Cave-Ayland * - the number of response bytes which the PMU will return, or 131d811d61fSMark Cave-Ayland * -1 if it will send a length byte. 132d811d61fSMark Cave-Ayland */ 133d811d61fSMark Cave-Ayland 134d811d61fSMark Cave-Ayland static const int8_t pmu_data_len[256][2] = { 135d811d61fSMark Cave-Ayland /* 0 1 2 3 4 5 6 7 */ 136d811d61fSMark Cave-Ayland {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 137d811d61fSMark Cave-Ayland {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 138d811d61fSMark Cave-Ayland { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 139d811d61fSMark Cave-Ayland { 0, 1},{ 0, 1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, 0}, 140d811d61fSMark Cave-Ayland {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, 141d811d61fSMark Cave-Ayland { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, -1}, 142d811d61fSMark Cave-Ayland { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 143d811d61fSMark Cave-Ayland { 0, 4},{ 0, 20},{ 2, -1},{ 2, 1},{ 3, -1},{-1, -1},{-1, -1},{ 4, 0}, 144d811d61fSMark Cave-Ayland { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 145d811d61fSMark Cave-Ayland { 0, 1},{ 0, 1},{-1, -1},{ 1, 0},{ 1, 0},{-1, -1},{-1, -1},{-1, -1}, 146d811d61fSMark Cave-Ayland { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, 147d811d61fSMark Cave-Ayland { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0, -1},{-1, -1},{-1, -1},{-1, -1}, 148d811d61fSMark Cave-Ayland { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 149d811d61fSMark Cave-Ayland { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0, -1},{ 0, -1},{-1, -1},{-1, -1}, 150d811d61fSMark Cave-Ayland { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 151d811d61fSMark Cave-Ayland { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{ 5, 1},{ 4, 1},{ 4, 1}, 152d811d61fSMark Cave-Ayland { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 153d811d61fSMark Cave-Ayland { 0, 5},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 154d811d61fSMark Cave-Ayland { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 155d811d61fSMark Cave-Ayland { 0, 1},{ 0, 1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 156d811d61fSMark Cave-Ayland { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, 157d811d61fSMark Cave-Ayland { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 158d811d61fSMark Cave-Ayland {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 159d811d61fSMark Cave-Ayland {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 160d811d61fSMark Cave-Ayland {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 161d811d61fSMark Cave-Ayland {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 162d811d61fSMark Cave-Ayland { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 163d811d61fSMark Cave-Ayland { 1, 1},{ 1, 1},{-1, -1},{-1, -1},{ 0, 1},{ 0, -1},{-1, -1},{-1, -1}, 164d811d61fSMark Cave-Ayland {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, 165d811d61fSMark Cave-Ayland { 3, -1},{-1, -1},{ 0, 1},{-1, -1},{ 0, -1},{-1, -1},{-1, -1},{ 0, 0}, 166d811d61fSMark Cave-Ayland {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 167d811d61fSMark Cave-Ayland {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 168d811d61fSMark Cave-Ayland }; 169d811d61fSMark Cave-Ayland 170d811d61fSMark Cave-Ayland /* Command protocol state machine */ 171d811d61fSMark Cave-Ayland typedef enum { 172d811d61fSMark Cave-Ayland pmu_state_idle, /* Waiting for command */ 173d811d61fSMark Cave-Ayland pmu_state_cmd, /* Receiving command */ 174d811d61fSMark Cave-Ayland pmu_state_rsp, /* Responding to command */ 175d811d61fSMark Cave-Ayland } PMUCmdState; 176d811d61fSMark Cave-Ayland 177d811d61fSMark Cave-Ayland /* MOS6522 PMU */ 178db1015e9SEduardo Habkost struct MOS6522PMUState { 179d811d61fSMark Cave-Ayland /*< private >*/ 180d811d61fSMark Cave-Ayland MOS6522State parent_obj; 181db1015e9SEduardo Habkost }; 182d811d61fSMark Cave-Ayland 183d811d61fSMark Cave-Ayland #define TYPE_MOS6522_PMU "mos6522-pmu" 1848063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(MOS6522PMUState, MOS6522_PMU) 185d811d61fSMark Cave-Ayland /** 186d811d61fSMark Cave-Ayland * PMUState: 187d811d61fSMark Cave-Ayland * @last_b: last value of B register 188d811d61fSMark Cave-Ayland */ 189d811d61fSMark Cave-Ayland 190db1015e9SEduardo Habkost struct PMUState { 191d811d61fSMark Cave-Ayland /*< private >*/ 192d811d61fSMark Cave-Ayland SysBusDevice parent_obj; 193d811d61fSMark Cave-Ayland /*< public >*/ 194d811d61fSMark Cave-Ayland 195d811d61fSMark Cave-Ayland MemoryRegion mem; 196d811d61fSMark Cave-Ayland uint64_t frequency; 197d811d61fSMark Cave-Ayland 198d811d61fSMark Cave-Ayland /* PMU state */ 199d811d61fSMark Cave-Ayland MOS6522PMUState mos6522_pmu; 200d811d61fSMark Cave-Ayland 201d811d61fSMark Cave-Ayland /* PMU low level protocol state */ 202d811d61fSMark Cave-Ayland PMUCmdState cmd_state; 203d811d61fSMark Cave-Ayland uint8_t last_b; 204d811d61fSMark Cave-Ayland uint8_t cmd; 205d811d61fSMark Cave-Ayland uint32_t cmdlen; 206d811d61fSMark Cave-Ayland uint32_t rsplen; 207d811d61fSMark Cave-Ayland uint8_t cmd_buf_pos; 208d811d61fSMark Cave-Ayland uint8_t cmd_buf[128]; 209d811d61fSMark Cave-Ayland uint8_t cmd_rsp_pos; 210d811d61fSMark Cave-Ayland uint8_t cmd_rsp_sz; 211d811d61fSMark Cave-Ayland uint8_t cmd_rsp[128]; 212d811d61fSMark Cave-Ayland 213d811d61fSMark Cave-Ayland /* PMU events/interrupts */ 214d811d61fSMark Cave-Ayland uint8_t intbits; 215d811d61fSMark Cave-Ayland uint8_t intmask; 216d811d61fSMark Cave-Ayland 217d811d61fSMark Cave-Ayland /* ADB */ 218d811d61fSMark Cave-Ayland bool has_adb; 219d811d61fSMark Cave-Ayland ADBBusState adb_bus; 220d811d61fSMark Cave-Ayland uint8_t adb_reply_size; 221d811d61fSMark Cave-Ayland uint8_t adb_reply[ADB_MAX_OUT_LEN]; 222d811d61fSMark Cave-Ayland 223d811d61fSMark Cave-Ayland /* RTC */ 224d811d61fSMark Cave-Ayland uint32_t tick_offset; 225d811d61fSMark Cave-Ayland QEMUTimer *one_sec_timer; 226d811d61fSMark Cave-Ayland int64_t one_sec_target; 227d811d61fSMark Cave-Ayland 228d811d61fSMark Cave-Ayland /* GPIO */ 229d811d61fSMark Cave-Ayland MacIOGPIOState *gpio; 230db1015e9SEduardo Habkost }; 231d811d61fSMark Cave-Ayland 232d811d61fSMark Cave-Ayland #define TYPE_VIA_PMU "via-pmu" 2338063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(PMUState, VIA_PMU) 234d811d61fSMark Cave-Ayland 235d811d61fSMark Cave-Ayland #endif /* PMU_H */ 236