1*7092e84dSMark Cave-Ayland /* 2*7092e84dSMark Cave-Ayland * QEMU PowerMac CUDA device support 3*7092e84dSMark Cave-Ayland * 4*7092e84dSMark Cave-Ayland * Copyright (c) 2004-2007 Fabrice Bellard 5*7092e84dSMark Cave-Ayland * Copyright (c) 2007 Jocelyn Mayer 6*7092e84dSMark Cave-Ayland * 7*7092e84dSMark Cave-Ayland * Permission is hereby granted, free of charge, to any person obtaining a copy 8*7092e84dSMark Cave-Ayland * of this software and associated documentation files (the "Software"), to deal 9*7092e84dSMark Cave-Ayland * in the Software without restriction, including without limitation the rights 10*7092e84dSMark Cave-Ayland * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11*7092e84dSMark Cave-Ayland * copies of the Software, and to permit persons to whom the Software is 12*7092e84dSMark Cave-Ayland * furnished to do so, subject to the following conditions: 13*7092e84dSMark Cave-Ayland * 14*7092e84dSMark Cave-Ayland * The above copyright notice and this permission notice shall be included in 15*7092e84dSMark Cave-Ayland * all copies or substantial portions of the Software. 16*7092e84dSMark Cave-Ayland * 17*7092e84dSMark Cave-Ayland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18*7092e84dSMark Cave-Ayland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19*7092e84dSMark Cave-Ayland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20*7092e84dSMark Cave-Ayland * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21*7092e84dSMark Cave-Ayland * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22*7092e84dSMark Cave-Ayland * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23*7092e84dSMark Cave-Ayland * THE SOFTWARE. 24*7092e84dSMark Cave-Ayland */ 25*7092e84dSMark Cave-Ayland 26*7092e84dSMark Cave-Ayland #ifndef CUDA_H 27*7092e84dSMark Cave-Ayland #define CUDA_H 28*7092e84dSMark Cave-Ayland 29*7092e84dSMark Cave-Ayland /* CUDA commands (2nd byte) */ 30*7092e84dSMark Cave-Ayland #define CUDA_WARM_START 0x0 31*7092e84dSMark Cave-Ayland #define CUDA_AUTOPOLL 0x1 32*7092e84dSMark Cave-Ayland #define CUDA_GET_6805_ADDR 0x2 33*7092e84dSMark Cave-Ayland #define CUDA_GET_TIME 0x3 34*7092e84dSMark Cave-Ayland #define CUDA_GET_PRAM 0x7 35*7092e84dSMark Cave-Ayland #define CUDA_SET_6805_ADDR 0x8 36*7092e84dSMark Cave-Ayland #define CUDA_SET_TIME 0x9 37*7092e84dSMark Cave-Ayland #define CUDA_POWERDOWN 0xa 38*7092e84dSMark Cave-Ayland #define CUDA_POWERUP_TIME 0xb 39*7092e84dSMark Cave-Ayland #define CUDA_SET_PRAM 0xc 40*7092e84dSMark Cave-Ayland #define CUDA_MS_RESET 0xd 41*7092e84dSMark Cave-Ayland #define CUDA_SEND_DFAC 0xe 42*7092e84dSMark Cave-Ayland #define CUDA_BATTERY_SWAP_SENSE 0x10 43*7092e84dSMark Cave-Ayland #define CUDA_RESET_SYSTEM 0x11 44*7092e84dSMark Cave-Ayland #define CUDA_SET_IPL 0x12 45*7092e84dSMark Cave-Ayland #define CUDA_FILE_SERVER_FLAG 0x13 46*7092e84dSMark Cave-Ayland #define CUDA_SET_AUTO_RATE 0x14 47*7092e84dSMark Cave-Ayland #define CUDA_GET_AUTO_RATE 0x16 48*7092e84dSMark Cave-Ayland #define CUDA_SET_DEVICE_LIST 0x19 49*7092e84dSMark Cave-Ayland #define CUDA_GET_DEVICE_LIST 0x1a 50*7092e84dSMark Cave-Ayland #define CUDA_SET_ONE_SECOND_MODE 0x1b 51*7092e84dSMark Cave-Ayland #define CUDA_SET_POWER_MESSAGES 0x21 52*7092e84dSMark Cave-Ayland #define CUDA_GET_SET_IIC 0x22 53*7092e84dSMark Cave-Ayland #define CUDA_WAKEUP 0x23 54*7092e84dSMark Cave-Ayland #define CUDA_TIMER_TICKLE 0x24 55*7092e84dSMark Cave-Ayland #define CUDA_COMBINED_FORMAT_IIC 0x25 56*7092e84dSMark Cave-Ayland 57*7092e84dSMark Cave-Ayland /* Cuda */ 58*7092e84dSMark Cave-Ayland #define TYPE_CUDA "cuda" 59*7092e84dSMark Cave-Ayland #define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA) 60*7092e84dSMark Cave-Ayland 61*7092e84dSMark Cave-Ayland typedef struct MOS6522CUDAState MOS6522CUDAState; 62*7092e84dSMark Cave-Ayland 63*7092e84dSMark Cave-Ayland typedef struct CUDAState { 64*7092e84dSMark Cave-Ayland /*< private >*/ 65*7092e84dSMark Cave-Ayland SysBusDevice parent_obj; 66*7092e84dSMark Cave-Ayland /*< public >*/ 67*7092e84dSMark Cave-Ayland MemoryRegion mem; 68*7092e84dSMark Cave-Ayland 69*7092e84dSMark Cave-Ayland ADBBusState adb_bus; 70*7092e84dSMark Cave-Ayland MOS6522CUDAState *mos6522_cuda; 71*7092e84dSMark Cave-Ayland 72*7092e84dSMark Cave-Ayland uint32_t tick_offset; 73*7092e84dSMark Cave-Ayland uint64_t tb_frequency; 74*7092e84dSMark Cave-Ayland 75*7092e84dSMark Cave-Ayland uint8_t last_b; 76*7092e84dSMark Cave-Ayland uint8_t last_acr; 77*7092e84dSMark Cave-Ayland 78*7092e84dSMark Cave-Ayland /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */ 79*7092e84dSMark Cave-Ayland uint64_t sr_delay_ns; 80*7092e84dSMark Cave-Ayland QEMUTimer *sr_delay_timer; 81*7092e84dSMark Cave-Ayland 82*7092e84dSMark Cave-Ayland int data_in_size; 83*7092e84dSMark Cave-Ayland int data_in_index; 84*7092e84dSMark Cave-Ayland int data_out_index; 85*7092e84dSMark Cave-Ayland 86*7092e84dSMark Cave-Ayland qemu_irq irq; 87*7092e84dSMark Cave-Ayland uint16_t adb_poll_mask; 88*7092e84dSMark Cave-Ayland uint8_t autopoll_rate_ms; 89*7092e84dSMark Cave-Ayland uint8_t autopoll; 90*7092e84dSMark Cave-Ayland uint8_t data_in[128]; 91*7092e84dSMark Cave-Ayland uint8_t data_out[16]; 92*7092e84dSMark Cave-Ayland QEMUTimer *adb_poll_timer; 93*7092e84dSMark Cave-Ayland } CUDAState; 94*7092e84dSMark Cave-Ayland 95*7092e84dSMark Cave-Ayland /* MOS6522 CUDA */ 96*7092e84dSMark Cave-Ayland typedef struct MOS6522CUDAState { 97*7092e84dSMark Cave-Ayland /*< private >*/ 98*7092e84dSMark Cave-Ayland MOS6522State parent_obj; 99*7092e84dSMark Cave-Ayland 100*7092e84dSMark Cave-Ayland CUDAState *cuda; 101*7092e84dSMark Cave-Ayland } MOS6522CUDAState; 102*7092e84dSMark Cave-Ayland 103*7092e84dSMark Cave-Ayland #define TYPE_MOS6522_CUDA "mos6522-cuda" 104*7092e84dSMark Cave-Ayland #define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \ 105*7092e84dSMark Cave-Ayland TYPE_MOS6522_CUDA) 106*7092e84dSMark Cave-Ayland 107*7092e84dSMark Cave-Ayland #endif /* CUDA_H */ 108