17092e84dSMark Cave-Ayland /* 27092e84dSMark Cave-Ayland * QEMU PowerMac CUDA device support 37092e84dSMark Cave-Ayland * 47092e84dSMark Cave-Ayland * Copyright (c) 2004-2007 Fabrice Bellard 57092e84dSMark Cave-Ayland * Copyright (c) 2007 Jocelyn Mayer 67092e84dSMark Cave-Ayland * 77092e84dSMark Cave-Ayland * Permission is hereby granted, free of charge, to any person obtaining a copy 87092e84dSMark Cave-Ayland * of this software and associated documentation files (the "Software"), to deal 97092e84dSMark Cave-Ayland * in the Software without restriction, including without limitation the rights 107092e84dSMark Cave-Ayland * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 117092e84dSMark Cave-Ayland * copies of the Software, and to permit persons to whom the Software is 127092e84dSMark Cave-Ayland * furnished to do so, subject to the following conditions: 137092e84dSMark Cave-Ayland * 147092e84dSMark Cave-Ayland * The above copyright notice and this permission notice shall be included in 157092e84dSMark Cave-Ayland * all copies or substantial portions of the Software. 167092e84dSMark Cave-Ayland * 177092e84dSMark Cave-Ayland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 187092e84dSMark Cave-Ayland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 197092e84dSMark Cave-Ayland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 207092e84dSMark Cave-Ayland * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 217092e84dSMark Cave-Ayland * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 227092e84dSMark Cave-Ayland * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 237092e84dSMark Cave-Ayland * THE SOFTWARE. 247092e84dSMark Cave-Ayland */ 257092e84dSMark Cave-Ayland 267092e84dSMark Cave-Ayland #ifndef CUDA_H 277092e84dSMark Cave-Ayland #define CUDA_H 287092e84dSMark Cave-Ayland 297092e84dSMark Cave-Ayland /* CUDA commands (2nd byte) */ 307092e84dSMark Cave-Ayland #define CUDA_WARM_START 0x0 317092e84dSMark Cave-Ayland #define CUDA_AUTOPOLL 0x1 327092e84dSMark Cave-Ayland #define CUDA_GET_6805_ADDR 0x2 337092e84dSMark Cave-Ayland #define CUDA_GET_TIME 0x3 347092e84dSMark Cave-Ayland #define CUDA_GET_PRAM 0x7 357092e84dSMark Cave-Ayland #define CUDA_SET_6805_ADDR 0x8 367092e84dSMark Cave-Ayland #define CUDA_SET_TIME 0x9 377092e84dSMark Cave-Ayland #define CUDA_POWERDOWN 0xa 387092e84dSMark Cave-Ayland #define CUDA_POWERUP_TIME 0xb 397092e84dSMark Cave-Ayland #define CUDA_SET_PRAM 0xc 407092e84dSMark Cave-Ayland #define CUDA_MS_RESET 0xd 417092e84dSMark Cave-Ayland #define CUDA_SEND_DFAC 0xe 427092e84dSMark Cave-Ayland #define CUDA_BATTERY_SWAP_SENSE 0x10 437092e84dSMark Cave-Ayland #define CUDA_RESET_SYSTEM 0x11 447092e84dSMark Cave-Ayland #define CUDA_SET_IPL 0x12 457092e84dSMark Cave-Ayland #define CUDA_FILE_SERVER_FLAG 0x13 467092e84dSMark Cave-Ayland #define CUDA_SET_AUTO_RATE 0x14 477092e84dSMark Cave-Ayland #define CUDA_GET_AUTO_RATE 0x16 487092e84dSMark Cave-Ayland #define CUDA_SET_DEVICE_LIST 0x19 497092e84dSMark Cave-Ayland #define CUDA_GET_DEVICE_LIST 0x1a 507092e84dSMark Cave-Ayland #define CUDA_SET_ONE_SECOND_MODE 0x1b 517092e84dSMark Cave-Ayland #define CUDA_SET_POWER_MESSAGES 0x21 527092e84dSMark Cave-Ayland #define CUDA_GET_SET_IIC 0x22 537092e84dSMark Cave-Ayland #define CUDA_WAKEUP 0x23 547092e84dSMark Cave-Ayland #define CUDA_TIMER_TICKLE 0x24 557092e84dSMark Cave-Ayland #define CUDA_COMBINED_FORMAT_IIC 0x25 567092e84dSMark Cave-Ayland 57*2e3e5c7eSMark Cave-Ayland 58*2e3e5c7eSMark Cave-Ayland /* MOS6522 CUDA */ 59*2e3e5c7eSMark Cave-Ayland typedef struct MOS6522CUDAState { 60*2e3e5c7eSMark Cave-Ayland /*< private >*/ 61*2e3e5c7eSMark Cave-Ayland MOS6522State parent_obj; 62*2e3e5c7eSMark Cave-Ayland } MOS6522CUDAState; 63*2e3e5c7eSMark Cave-Ayland 64*2e3e5c7eSMark Cave-Ayland #define TYPE_MOS6522_CUDA "mos6522-cuda" 65*2e3e5c7eSMark Cave-Ayland #define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \ 66*2e3e5c7eSMark Cave-Ayland TYPE_MOS6522_CUDA) 67*2e3e5c7eSMark Cave-Ayland 687092e84dSMark Cave-Ayland /* Cuda */ 697092e84dSMark Cave-Ayland #define TYPE_CUDA "cuda" 707092e84dSMark Cave-Ayland #define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA) 717092e84dSMark Cave-Ayland 727092e84dSMark Cave-Ayland typedef struct CUDAState { 737092e84dSMark Cave-Ayland /*< private >*/ 747092e84dSMark Cave-Ayland SysBusDevice parent_obj; 757092e84dSMark Cave-Ayland /*< public >*/ 767092e84dSMark Cave-Ayland MemoryRegion mem; 777092e84dSMark Cave-Ayland 787092e84dSMark Cave-Ayland ADBBusState adb_bus; 79*2e3e5c7eSMark Cave-Ayland MOS6522CUDAState mos6522_cuda; 807092e84dSMark Cave-Ayland 817092e84dSMark Cave-Ayland uint32_t tick_offset; 827092e84dSMark Cave-Ayland uint64_t tb_frequency; 837092e84dSMark Cave-Ayland 847092e84dSMark Cave-Ayland uint8_t last_b; 857092e84dSMark Cave-Ayland uint8_t last_acr; 867092e84dSMark Cave-Ayland 877092e84dSMark Cave-Ayland /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */ 887092e84dSMark Cave-Ayland uint64_t sr_delay_ns; 897092e84dSMark Cave-Ayland QEMUTimer *sr_delay_timer; 907092e84dSMark Cave-Ayland 917092e84dSMark Cave-Ayland int data_in_size; 927092e84dSMark Cave-Ayland int data_in_index; 937092e84dSMark Cave-Ayland int data_out_index; 947092e84dSMark Cave-Ayland 957092e84dSMark Cave-Ayland qemu_irq irq; 967092e84dSMark Cave-Ayland uint16_t adb_poll_mask; 977092e84dSMark Cave-Ayland uint8_t autopoll_rate_ms; 987092e84dSMark Cave-Ayland uint8_t autopoll; 997092e84dSMark Cave-Ayland uint8_t data_in[128]; 1007092e84dSMark Cave-Ayland uint8_t data_out[16]; 1017092e84dSMark Cave-Ayland QEMUTimer *adb_poll_timer; 1027092e84dSMark Cave-Ayland } CUDAState; 1037092e84dSMark Cave-Ayland 1047092e84dSMark Cave-Ayland #endif /* CUDA_H */ 105