145f569a1SMark Cave-Ayland /* 245f569a1SMark Cave-Ayland * HP-PARISC Lasi chipset emulation. 345f569a1SMark Cave-Ayland * 445f569a1SMark Cave-Ayland * (C) 2019 by Helge Deller <deller@gmx.de> 545f569a1SMark Cave-Ayland * 645f569a1SMark Cave-Ayland * This work is licensed under the GNU GPL license version 2 or later. 745f569a1SMark Cave-Ayland * 845f569a1SMark Cave-Ayland * Documentation available at: 945f569a1SMark Cave-Ayland * https://parisc.wiki.kernel.org/images-parisc/7/79/Lasi_ers.pdf 1045f569a1SMark Cave-Ayland */ 1145f569a1SMark Cave-Ayland 1245f569a1SMark Cave-Ayland #ifndef LASI_H 1345f569a1SMark Cave-Ayland #define LASI_H 1445f569a1SMark Cave-Ayland 1545f569a1SMark Cave-Ayland #include "exec/address-spaces.h" 1645f569a1SMark Cave-Ayland #include "hw/pci/pci_host.h" 1745f569a1SMark Cave-Ayland #include "hw/boards.h" 1845f569a1SMark Cave-Ayland 1945f569a1SMark Cave-Ayland #define TYPE_LASI_CHIP "lasi-chip" 2045f569a1SMark Cave-Ayland OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP) 2145f569a1SMark Cave-Ayland 2245f569a1SMark Cave-Ayland #define LASI_IRR 0x00 /* RO */ 2345f569a1SMark Cave-Ayland #define LASI_IMR 0x04 2445f569a1SMark Cave-Ayland #define LASI_IPR 0x08 2545f569a1SMark Cave-Ayland #define LASI_ICR 0x0c 2645f569a1SMark Cave-Ayland #define LASI_IAR 0x10 2745f569a1SMark Cave-Ayland 2845f569a1SMark Cave-Ayland #define LASI_LPT 0x02000 29*32d26ea4SHelge Deller #define LASI_AUDIO 0x04000 3045f569a1SMark Cave-Ayland #define LASI_UART 0x05000 3145f569a1SMark Cave-Ayland #define LASI_LAN 0x07000 3245f569a1SMark Cave-Ayland #define LASI_RTC 0x09000 33*32d26ea4SHelge Deller #define LASI_FDC 0x0A000 3445f569a1SMark Cave-Ayland 3545f569a1SMark Cave-Ayland #define LASI_PCR 0x0C000 /* LASI Power Control register */ 3645f569a1SMark Cave-Ayland #define LASI_ERRLOG 0x0C004 /* LASI Error Logging register */ 3745f569a1SMark Cave-Ayland #define LASI_VER 0x0C008 /* LASI Version Control register */ 3845f569a1SMark Cave-Ayland #define LASI_IORESET 0x0C00C /* LASI I/O Reset register */ 3945f569a1SMark Cave-Ayland #define LASI_AMR 0x0C010 /* LASI Arbitration Mask register */ 4045f569a1SMark Cave-Ayland #define LASI_IO_CONF 0x7FFFE /* LASI primary configuration register */ 4145f569a1SMark Cave-Ayland #define LASI_IO_CONF2 0x7FFFF /* LASI secondary configuration register */ 4245f569a1SMark Cave-Ayland 4345f569a1SMark Cave-Ayland #define LASI_BIT(x) (1ul << (x)) 4445f569a1SMark Cave-Ayland #define LASI_IRQ_BITS (LASI_BIT(5) | LASI_BIT(7) | LASI_BIT(8) | LASI_BIT(9) \ 4545f569a1SMark Cave-Ayland | LASI_BIT(13) | LASI_BIT(14) | LASI_BIT(16) | LASI_BIT(17) \ 4645f569a1SMark Cave-Ayland | LASI_BIT(18) | LASI_BIT(19) | LASI_BIT(20) | LASI_BIT(21) \ 4745f569a1SMark Cave-Ayland | LASI_BIT(26)) 4845f569a1SMark Cave-Ayland 4945f569a1SMark Cave-Ayland #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ 5045f569a1SMark Cave-Ayland #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ 5145f569a1SMark Cave-Ayland 5245f569a1SMark Cave-Ayland #define LASI_IRQS 27 5345f569a1SMark Cave-Ayland 5445f569a1SMark Cave-Ayland #define LASI_IRQ_HPA 14 5545f569a1SMark Cave-Ayland #define LASI_IRQ_UART_HPA 5 5645f569a1SMark Cave-Ayland #define LASI_IRQ_LPT_HPA 7 5745f569a1SMark Cave-Ayland #define LASI_IRQ_LAN_HPA 8 5845f569a1SMark Cave-Ayland #define LASI_IRQ_SCSI_HPA 9 5945f569a1SMark Cave-Ayland #define LASI_IRQ_AUDIO_HPA 13 6045f569a1SMark Cave-Ayland #define LASI_IRQ_PS2KBD_HPA 26 6145f569a1SMark Cave-Ayland #define LASI_IRQ_PS2MOU_HPA 26 6245f569a1SMark Cave-Ayland 6345f569a1SMark Cave-Ayland struct LasiState { 6445f569a1SMark Cave-Ayland PCIHostState parent_obj; 6545f569a1SMark Cave-Ayland 6645f569a1SMark Cave-Ayland uint32_t irr; 6745f569a1SMark Cave-Ayland uint32_t imr; 6845f569a1SMark Cave-Ayland uint32_t ipr; 6945f569a1SMark Cave-Ayland uint32_t icr; 7045f569a1SMark Cave-Ayland uint32_t iar; 7145f569a1SMark Cave-Ayland 7245f569a1SMark Cave-Ayland uint32_t errlog; 7345f569a1SMark Cave-Ayland uint32_t amr; 74a6450830SPaolo Bonzini uint32_t rtc_ref; 7545f569a1SMark Cave-Ayland 7645f569a1SMark Cave-Ayland MemoryRegion this_mem; 7745f569a1SMark Cave-Ayland }; 7845f569a1SMark Cave-Ayland 7945f569a1SMark Cave-Ayland #endif 80