1*7e83c9ddSNiek Linnenbank /* 2*7e83c9ddSNiek Linnenbank * Allwinner H3 System Control emulation 3*7e83c9ddSNiek Linnenbank * 4*7e83c9ddSNiek Linnenbank * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com> 5*7e83c9ddSNiek Linnenbank * 6*7e83c9ddSNiek Linnenbank * This program is free software: you can redistribute it and/or modify 7*7e83c9ddSNiek Linnenbank * it under the terms of the GNU General Public License as published by 8*7e83c9ddSNiek Linnenbank * the Free Software Foundation, either version 2 of the License, or 9*7e83c9ddSNiek Linnenbank * (at your option) any later version. 10*7e83c9ddSNiek Linnenbank * 11*7e83c9ddSNiek Linnenbank * This program is distributed in the hope that it will be useful, 12*7e83c9ddSNiek Linnenbank * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*7e83c9ddSNiek Linnenbank * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*7e83c9ddSNiek Linnenbank * GNU General Public License for more details. 15*7e83c9ddSNiek Linnenbank * 16*7e83c9ddSNiek Linnenbank * You should have received a copy of the GNU General Public License 17*7e83c9ddSNiek Linnenbank * along with this program. If not, see <http://www.gnu.org/licenses/>. 18*7e83c9ddSNiek Linnenbank */ 19*7e83c9ddSNiek Linnenbank 20*7e83c9ddSNiek Linnenbank #ifndef HW_MISC_ALLWINNER_H3_SYSCTRL_H 21*7e83c9ddSNiek Linnenbank #define HW_MISC_ALLWINNER_H3_SYSCTRL_H 22*7e83c9ddSNiek Linnenbank 23*7e83c9ddSNiek Linnenbank #include "qom/object.h" 24*7e83c9ddSNiek Linnenbank #include "hw/sysbus.h" 25*7e83c9ddSNiek Linnenbank 26*7e83c9ddSNiek Linnenbank /** 27*7e83c9ddSNiek Linnenbank * @name Constants 28*7e83c9ddSNiek Linnenbank * @{ 29*7e83c9ddSNiek Linnenbank */ 30*7e83c9ddSNiek Linnenbank 31*7e83c9ddSNiek Linnenbank /** Highest register address used by System Control device */ 32*7e83c9ddSNiek Linnenbank #define AW_H3_SYSCTRL_REGS_MAXADDR (0x30) 33*7e83c9ddSNiek Linnenbank 34*7e83c9ddSNiek Linnenbank /** Total number of known registers */ 35*7e83c9ddSNiek Linnenbank #define AW_H3_SYSCTRL_REGS_NUM ((AW_H3_SYSCTRL_REGS_MAXADDR / \ 36*7e83c9ddSNiek Linnenbank sizeof(uint32_t)) + 1) 37*7e83c9ddSNiek Linnenbank 38*7e83c9ddSNiek Linnenbank /** @} */ 39*7e83c9ddSNiek Linnenbank 40*7e83c9ddSNiek Linnenbank /** 41*7e83c9ddSNiek Linnenbank * @name Object model 42*7e83c9ddSNiek Linnenbank * @{ 43*7e83c9ddSNiek Linnenbank */ 44*7e83c9ddSNiek Linnenbank 45*7e83c9ddSNiek Linnenbank #define TYPE_AW_H3_SYSCTRL "allwinner-h3-sysctrl" 46*7e83c9ddSNiek Linnenbank #define AW_H3_SYSCTRL(obj) \ 47*7e83c9ddSNiek Linnenbank OBJECT_CHECK(AwH3SysCtrlState, (obj), TYPE_AW_H3_SYSCTRL) 48*7e83c9ddSNiek Linnenbank 49*7e83c9ddSNiek Linnenbank /** @} */ 50*7e83c9ddSNiek Linnenbank 51*7e83c9ddSNiek Linnenbank /** 52*7e83c9ddSNiek Linnenbank * Allwinner H3 System Control object instance state 53*7e83c9ddSNiek Linnenbank */ 54*7e83c9ddSNiek Linnenbank typedef struct AwH3SysCtrlState { 55*7e83c9ddSNiek Linnenbank /*< private >*/ 56*7e83c9ddSNiek Linnenbank SysBusDevice parent_obj; 57*7e83c9ddSNiek Linnenbank /*< public >*/ 58*7e83c9ddSNiek Linnenbank 59*7e83c9ddSNiek Linnenbank /** Maps I/O registers in physical memory */ 60*7e83c9ddSNiek Linnenbank MemoryRegion iomem; 61*7e83c9ddSNiek Linnenbank 62*7e83c9ddSNiek Linnenbank /** Array of hardware registers */ 63*7e83c9ddSNiek Linnenbank uint32_t regs[AW_H3_SYSCTRL_REGS_NUM]; 64*7e83c9ddSNiek Linnenbank 65*7e83c9ddSNiek Linnenbank } AwH3SysCtrlState; 66*7e83c9ddSNiek Linnenbank 67*7e83c9ddSNiek Linnenbank #endif /* HW_MISC_ALLWINNER_H3_SYSCTRL_H */ 68