xref: /openbmc/qemu/include/hw/ide/pci.h (revision 3d54cbf269d63ff1d500b35b2bcf4565ff8ad485)
1e8ad4d16SEfimov Vasily #ifndef HW_IDE_PCI_H
2e8ad4d16SEfimov Vasily #define HW_IDE_PCI_H
3e8ad4d16SEfimov Vasily 
4*a11f439aSThomas Huth #include "hw/ide/ide-bus.h"
5edf5ca5dSMarkus Armbruster #include "hw/pci/pci_device.h"
6db1015e9SEduardo Habkost #include "qom/object.h"
7e8ad4d16SEfimov Vasily 
8e8ad4d16SEfimov Vasily #define BM_STATUS_DMAING 0x01
9e8ad4d16SEfimov Vasily #define BM_STATUS_ERROR  0x02
10e8ad4d16SEfimov Vasily #define BM_STATUS_INT    0x04
11e8ad4d16SEfimov Vasily 
12e8ad4d16SEfimov Vasily #define BM_CMD_START     0x01
13e8ad4d16SEfimov Vasily #define BM_CMD_READ      0x08
14e8ad4d16SEfimov Vasily 
15e8ad4d16SEfimov Vasily typedef struct BMDMAState {
16e8ad4d16SEfimov Vasily     IDEDMA dma;
17e8ad4d16SEfimov Vasily     uint8_t cmd;
18e8ad4d16SEfimov Vasily     uint8_t status;
19e8ad4d16SEfimov Vasily     uint32_t addr;
20e8ad4d16SEfimov Vasily 
21e8ad4d16SEfimov Vasily     IDEBus *bus;
22e8ad4d16SEfimov Vasily     /* current transfer state */
23e8ad4d16SEfimov Vasily     uint32_t cur_addr;
24e8ad4d16SEfimov Vasily     uint32_t cur_prd_last;
25e8ad4d16SEfimov Vasily     uint32_t cur_prd_addr;
26e8ad4d16SEfimov Vasily     uint32_t cur_prd_len;
27e8ad4d16SEfimov Vasily     BlockCompletionFunc *dma_cb;
28e8ad4d16SEfimov Vasily     MemoryRegion addr_ioport;
29e8ad4d16SEfimov Vasily     MemoryRegion extra_io;
30e8ad4d16SEfimov Vasily     qemu_irq irq;
31e8ad4d16SEfimov Vasily 
32e8ad4d16SEfimov Vasily     /* Bit 0-2 and 7:   BM status register
33e8ad4d16SEfimov Vasily      * Bit 3-6:         bus->error_status */
34e8ad4d16SEfimov Vasily     uint8_t migration_compat_status;
35e8ad4d16SEfimov Vasily     uint8_t migration_retry_unit;
36e8ad4d16SEfimov Vasily     int64_t migration_retry_sector_num;
37e8ad4d16SEfimov Vasily     uint32_t migration_retry_nsector;
38e8ad4d16SEfimov Vasily 
39e8ad4d16SEfimov Vasily     struct PCIIDEState *pci_dev;
40e8ad4d16SEfimov Vasily } BMDMAState;
41e8ad4d16SEfimov Vasily 
42e8ad4d16SEfimov Vasily #define TYPE_PCI_IDE "pci-ide"
438063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(PCIIDEState, PCI_IDE)
44e8ad4d16SEfimov Vasily 
45db1015e9SEduardo Habkost struct PCIIDEState {
46e8ad4d16SEfimov Vasily     /*< private >*/
47e8ad4d16SEfimov Vasily     PCIDevice parent_obj;
48e8ad4d16SEfimov Vasily     /*< public >*/
49e8ad4d16SEfimov Vasily 
50e8ad4d16SEfimov Vasily     IDEBus bus[2];
51e8ad4d16SEfimov Vasily     BMDMAState bmdma[2];
527ae8e6c9SBernhard Beschow     qemu_irq isa_irq[2];
53e8ad4d16SEfimov Vasily     uint32_t secondary; /* used only for cmd646 */
54e8ad4d16SEfimov Vasily     MemoryRegion bmdma_bar;
558ac98d1aSBALATON Zoltan     MemoryRegion cmd_bar[2];
568ac98d1aSBALATON Zoltan     MemoryRegion data_bar[2];
57db1015e9SEduardo Habkost };
58e8ad4d16SEfimov Vasily 
59e8ad4d16SEfimov Vasily void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
60e8ad4d16SEfimov Vasily void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
615fe24213SBernhard Beschow void bmdma_status_writeb(BMDMAState *bm, uint32_t val);
62e8ad4d16SEfimov Vasily extern MemoryRegionOps bmdma_addr_ioport_ops;
63be1765f3SBALATON Zoltan void pci_ide_create_devs(PCIDevice *dev);
64fd6a543dSMark Cave-Ayland void pci_ide_update_mode(PCIIDEState *s);
65e8ad4d16SEfimov Vasily 
66e8ad4d16SEfimov Vasily extern const VMStateDescription vmstate_ide_pci;
67c9ebc75dSBALATON Zoltan extern const MemoryRegionOps pci_ide_cmd_le_ops;
68c9ebc75dSBALATON Zoltan extern const MemoryRegionOps pci_ide_data_le_ops;
69e8ad4d16SEfimov Vasily #endif
70