xref: /openbmc/qemu/include/hw/char/pl011.h (revision ea9cdbcf3a0b8d5497cddf87990f1b39d8f3bb0a)
1f0d1d2c1Sxiaoqiang zhao /*
2f0d1d2c1Sxiaoqiang zhao  * This program is free software; you can redistribute it and/or modify it
3f0d1d2c1Sxiaoqiang zhao  * under the terms and conditions of the GNU General Public License,
4f0d1d2c1Sxiaoqiang zhao  * version 2 or later, as published by the Free Software Foundation.
5f0d1d2c1Sxiaoqiang zhao  *
6f0d1d2c1Sxiaoqiang zhao  * This program is distributed in the hope it will be useful, but WITHOUT
7f0d1d2c1Sxiaoqiang zhao  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8f0d1d2c1Sxiaoqiang zhao  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
9f0d1d2c1Sxiaoqiang zhao  * more details.
10f0d1d2c1Sxiaoqiang zhao  *
11f0d1d2c1Sxiaoqiang zhao  * You should have received a copy of the GNU General Public License along with
12f0d1d2c1Sxiaoqiang zhao  * this program.  If not, see <http://www.gnu.org/licenses/>.
13f0d1d2c1Sxiaoqiang zhao  */
14f0d1d2c1Sxiaoqiang zhao 
15121d0712SMarkus Armbruster #ifndef HW_PL011_H
16121d0712SMarkus Armbruster #define HW_PL011_H
17f0d1d2c1Sxiaoqiang zhao 
18694cf209SPeter Maydell #include "hw/sysbus.h"
19694cf209SPeter Maydell #include "chardev/char-fe.h"
20db1015e9SEduardo Habkost #include "qom/object.h"
21694cf209SPeter Maydell 
22694cf209SPeter Maydell #define TYPE_PL011 "pl011"
238063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
24694cf209SPeter Maydell 
25694cf209SPeter Maydell /* This shares the same struct (and cast macro) as the base pl011 device */
26694cf209SPeter Maydell #define TYPE_PL011_LUMINARY "pl011_luminary"
27694cf209SPeter Maydell 
289d88935cSEvgeny Iakovlev /* Depth of UART FIFO in bytes, when FIFO mode is enabled (else depth == 1) */
299d88935cSEvgeny Iakovlev #define PL011_FIFO_DEPTH 16
309d88935cSEvgeny Iakovlev 
31db1015e9SEduardo Habkost struct PL011State {
32694cf209SPeter Maydell     SysBusDevice parent_obj;
33694cf209SPeter Maydell 
34694cf209SPeter Maydell     MemoryRegion iomem;
35694cf209SPeter Maydell     uint32_t flags;
36694cf209SPeter Maydell     uint32_t lcr;
37694cf209SPeter Maydell     uint32_t rsr;
38694cf209SPeter Maydell     uint32_t cr;
39694cf209SPeter Maydell     uint32_t dmacr;
40694cf209SPeter Maydell     uint32_t int_enabled;
41694cf209SPeter Maydell     uint32_t int_level;
429d88935cSEvgeny Iakovlev     uint32_t read_fifo[PL011_FIFO_DEPTH];
43694cf209SPeter Maydell     uint32_t ilpr;
44694cf209SPeter Maydell     uint32_t ibrd;
45694cf209SPeter Maydell     uint32_t fbrd;
46694cf209SPeter Maydell     uint32_t ifl;
47694cf209SPeter Maydell     int read_pos;
48694cf209SPeter Maydell     int read_count;
49694cf209SPeter Maydell     int read_trigger;
50694cf209SPeter Maydell     CharBackend chr;
51a3c1ca56SPeter Maydell     qemu_irq irq[6];
52aac63e0eSLuc Michel     Clock *clk;
53e6fa978dSGavin Shan     bool migrate_clk;
54694cf209SPeter Maydell     const unsigned char *id;
55db1015e9SEduardo Habkost };
56694cf209SPeter Maydell 
57*11f2ee1dSPhilippe Mathieu-Daudé DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr);
58f0d1d2c1Sxiaoqiang zhao 
59f0d1d2c1Sxiaoqiang zhao #endif
60