xref: /openbmc/qemu/include/hw/arm/virt.h (revision ec08d9a51e6af3cd3edbdbf2ca6e97a1e2b5f0d1)
1afe0b380SShannon Zhao /*
2afe0b380SShannon Zhao  *
3afe0b380SShannon Zhao  * Copyright (c) 2015 Linaro Limited
4afe0b380SShannon Zhao  *
5afe0b380SShannon Zhao  * This program is free software; you can redistribute it and/or modify it
6afe0b380SShannon Zhao  * under the terms and conditions of the GNU General Public License,
7afe0b380SShannon Zhao  * version 2 or later, as published by the Free Software Foundation.
8afe0b380SShannon Zhao  *
9afe0b380SShannon Zhao  * This program is distributed in the hope it will be useful, but WITHOUT
10afe0b380SShannon Zhao  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11afe0b380SShannon Zhao  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12afe0b380SShannon Zhao  * more details.
13afe0b380SShannon Zhao  *
14afe0b380SShannon Zhao  * You should have received a copy of the GNU General Public License along with
15afe0b380SShannon Zhao  * this program.  If not, see <http://www.gnu.org/licenses/>.
16afe0b380SShannon Zhao  *
17afe0b380SShannon Zhao  * Emulate a virtual board which works by passing Linux all the information
18afe0b380SShannon Zhao  * it needs about what devices are present via the device tree.
19afe0b380SShannon Zhao  * There are some restrictions about what we can do here:
20afe0b380SShannon Zhao  *  + we can only present devices whose Linux drivers will work based
21afe0b380SShannon Zhao  *    purely on the device tree with no platform data at all
22afe0b380SShannon Zhao  *  + we want to present a very stripped-down minimalist platform,
23afe0b380SShannon Zhao  *    both because this reduces the security attack surface from the guest
24afe0b380SShannon Zhao  *    and also because it reduces our exposure to being broken when
25afe0b380SShannon Zhao  *    the kernel updates its device tree bindings and requires further
26afe0b380SShannon Zhao  *    information in a device binding that we aren't providing.
27afe0b380SShannon Zhao  * This is essentially the same approach kvmtool uses.
28afe0b380SShannon Zhao  */
29afe0b380SShannon Zhao 
30afe0b380SShannon Zhao #ifndef QEMU_ARM_VIRT_H
31afe0b380SShannon Zhao #define QEMU_ARM_VIRT_H
32afe0b380SShannon Zhao 
3333c11879SPaolo Bonzini #include "exec/hwaddr.h"
34d05fdab4SAndrew Jones #include "qemu/notify.h"
35a72d4363SAndrew Jones #include "hw/boards.h"
3612ec8bd5SPeter Maydell #include "hw/arm/boot.h"
372419ce83SLeif Lindholm #include "hw/arm/bsa.h"
38e0561e60SMarkus Armbruster #include "hw/block/flash.h"
39f90747c4SEric Auger #include "sysemu/kvm.h"
40f90747c4SEric Auger #include "hw/intc/arm_gicv3_common.h"
41db1015e9SEduardo Habkost #include "qom/object.h"
42afe0b380SShannon Zhao 
43bd204e63SChristoffer Dall #define NUM_GICV2M_SPIS       64
44afe0b380SShannon Zhao #define NUM_VIRTIO_TRANSPORTS 32
45584105eaSPrem Mallappa #define NUM_SMMU_IRQS          4
46afe0b380SShannon Zhao 
4768970d1eSAndrew Jones /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
4868970d1eSAndrew Jones #define PVTIME_SIZE_PER_CPU 64
4968970d1eSAndrew Jones 
50ed5031adSMauro Carvalho Chehab /* GPIO pins */
51ed5031adSMauro Carvalho Chehab #define GPIO_PIN_POWER_BUTTON  3
52ed5031adSMauro Carvalho Chehab 
53afe0b380SShannon Zhao enum {
54afe0b380SShannon Zhao     VIRT_FLASH,
55afe0b380SShannon Zhao     VIRT_MEM,
56afe0b380SShannon Zhao     VIRT_CPUPERIPHS,
57afe0b380SShannon Zhao     VIRT_GIC_DIST,
58afe0b380SShannon Zhao     VIRT_GIC_CPU,
59b92ad394SPavel Fedin     VIRT_GIC_V2M,
6055ef3233SLuc Michel     VIRT_GIC_HYP,
6155ef3233SLuc Michel     VIRT_GIC_VCPU,
62b92ad394SPavel Fedin     VIRT_GIC_ITS,
63b92ad394SPavel Fedin     VIRT_GIC_REDIST,
64584105eaSPrem Mallappa     VIRT_SMMU,
65fe22cba9SPeter Maydell     VIRT_UART0,
66afe0b380SShannon Zhao     VIRT_MMIO,
67afe0b380SShannon Zhao     VIRT_RTC,
68afe0b380SShannon Zhao     VIRT_FW_CFG,
69afe0b380SShannon Zhao     VIRT_PCIE,
706a1f001bSShannon Zhao     VIRT_PCIE_MMIO,
716a1f001bSShannon Zhao     VIRT_PCIE_PIO,
726a1f001bSShannon Zhao     VIRT_PCIE_ECAM,
735f7a5a0eSEric Auger     VIRT_PLATFORM_BUS,
74b0a3721eSShannon Zhao     VIRT_GPIO,
75fe22cba9SPeter Maydell     VIRT_UART1,
7683ec1923SPeter Maydell     VIRT_SECURE_MEM,
77daa726d9SMaxim Uvarov     VIRT_SECURE_GPIO,
78cff51ac9SShameer Kolothum     VIRT_PCDIMM_ACPI,
79cff51ac9SShameer Kolothum     VIRT_ACPI_GED,
80b5a60beeSKwangwoo Lee     VIRT_NVDIMM_ACPI,
8168970d1eSAndrew Jones     VIRT_PVTIME,
82350a9c9eSEric Auger     VIRT_LOWMEMMAP_LAST,
83350a9c9eSEric Auger };
84350a9c9eSEric Auger 
85350a9c9eSEric Auger /* indices of IO regions located after the RAM */
86350a9c9eSEric Auger enum {
87350a9c9eSEric Auger     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
88350a9c9eSEric Auger     VIRT_HIGH_PCIE_ECAM,
89350a9c9eSEric Auger     VIRT_HIGH_PCIE_MMIO,
90afe0b380SShannon Zhao };
91afe0b380SShannon Zhao 
92584105eaSPrem Mallappa typedef enum VirtIOMMUType {
93584105eaSPrem Mallappa     VIRT_IOMMU_NONE,
94584105eaSPrem Mallappa     VIRT_IOMMU_SMMUV3,
95584105eaSPrem Mallappa     VIRT_IOMMU_VIRTIO,
96584105eaSPrem Mallappa } VirtIOMMUType;
97584105eaSPrem Mallappa 
981b6f99d8SEric Auger typedef enum VirtMSIControllerType {
991b6f99d8SEric Auger     VIRT_MSI_CTRL_NONE,
1001b6f99d8SEric Auger     VIRT_MSI_CTRL_GICV2M,
1011b6f99d8SEric Auger     VIRT_MSI_CTRL_ITS,
1021b6f99d8SEric Auger } VirtMSIControllerType;
1031b6f99d8SEric Auger 
104d04460e5SEric Auger typedef enum VirtGICType {
105a3495d11SAlexander Graf     VIRT_GIC_VERSION_MAX = 0,
106a3495d11SAlexander Graf     VIRT_GIC_VERSION_HOST = 1,
107a3495d11SAlexander Graf     /* The concrete GIC values have to match the GIC version number */
108a3495d11SAlexander Graf     VIRT_GIC_VERSION_2 = 2,
109a3495d11SAlexander Graf     VIRT_GIC_VERSION_3 = 3,
110a3495d11SAlexander Graf     VIRT_GIC_VERSION_4 = 4,
11136bf4ec8SEric Auger     VIRT_GIC_VERSION_NOSEL,
112d04460e5SEric Auger } VirtGICType;
113d04460e5SEric Auger 
114a3495d11SAlexander Graf #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
115a3495d11SAlexander Graf #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
116a3495d11SAlexander Graf #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
117a3495d11SAlexander Graf 
118db1015e9SEduardo Habkost struct VirtMachineClass {
119a72d4363SAndrew Jones     MachineClass parent;
120a72d4363SAndrew Jones     bool disallow_affinity_adjustment;
121a72d4363SAndrew Jones     bool no_its;
1220e5c1c9aSShashi Mallela     bool no_tcg_its;
123a72d4363SAndrew Jones     bool no_pmu;
124a72d4363SAndrew Jones     bool claim_edge_triggered_timers;
125dfadc3bfSWei Huang     bool smbios_old_sys_ver;
126f40408a9SGavin Shan     bool no_highmem_compact;
12717ec075aSEric Auger     bool no_highmem_ecam;
12831511b6fSYanan Wang     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
129dea101a1SAndrew Jones     bool kvm_no_adjvtime;
13068970d1eSAndrew Jones     bool no_kvm_steal_time;
1312c1fb4d5SAndrew Jones     bool acpi_expose_flash;
132daa726d9SMaxim Uvarov     bool no_secure_gpio;
13331511b6fSYanan Wang     /* Machines < 6.2 have no support for describing cpu topology to guest */
13431511b6fSYanan Wang     bool no_cpu_topology;
13509428204SRichard Henderson     bool no_tcg_lpa2;
1361ec896feSPeter Maydell     bool no_ns_el2_virt_timer_irq;
137*8a934f1cSPeter Maydell     bool no_nested_smmu;
138db1015e9SEduardo Habkost };
139a72d4363SAndrew Jones 
140db1015e9SEduardo Habkost struct VirtMachineState {
141a72d4363SAndrew Jones     MachineState parent;
142a72d4363SAndrew Jones     Notifier machine_done;
143a3fc8396SIgor Mammedov     DeviceState *platform_bus_dev;
144af1f60a4SAndrew Jones     FWCfgState *fw_cfg;
145e0561e60SMarkus Armbruster     PFlashCFI01 *flash[2];
146a72d4363SAndrew Jones     bool secure;
147a72d4363SAndrew Jones     bool highmem;
1484a4ff9edSGavin Shan     bool highmem_compact;
149601d626dSEric Auger     bool highmem_ecam;
150c8f008c4SMarc Zyngier     bool highmem_mmio;
151a63618b1SMarc Zyngier     bool highmem_redists;
152ccc11b02SEric Auger     bool its;
1530e5c1c9aSShashi Mallela     bool tcg_its;
154f29cacfbSPeter Maydell     bool virt;
1552afa8c85SDongjiu Geng     bool ras;
1566f4e1405SRichard Henderson     bool mte;
1575242876fSJason A. Donenfeld     bool dtb_randomness;
158e7100972SPeter Maydell     bool second_ns_uart_present;
15917e89077SGerd Hoffmann     OnOffAuto acpi;
160d04460e5SEric Auger     VirtGICType gic_version;
161584105eaSPrem Mallappa     VirtIOMMUType iommu;
1626d7a8548SXingang Wang     bool default_bus_bypass_iommu;
1631b6f99d8SEric Auger     VirtMSIControllerType msi_controller;
16470e89132SEric Auger     uint16_t virtio_iommu_bdf;
165a72d4363SAndrew Jones     struct arm_boot_info bootinfo;
166350a9c9eSEric Auger     MemMapEntry *memmap;
16770e89132SEric Auger     char *pciehb_nodename;
168a72d4363SAndrew Jones     const int *irqmap;
169a72d4363SAndrew Jones     int fdt_size;
170a72d4363SAndrew Jones     uint32_t clock_phandle;
171a72d4363SAndrew Jones     uint32_t gic_phandle;
172a72d4363SAndrew Jones     uint32_t msi_phandle;
173584105eaSPrem Mallappa     uint32_t iommu_phandle;
1742013c566SPeter Maydell     int psci_conduit;
175957e32cfSEric Auger     hwaddr highest_gpa;
176b8b69f4cSPhilippe Mathieu-Daudé     DeviceState *gic;
177cff51ac9SShameer Kolothum     DeviceState *acpi_dev;
178c345680cSShameer Kolothum     Notifier powerdown_notifier;
17909fad167SJiahui Cen     PCIBus *bus;
180602b4582SMarian Postevca     char *oem_id;
181602b4582SMarian Postevca     char *oem_table_id;
1821ec896feSPeter Maydell     bool ns_el2_virt_timer_irq;
183db1015e9SEduardo Habkost };
184a72d4363SAndrew Jones 
185bf424a12SEric Auger #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
186601d626dSEric Auger 
187a72d4363SAndrew Jones #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
188a489d195SEduardo Habkost OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
189a72d4363SAndrew Jones 
190e9a8e474SAndrew Jones void virt_acpi_setup(VirtMachineState *vms);
19117e89077SGerd Hoffmann bool virt_is_acpi_enabled(VirtMachineState *vms);
192d05fdab4SAndrew Jones 
193f31985a7SPeter Maydell /* Return number of redistributors that fit in the specified region */
virt_redist_capacity(VirtMachineState * vms,int region)194f31985a7SPeter Maydell static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
195f31985a7SPeter Maydell {
1967cf3f8d2SPeter Maydell     uint32_t redist_size;
1977cf3f8d2SPeter Maydell 
1987cf3f8d2SPeter Maydell     if (vms->gic_version == VIRT_GIC_VERSION_3) {
1997cf3f8d2SPeter Maydell         redist_size = GICV3_REDIST_SIZE;
2007cf3f8d2SPeter Maydell     } else {
2017cf3f8d2SPeter Maydell         redist_size = GICV4_REDIST_SIZE;
2027cf3f8d2SPeter Maydell     }
2037cf3f8d2SPeter Maydell     return vms->memmap[region].size / redist_size;
204f31985a7SPeter Maydell }
205f31985a7SPeter Maydell 
206f90747c4SEric Auger /* Return the number of used redistributor regions  */
virt_gicv3_redist_region_count(VirtMachineState * vms)207f90747c4SEric Auger static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
208f90747c4SEric Auger {
209f31985a7SPeter Maydell     uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
210f90747c4SEric Auger 
2117cf3f8d2SPeter Maydell     assert(vms->gic_version != VIRT_GIC_VERSION_2);
212f90747c4SEric Auger 
213a63618b1SMarc Zyngier     return (MACHINE(vms)->smp.cpus > redist0_capacity &&
214a63618b1SMarc Zyngier             vms->highmem_redists) ? 2 : 1;
215f90747c4SEric Auger }
216f90747c4SEric Auger 
217d05fdab4SAndrew Jones #endif /* QEMU_ARM_VIRT_H */
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