1 /* 2 * Nuvoton NPCM7xx SoC family. 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * for more details. 15 */ 16 #ifndef NPCM7XX_H 17 #define NPCM7XX_H 18 19 #include "hw/boards.h" 20 #include "hw/adc/npcm7xx_adc.h" 21 #include "hw/cpu/a9mpcore.h" 22 #include "hw/gpio/npcm7xx_gpio.h" 23 #include "hw/i2c/npcm7xx_smbus.h" 24 #include "hw/mem/npcm7xx_mc.h" 25 #include "hw/misc/npcm7xx_clk.h" 26 #include "hw/misc/npcm7xx_gcr.h" 27 #include "hw/misc/npcm7xx_mft.h" 28 #include "hw/misc/npcm7xx_pwm.h" 29 #include "hw/misc/npcm7xx_rng.h" 30 #include "hw/net/npcm7xx_emc.h" 31 #include "hw/nvram/npcm7xx_otp.h" 32 #include "hw/timer/npcm7xx_timer.h" 33 #include "hw/ssi/npcm7xx_fiu.h" 34 #include "hw/usb/hcd-ehci.h" 35 #include "hw/usb/hcd-ohci.h" 36 #include "target/arm/cpu.h" 37 38 #define NPCM7XX_MAX_NUM_CPUS (2) 39 40 /* The first half of the address space is reserved for DDR4 DRAM. */ 41 #define NPCM7XX_DRAM_BA (0x00000000) 42 #define NPCM7XX_DRAM_SZ (2 * GiB) 43 44 /* Magic addresses for setting up direct kernel booting and SMP boot stubs. */ 45 #define NPCM7XX_LOADER_START (0x00000000) /* Start of SDRAM */ 46 #define NPCM7XX_SMP_LOADER_START (0xffff0000) /* Boot ROM */ 47 #define NPCM7XX_SMP_BOOTREG_ADDR (0xf080013c) /* GCR.SCRPAD */ 48 #define NPCM7XX_GIC_CPU_IF_ADDR (0xf03fe100) /* GIC within A9 */ 49 #define NPCM7XX_BOARD_SETUP_ADDR (0xffff1000) /* Boot ROM */ 50 51 typedef struct NPCM7xxMachine { 52 MachineState parent; 53 } NPCM7xxMachine; 54 55 #define TYPE_NPCM7XX_MACHINE MACHINE_TYPE_NAME("npcm7xx") 56 #define NPCM7XX_MACHINE(obj) \ 57 OBJECT_CHECK(NPCM7xxMachine, (obj), TYPE_NPCM7XX_MACHINE) 58 59 typedef struct NPCM7xxMachineClass { 60 MachineClass parent; 61 62 const char *soc_type; 63 } NPCM7xxMachineClass; 64 65 #define NPCM7XX_MACHINE_CLASS(klass) \ 66 OBJECT_CLASS_CHECK(NPCM7xxMachineClass, (klass), TYPE_NPCM7XX_MACHINE) 67 #define NPCM7XX_MACHINE_GET_CLASS(obj) \ 68 OBJECT_GET_CLASS(NPCM7xxMachineClass, (obj), TYPE_NPCM7XX_MACHINE) 69 70 typedef struct NPCM7xxState { 71 DeviceState parent; 72 73 ARMCPU cpu[NPCM7XX_MAX_NUM_CPUS]; 74 A9MPPrivState a9mpcore; 75 76 MemoryRegion sram; 77 MemoryRegion irom; 78 MemoryRegion ram3; 79 MemoryRegion *dram; 80 81 NPCM7xxGCRState gcr; 82 NPCM7xxCLKState clk; 83 NPCM7xxTimerCtrlState tim[3]; 84 NPCM7xxADCState adc; 85 NPCM7xxPWMState pwm[2]; 86 NPCM7xxMFTState mft[8]; 87 NPCM7xxOTPState key_storage; 88 NPCM7xxOTPState fuse_array; 89 NPCM7xxMCState mc; 90 NPCM7xxRNGState rng; 91 NPCM7xxGPIOState gpio[8]; 92 NPCM7xxSMBusState smbus[16]; 93 EHCISysBusState ehci; 94 OHCISysBusState ohci; 95 NPCM7xxFIUState fiu[2]; 96 NPCM7xxEMCState emc[2]; 97 } NPCM7xxState; 98 99 #define TYPE_NPCM7XX "npcm7xx" 100 #define NPCM7XX(obj) OBJECT_CHECK(NPCM7xxState, (obj), TYPE_NPCM7XX) 101 102 #define TYPE_NPCM730 "npcm730" 103 #define TYPE_NPCM750 "npcm750" 104 105 typedef struct NPCM7xxClass { 106 DeviceClass parent; 107 108 /* Bitmask of modules that are permanently disabled on this chip. */ 109 uint32_t disabled_modules; 110 /* Number of CPU cores enabled in this SoC class (may be 1 or 2). */ 111 uint32_t num_cpus; 112 } NPCM7xxClass; 113 114 #define NPCM7XX_CLASS(klass) \ 115 OBJECT_CLASS_CHECK(NPCM7xxClass, (klass), TYPE_NPCM7XX) 116 #define NPCM7XX_GET_CLASS(obj) \ 117 OBJECT_GET_CLASS(NPCM7xxClass, (obj), TYPE_NPCM7XX) 118 119 /** 120 * npcm7xx_load_kernel - Loads memory with everything needed to boot 121 * @machine - The machine containing the SoC to be booted. 122 * @soc - The SoC containing the CPU to be booted. 123 * 124 * This will set up the ARM boot info structure for the specific NPCM7xx 125 * derivative and call arm_load_kernel() to set up loading of the kernel, etc. 126 * into memory, if requested by the user. 127 */ 128 void npcm7xx_load_kernel(MachineState *machine, NPCM7xxState *soc); 129 130 #endif /* NPCM7XX_H */ 131