xref: /openbmc/qemu/include/hw/adc/npcm7xx_adc.h (revision 886fb67020e32ce6a2cf7049c6f017acf1f0d69a)
177c05b0bSHao Wu /*
277c05b0bSHao Wu  * Nuvoton NPCM7xx ADC Module
377c05b0bSHao Wu  *
477c05b0bSHao Wu  * Copyright 2020 Google LLC
577c05b0bSHao Wu  *
677c05b0bSHao Wu  * This program is free software; you can redistribute it and/or modify it
777c05b0bSHao Wu  * under the terms of the GNU General Public License as published by the
877c05b0bSHao Wu  * Free Software Foundation; either version 2 of the License, or
977c05b0bSHao Wu  * (at your option) any later version.
1077c05b0bSHao Wu  *
1177c05b0bSHao Wu  * This program is distributed in the hope that it will be useful, but WITHOUT
1277c05b0bSHao Wu  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1377c05b0bSHao Wu  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1477c05b0bSHao Wu  * for more details.
1577c05b0bSHao Wu  */
1677c05b0bSHao Wu #ifndef NPCM7XX_ADC_H
1777c05b0bSHao Wu #define NPCM7XX_ADC_H
1877c05b0bSHao Wu 
1977c05b0bSHao Wu #include "hw/clock.h"
2077c05b0bSHao Wu #include "hw/irq.h"
2177c05b0bSHao Wu #include "hw/sysbus.h"
2277c05b0bSHao Wu #include "qemu/timer.h"
2377c05b0bSHao Wu 
2477c05b0bSHao Wu #define NPCM7XX_ADC_NUM_INPUTS      8
2577c05b0bSHao Wu /**
2677c05b0bSHao Wu  * This value should not be changed unless write_adc_calibration function in
2777c05b0bSHao Wu  * hw/arm/npcm7xx.c is also changed.
2877c05b0bSHao Wu  */
2977c05b0bSHao Wu #define NPCM7XX_ADC_NUM_CALIB       2
3077c05b0bSHao Wu 
3177c05b0bSHao Wu /**
3277c05b0bSHao Wu  * struct NPCM7xxADCState - Analog to Digital Converter Module device state.
3377c05b0bSHao Wu  * @parent: System bus device.
3477c05b0bSHao Wu  * @iomem: Memory region through which registers are accessed.
3577c05b0bSHao Wu  * @conv_timer: The timer counts down remaining cycles for the conversion.
3677c05b0bSHao Wu  * @irq: GIC interrupt line to fire on expiration (if enabled).
3777c05b0bSHao Wu  * @con: The Control Register.
3877c05b0bSHao Wu  * @data: The Data Buffer.
3977c05b0bSHao Wu  * @clock: The ADC Clock.
4077c05b0bSHao Wu  * @adci: The input voltage in units of uV. 1uv = 1e-6V.
4177c05b0bSHao Wu  * @vref: The external reference voltage.
4277c05b0bSHao Wu  * @iref: The internal reference voltage, initialized at launch time.
4377c05b0bSHao Wu  * @rv: The calibrated output values of 0.5V and 1.5V for the ADC.
4477c05b0bSHao Wu  */
45*c79aa350SPhilippe Mathieu-Daudé struct NPCM7xxADCState {
4677c05b0bSHao Wu     SysBusDevice parent;
4777c05b0bSHao Wu 
4877c05b0bSHao Wu     MemoryRegion iomem;
4977c05b0bSHao Wu 
5077c05b0bSHao Wu     QEMUTimer    conv_timer;
5177c05b0bSHao Wu 
5277c05b0bSHao Wu     qemu_irq     irq;
5377c05b0bSHao Wu     uint32_t     con;
5477c05b0bSHao Wu     uint32_t     data;
5577c05b0bSHao Wu     Clock       *clock;
5677c05b0bSHao Wu 
5777c05b0bSHao Wu     /* Voltages are in unit of uV. 1V = 1000000uV. */
5877c05b0bSHao Wu     uint32_t     adci[NPCM7XX_ADC_NUM_INPUTS];
5977c05b0bSHao Wu     uint32_t     vref;
6077c05b0bSHao Wu     uint32_t     iref;
6177c05b0bSHao Wu 
6277c05b0bSHao Wu     uint16_t     calibration_r_values[NPCM7XX_ADC_NUM_CALIB];
63*c79aa350SPhilippe Mathieu-Daudé };
6477c05b0bSHao Wu 
6577c05b0bSHao Wu #define TYPE_NPCM7XX_ADC "npcm7xx-adc"
66*c79aa350SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxADCState, NPCM7XX_ADC)
6777c05b0bSHao Wu 
6877c05b0bSHao Wu #endif /* NPCM7XX_ADC_H */
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