1 /* 2 * Aspeed ADC 3 * 4 * Andrew Jeffery <andrew@aj.id.au> 5 * 6 * Copyright 2017 IBM Corp. 7 * 8 * This code is licensed under the GPL version 2 or later. See 9 * the COPYING file in the top-level directory. 10 */ 11 12 #ifndef _ASPEED_ADC_H_ 13 #define _ASPEED_ADC_H_ 14 15 #include <stdint.h> 16 17 #include "hw/hw.h" 18 #include "hw/irq.h" 19 #include "hw/sysbus.h" 20 21 #define TYPE_ASPEED_ADC "aspeed.adc" 22 #define ASPEED_ADC(obj) OBJECT_CHECK(AspeedADCState, (obj), TYPE_ASPEED_ADC) 23 24 #define ASPEED_ADC_NR_CHANNELS 16 25 26 typedef struct AspeedADCState { 27 /* <private> */ 28 SysBusDevice parent; 29 30 MemoryRegion mmio; 31 qemu_irq irq; 32 33 uint32_t engine_ctrl; 34 uint32_t irq_ctrl; 35 uint32_t vga_detect_ctrl; 36 uint32_t adc_clk_ctrl; 37 uint32_t channels[ASPEED_ADC_NR_CHANNELS / 2]; 38 uint32_t bounds[ASPEED_ADC_NR_CHANNELS]; 39 uint32_t hysteresis[ASPEED_ADC_NR_CHANNELS]; 40 uint32_t irq_src; 41 uint32_t comp_trim; 42 } AspeedADCState; 43 44 #endif /* _ASPEED_ADC_H_ */ 45