1fbae27e8SPhilippe Mathieu-Daudé /* 2fbae27e8SPhilippe Mathieu-Daudé * QEMU ICH9 TCO emulation (total cost of ownership) 3fbae27e8SPhilippe Mathieu-Daudé * 4fbae27e8SPhilippe Mathieu-Daudé * Copyright (c) 2015 Paulo Alcantara <pcacjr@zytor.com> 5fbae27e8SPhilippe Mathieu-Daudé * 6fbae27e8SPhilippe Mathieu-Daudé * This work is licensed under the terms of the GNU GPL, version 2 or later. 7fbae27e8SPhilippe Mathieu-Daudé * See the COPYING file in the top-level directory. 8fbae27e8SPhilippe Mathieu-Daudé */ 9fbae27e8SPhilippe Mathieu-Daudé 10fbae27e8SPhilippe Mathieu-Daudé #ifndef HW_ACPI_TCO_H 11fbae27e8SPhilippe Mathieu-Daudé #define HW_ACPI_TCO_H 12fbae27e8SPhilippe Mathieu-Daudé 13fbae27e8SPhilippe Mathieu-Daudé #include "exec/memory.h" 14*06680402SPhilippe Mathieu-Daudé #include "migration/vmstate.h" 15fbae27e8SPhilippe Mathieu-Daudé 16fbae27e8SPhilippe Mathieu-Daudé /* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */ 17fbae27e8SPhilippe Mathieu-Daudé #define TCO_TICK_NSEC 600000000LL 18fbae27e8SPhilippe Mathieu-Daudé 19fbae27e8SPhilippe Mathieu-Daudé /* TCO I/O register offsets */ 20fbae27e8SPhilippe Mathieu-Daudé enum { 21fbae27e8SPhilippe Mathieu-Daudé TCO_RLD = 0x00, 22fbae27e8SPhilippe Mathieu-Daudé TCO_DAT_IN = 0x02, 23fbae27e8SPhilippe Mathieu-Daudé TCO_DAT_OUT = 0x03, 24fbae27e8SPhilippe Mathieu-Daudé TCO1_STS = 0x04, 25fbae27e8SPhilippe Mathieu-Daudé TCO2_STS = 0x06, 26fbae27e8SPhilippe Mathieu-Daudé TCO1_CNT = 0x08, 27fbae27e8SPhilippe Mathieu-Daudé TCO2_CNT = 0x0a, 28fbae27e8SPhilippe Mathieu-Daudé TCO_MESSAGE1 = 0x0c, 29fbae27e8SPhilippe Mathieu-Daudé TCO_MESSAGE2 = 0x0d, 30fbae27e8SPhilippe Mathieu-Daudé TCO_WDCNT = 0x0e, 31fbae27e8SPhilippe Mathieu-Daudé SW_IRQ_GEN = 0x10, 32fbae27e8SPhilippe Mathieu-Daudé TCO_TMR = 0x12, 33fbae27e8SPhilippe Mathieu-Daudé }; 34fbae27e8SPhilippe Mathieu-Daudé 35fbae27e8SPhilippe Mathieu-Daudé /* TCO I/O register control/status bits */ 36fbae27e8SPhilippe Mathieu-Daudé enum { 37fbae27e8SPhilippe Mathieu-Daudé SW_TCO_SMI = 1 << 1, 38fbae27e8SPhilippe Mathieu-Daudé TCO_INT_STS = 1 << 2, 39fbae27e8SPhilippe Mathieu-Daudé TCO_LOCK = 1 << 12, 40fbae27e8SPhilippe Mathieu-Daudé TCO_TMR_HLT = 1 << 11, 41fbae27e8SPhilippe Mathieu-Daudé TCO_TIMEOUT = 1 << 3, 42fbae27e8SPhilippe Mathieu-Daudé TCO_SECOND_TO_STS = 1 << 1, 43fbae27e8SPhilippe Mathieu-Daudé TCO_BOOT_STS = 1 << 2, 44fbae27e8SPhilippe Mathieu-Daudé }; 45fbae27e8SPhilippe Mathieu-Daudé 46fbae27e8SPhilippe Mathieu-Daudé /* TCO I/O registers mask bits */ 47fbae27e8SPhilippe Mathieu-Daudé enum { 48fbae27e8SPhilippe Mathieu-Daudé TCO_RLD_MASK = 0x3ff, 49fbae27e8SPhilippe Mathieu-Daudé TCO1_STS_MASK = 0xe870, 50fbae27e8SPhilippe Mathieu-Daudé TCO2_STS_MASK = 0xfff8, 51fbae27e8SPhilippe Mathieu-Daudé TCO1_CNT_MASK = 0xfeff, 52fbae27e8SPhilippe Mathieu-Daudé TCO_TMR_MASK = 0x3ff, 53fbae27e8SPhilippe Mathieu-Daudé }; 54fbae27e8SPhilippe Mathieu-Daudé 55fbae27e8SPhilippe Mathieu-Daudé typedef struct TCOIORegs { 56fbae27e8SPhilippe Mathieu-Daudé struct { 57fbae27e8SPhilippe Mathieu-Daudé uint16_t rld; 58fbae27e8SPhilippe Mathieu-Daudé uint8_t din; 59fbae27e8SPhilippe Mathieu-Daudé uint8_t dout; 60fbae27e8SPhilippe Mathieu-Daudé uint16_t sts1; 61fbae27e8SPhilippe Mathieu-Daudé uint16_t sts2; 62fbae27e8SPhilippe Mathieu-Daudé uint16_t cnt1; 63fbae27e8SPhilippe Mathieu-Daudé uint16_t cnt2; 64fbae27e8SPhilippe Mathieu-Daudé uint8_t msg1; 65fbae27e8SPhilippe Mathieu-Daudé uint8_t msg2; 66fbae27e8SPhilippe Mathieu-Daudé uint8_t wdcnt; 67fbae27e8SPhilippe Mathieu-Daudé uint16_t tmr; 68fbae27e8SPhilippe Mathieu-Daudé } tco; 69fbae27e8SPhilippe Mathieu-Daudé uint8_t sw_irq_gen; 70fbae27e8SPhilippe Mathieu-Daudé 71fbae27e8SPhilippe Mathieu-Daudé QEMUTimer *tco_timer; 72fbae27e8SPhilippe Mathieu-Daudé int64_t expire_time; 73fbae27e8SPhilippe Mathieu-Daudé uint8_t timeouts_no; 74fbae27e8SPhilippe Mathieu-Daudé 75fbae27e8SPhilippe Mathieu-Daudé MemoryRegion io; 76fbae27e8SPhilippe Mathieu-Daudé } TCOIORegs; 77fbae27e8SPhilippe Mathieu-Daudé 78fbae27e8SPhilippe Mathieu-Daudé /* tco.c */ 79fbae27e8SPhilippe Mathieu-Daudé void acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent); 80fbae27e8SPhilippe Mathieu-Daudé 81fbae27e8SPhilippe Mathieu-Daudé extern const VMStateDescription vmstate_tco_io_sts; 82fbae27e8SPhilippe Mathieu-Daudé 83fbae27e8SPhilippe Mathieu-Daudé #endif /* HW_ACPI_TCO_H */ 84