1*d0a9bb5eSRichard Henderson /* 2*d0a9bb5eSRichard Henderson * Common definitions for the softmmu tlb 3*d0a9bb5eSRichard Henderson * 4*d0a9bb5eSRichard Henderson * Copyright (c) 2003 Fabrice Bellard 5*d0a9bb5eSRichard Henderson * 6*d0a9bb5eSRichard Henderson * This library is free software; you can redistribute it and/or 7*d0a9bb5eSRichard Henderson * modify it under the terms of the GNU Lesser General Public 8*d0a9bb5eSRichard Henderson * License as published by the Free Software Foundation; either 9*d0a9bb5eSRichard Henderson * version 2.1 of the License, or (at your option) any later version. 10*d0a9bb5eSRichard Henderson * 11*d0a9bb5eSRichard Henderson * This library is distributed in the hope that it will be useful, 12*d0a9bb5eSRichard Henderson * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*d0a9bb5eSRichard Henderson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*d0a9bb5eSRichard Henderson * Lesser General Public License for more details. 15*d0a9bb5eSRichard Henderson * 16*d0a9bb5eSRichard Henderson * You should have received a copy of the GNU Lesser General Public 17*d0a9bb5eSRichard Henderson * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18*d0a9bb5eSRichard Henderson */ 19*d0a9bb5eSRichard Henderson #ifndef EXEC_TLB_COMMON_H 20*d0a9bb5eSRichard Henderson #define EXEC_TLB_COMMON_H 1 21*d0a9bb5eSRichard Henderson 22*d0a9bb5eSRichard Henderson #define CPU_TLB_ENTRY_BITS 5 23*d0a9bb5eSRichard Henderson 24*d0a9bb5eSRichard Henderson /* Minimalized TLB entry for use by TCG fast path. */ 25*d0a9bb5eSRichard Henderson typedef union CPUTLBEntry { 26*d0a9bb5eSRichard Henderson struct { 27*d0a9bb5eSRichard Henderson uint64_t addr_read; 28*d0a9bb5eSRichard Henderson uint64_t addr_write; 29*d0a9bb5eSRichard Henderson uint64_t addr_code; 30*d0a9bb5eSRichard Henderson /* 31*d0a9bb5eSRichard Henderson * Addend to virtual address to get host address. IO accesses 32*d0a9bb5eSRichard Henderson * use the corresponding iotlb value. 33*d0a9bb5eSRichard Henderson */ 34*d0a9bb5eSRichard Henderson uintptr_t addend; 35*d0a9bb5eSRichard Henderson }; 36*d0a9bb5eSRichard Henderson /* 37*d0a9bb5eSRichard Henderson * Padding to get a power of two size, as well as index 38*d0a9bb5eSRichard Henderson * access to addr_{read,write,code}. 39*d0a9bb5eSRichard Henderson */ 40*d0a9bb5eSRichard Henderson uint64_t addr_idx[(1 << CPU_TLB_ENTRY_BITS) / sizeof(uint64_t)]; 41*d0a9bb5eSRichard Henderson } CPUTLBEntry; 42*d0a9bb5eSRichard Henderson 43*d0a9bb5eSRichard Henderson QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS)); 44*d0a9bb5eSRichard Henderson 45*d0a9bb5eSRichard Henderson /* 46*d0a9bb5eSRichard Henderson * Data elements that are per MMU mode, accessed by the fast path. 47*d0a9bb5eSRichard Henderson * The structure is aligned to aid loading the pair with one insn. 48*d0a9bb5eSRichard Henderson */ 49*d0a9bb5eSRichard Henderson typedef struct CPUTLBDescFast { 50*d0a9bb5eSRichard Henderson /* Contains (n_entries - 1) << CPU_TLB_ENTRY_BITS */ 51*d0a9bb5eSRichard Henderson uintptr_t mask; 52*d0a9bb5eSRichard Henderson /* The array of tlb entries itself. */ 53*d0a9bb5eSRichard Henderson CPUTLBEntry *table; 54*d0a9bb5eSRichard Henderson } CPUTLBDescFast QEMU_ALIGNED(2 * sizeof(void *)); 55*d0a9bb5eSRichard Henderson 56*d0a9bb5eSRichard Henderson #endif /* EXEC_TLB_COMMON_H */ 57