1 /* 2 * QEMU MegaRAID SAS 8708EM2 Host Bus Adapter emulation 3 * Based on the linux driver code at drivers/scsi/megaraid 4 * 5 * Copyright (c) 2009-2012 Hannes Reinecke, SUSE Labs 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include "hw/hw.h" 22 #include "hw/pci/pci.h" 23 #include "sysemu/dma.h" 24 #include "hw/pci/msix.h" 25 #include "qemu/iov.h" 26 #include "hw/scsi/scsi.h" 27 #include "block/scsi.h" 28 #include "trace.h" 29 30 #include "mfi.h" 31 32 #define MEGASAS_VERSION "1.70" 33 #define MEGASAS_MAX_FRAMES 2048 /* Firmware limit at 65535 */ 34 #define MEGASAS_DEFAULT_FRAMES 1000 /* Windows requires this */ 35 #define MEGASAS_MAX_SGE 128 /* Firmware limit */ 36 #define MEGASAS_DEFAULT_SGE 80 37 #define MEGASAS_MAX_SECTORS 0xFFFF /* No real limit */ 38 #define MEGASAS_MAX_ARRAYS 128 39 40 #define MEGASAS_HBA_SERIAL "QEMU123456" 41 #define NAA_LOCALLY_ASSIGNED_ID 0x3ULL 42 #define IEEE_COMPANY_LOCALLY_ASSIGNED 0x525400 43 44 #define MEGASAS_FLAG_USE_JBOD 0 45 #define MEGASAS_MASK_USE_JBOD (1 << MEGASAS_FLAG_USE_JBOD) 46 #define MEGASAS_FLAG_USE_MSIX 1 47 #define MEGASAS_MASK_USE_MSIX (1 << MEGASAS_FLAG_USE_MSIX) 48 #define MEGASAS_FLAG_USE_QUEUE64 2 49 #define MEGASAS_MASK_USE_QUEUE64 (1 << MEGASAS_FLAG_USE_QUEUE64) 50 51 static const char *mfi_frame_desc[] = { 52 "MFI init", "LD Read", "LD Write", "LD SCSI", "PD SCSI", 53 "MFI Doorbell", "MFI Abort", "MFI SMP", "MFI Stop"}; 54 55 typedef struct MegasasCmd { 56 uint32_t index; 57 uint16_t flags; 58 uint16_t count; 59 uint64_t context; 60 61 hwaddr pa; 62 hwaddr pa_size; 63 union mfi_frame *frame; 64 SCSIRequest *req; 65 QEMUSGList qsg; 66 void *iov_buf; 67 size_t iov_size; 68 size_t iov_offset; 69 struct MegasasState *state; 70 } MegasasCmd; 71 72 typedef struct MegasasState { 73 /*< private >*/ 74 PCIDevice parent_obj; 75 /*< public >*/ 76 77 MemoryRegion mmio_io; 78 MemoryRegion port_io; 79 MemoryRegion queue_io; 80 uint32_t frame_hi; 81 82 int fw_state; 83 uint32_t fw_sge; 84 uint32_t fw_cmds; 85 uint32_t flags; 86 int fw_luns; 87 int intr_mask; 88 int doorbell; 89 int busy; 90 91 MegasasCmd *event_cmd; 92 int event_locale; 93 int event_class; 94 int event_count; 95 int shutdown_event; 96 int boot_event; 97 98 uint64_t sas_addr; 99 char *hba_serial; 100 101 uint64_t reply_queue_pa; 102 void *reply_queue; 103 int reply_queue_len; 104 int reply_queue_head; 105 int reply_queue_tail; 106 uint64_t consumer_pa; 107 uint64_t producer_pa; 108 109 MegasasCmd frames[MEGASAS_MAX_FRAMES]; 110 111 SCSIBus bus; 112 } MegasasState; 113 114 #define TYPE_MEGASAS "megasas" 115 116 #define MEGASAS(obj) \ 117 OBJECT_CHECK(MegasasState, (obj), TYPE_MEGASAS) 118 119 #define MEGASAS_INTR_DISABLED_MASK 0xFFFFFFFF 120 121 static bool megasas_intr_enabled(MegasasState *s) 122 { 123 if ((s->intr_mask & MEGASAS_INTR_DISABLED_MASK) != 124 MEGASAS_INTR_DISABLED_MASK) { 125 return true; 126 } 127 return false; 128 } 129 130 static bool megasas_use_queue64(MegasasState *s) 131 { 132 return s->flags & MEGASAS_MASK_USE_QUEUE64; 133 } 134 135 static bool megasas_use_msix(MegasasState *s) 136 { 137 return s->flags & MEGASAS_MASK_USE_MSIX; 138 } 139 140 static bool megasas_is_jbod(MegasasState *s) 141 { 142 return s->flags & MEGASAS_MASK_USE_JBOD; 143 } 144 145 static void megasas_frame_set_cmd_status(unsigned long frame, uint8_t v) 146 { 147 stb_phys(&address_space_memory, 148 frame + offsetof(struct mfi_frame_header, cmd_status), v); 149 } 150 151 static void megasas_frame_set_scsi_status(unsigned long frame, uint8_t v) 152 { 153 stb_phys(&address_space_memory, 154 frame + offsetof(struct mfi_frame_header, scsi_status), v); 155 } 156 157 /* 158 * Context is considered opaque, but the HBA firmware is running 159 * in little endian mode. So convert it to little endian, too. 160 */ 161 static uint64_t megasas_frame_get_context(unsigned long frame) 162 { 163 return ldq_le_phys(&address_space_memory, 164 frame + offsetof(struct mfi_frame_header, context)); 165 } 166 167 static bool megasas_frame_is_ieee_sgl(MegasasCmd *cmd) 168 { 169 return cmd->flags & MFI_FRAME_IEEE_SGL; 170 } 171 172 static bool megasas_frame_is_sgl64(MegasasCmd *cmd) 173 { 174 return cmd->flags & MFI_FRAME_SGL64; 175 } 176 177 static bool megasas_frame_is_sense64(MegasasCmd *cmd) 178 { 179 return cmd->flags & MFI_FRAME_SENSE64; 180 } 181 182 static uint64_t megasas_sgl_get_addr(MegasasCmd *cmd, 183 union mfi_sgl *sgl) 184 { 185 uint64_t addr; 186 187 if (megasas_frame_is_ieee_sgl(cmd)) { 188 addr = le64_to_cpu(sgl->sg_skinny->addr); 189 } else if (megasas_frame_is_sgl64(cmd)) { 190 addr = le64_to_cpu(sgl->sg64->addr); 191 } else { 192 addr = le32_to_cpu(sgl->sg32->addr); 193 } 194 return addr; 195 } 196 197 static uint32_t megasas_sgl_get_len(MegasasCmd *cmd, 198 union mfi_sgl *sgl) 199 { 200 uint32_t len; 201 202 if (megasas_frame_is_ieee_sgl(cmd)) { 203 len = le32_to_cpu(sgl->sg_skinny->len); 204 } else if (megasas_frame_is_sgl64(cmd)) { 205 len = le32_to_cpu(sgl->sg64->len); 206 } else { 207 len = le32_to_cpu(sgl->sg32->len); 208 } 209 return len; 210 } 211 212 static union mfi_sgl *megasas_sgl_next(MegasasCmd *cmd, 213 union mfi_sgl *sgl) 214 { 215 uint8_t *next = (uint8_t *)sgl; 216 217 if (megasas_frame_is_ieee_sgl(cmd)) { 218 next += sizeof(struct mfi_sg_skinny); 219 } else if (megasas_frame_is_sgl64(cmd)) { 220 next += sizeof(struct mfi_sg64); 221 } else { 222 next += sizeof(struct mfi_sg32); 223 } 224 225 if (next >= (uint8_t *)cmd->frame + cmd->pa_size) { 226 return NULL; 227 } 228 return (union mfi_sgl *)next; 229 } 230 231 static void megasas_soft_reset(MegasasState *s); 232 233 static int megasas_map_sgl(MegasasState *s, MegasasCmd *cmd, union mfi_sgl *sgl) 234 { 235 int i; 236 int iov_count = 0; 237 size_t iov_size = 0; 238 239 cmd->flags = le16_to_cpu(cmd->frame->header.flags); 240 iov_count = cmd->frame->header.sge_count; 241 if (iov_count > MEGASAS_MAX_SGE) { 242 trace_megasas_iovec_sgl_overflow(cmd->index, iov_count, 243 MEGASAS_MAX_SGE); 244 return iov_count; 245 } 246 pci_dma_sglist_init(&cmd->qsg, PCI_DEVICE(s), iov_count); 247 for (i = 0; i < iov_count; i++) { 248 dma_addr_t iov_pa, iov_size_p; 249 250 if (!sgl) { 251 trace_megasas_iovec_sgl_underflow(cmd->index, i); 252 goto unmap; 253 } 254 iov_pa = megasas_sgl_get_addr(cmd, sgl); 255 iov_size_p = megasas_sgl_get_len(cmd, sgl); 256 if (!iov_pa || !iov_size_p) { 257 trace_megasas_iovec_sgl_invalid(cmd->index, i, 258 iov_pa, iov_size_p); 259 goto unmap; 260 } 261 qemu_sglist_add(&cmd->qsg, iov_pa, iov_size_p); 262 sgl = megasas_sgl_next(cmd, sgl); 263 iov_size += (size_t)iov_size_p; 264 } 265 if (cmd->iov_size > iov_size) { 266 trace_megasas_iovec_overflow(cmd->index, iov_size, cmd->iov_size); 267 } else if (cmd->iov_size < iov_size) { 268 trace_megasas_iovec_underflow(cmd->iov_size, iov_size, cmd->iov_size); 269 } 270 cmd->iov_offset = 0; 271 return 0; 272 unmap: 273 qemu_sglist_destroy(&cmd->qsg); 274 return iov_count - i; 275 } 276 277 static void megasas_unmap_sgl(MegasasCmd *cmd) 278 { 279 qemu_sglist_destroy(&cmd->qsg); 280 cmd->iov_offset = 0; 281 } 282 283 /* 284 * passthrough sense and io sense are at the same offset 285 */ 286 static int megasas_build_sense(MegasasCmd *cmd, uint8_t *sense_ptr, 287 uint8_t sense_len) 288 { 289 uint32_t pa_hi = 0, pa_lo; 290 hwaddr pa; 291 292 if (sense_len > cmd->frame->header.sense_len) { 293 sense_len = cmd->frame->header.sense_len; 294 } 295 if (sense_len) { 296 pa_lo = le32_to_cpu(cmd->frame->pass.sense_addr_lo); 297 if (megasas_frame_is_sense64(cmd)) { 298 pa_hi = le32_to_cpu(cmd->frame->pass.sense_addr_hi); 299 } 300 pa = ((uint64_t) pa_hi << 32) | pa_lo; 301 cpu_physical_memory_write(pa, sense_ptr, sense_len); 302 cmd->frame->header.sense_len = sense_len; 303 } 304 return sense_len; 305 } 306 307 static void megasas_write_sense(MegasasCmd *cmd, SCSISense sense) 308 { 309 uint8_t sense_buf[SCSI_SENSE_BUF_SIZE]; 310 uint8_t sense_len = 18; 311 312 memset(sense_buf, 0, sense_len); 313 sense_buf[0] = 0xf0; 314 sense_buf[2] = sense.key; 315 sense_buf[7] = 10; 316 sense_buf[12] = sense.asc; 317 sense_buf[13] = sense.ascq; 318 megasas_build_sense(cmd, sense_buf, sense_len); 319 } 320 321 static void megasas_copy_sense(MegasasCmd *cmd) 322 { 323 uint8_t sense_buf[SCSI_SENSE_BUF_SIZE]; 324 uint8_t sense_len; 325 326 sense_len = scsi_req_get_sense(cmd->req, sense_buf, 327 SCSI_SENSE_BUF_SIZE); 328 megasas_build_sense(cmd, sense_buf, sense_len); 329 } 330 331 /* 332 * Format an INQUIRY CDB 333 */ 334 static int megasas_setup_inquiry(uint8_t *cdb, int pg, int len) 335 { 336 memset(cdb, 0, 6); 337 cdb[0] = INQUIRY; 338 if (pg > 0) { 339 cdb[1] = 0x1; 340 cdb[2] = pg; 341 } 342 cdb[3] = (len >> 8) & 0xff; 343 cdb[4] = (len & 0xff); 344 return len; 345 } 346 347 /* 348 * Encode lba and len into a READ_16/WRITE_16 CDB 349 */ 350 static void megasas_encode_lba(uint8_t *cdb, uint64_t lba, 351 uint32_t len, bool is_write) 352 { 353 memset(cdb, 0x0, 16); 354 if (is_write) { 355 cdb[0] = WRITE_16; 356 } else { 357 cdb[0] = READ_16; 358 } 359 cdb[2] = (lba >> 56) & 0xff; 360 cdb[3] = (lba >> 48) & 0xff; 361 cdb[4] = (lba >> 40) & 0xff; 362 cdb[5] = (lba >> 32) & 0xff; 363 cdb[6] = (lba >> 24) & 0xff; 364 cdb[7] = (lba >> 16) & 0xff; 365 cdb[8] = (lba >> 8) & 0xff; 366 cdb[9] = (lba) & 0xff; 367 cdb[10] = (len >> 24) & 0xff; 368 cdb[11] = (len >> 16) & 0xff; 369 cdb[12] = (len >> 8) & 0xff; 370 cdb[13] = (len) & 0xff; 371 } 372 373 /* 374 * Utility functions 375 */ 376 static uint64_t megasas_fw_time(void) 377 { 378 struct tm curtime; 379 uint64_t bcd_time; 380 381 qemu_get_timedate(&curtime, 0); 382 bcd_time = ((uint64_t)curtime.tm_sec & 0xff) << 48 | 383 ((uint64_t)curtime.tm_min & 0xff) << 40 | 384 ((uint64_t)curtime.tm_hour & 0xff) << 32 | 385 ((uint64_t)curtime.tm_mday & 0xff) << 24 | 386 ((uint64_t)curtime.tm_mon & 0xff) << 16 | 387 ((uint64_t)(curtime.tm_year + 1900) & 0xffff); 388 389 return bcd_time; 390 } 391 392 /* 393 * Default disk sata address 394 * 0x1221 is the magic number as 395 * present in real hardware, 396 * so use it here, too. 397 */ 398 static uint64_t megasas_get_sata_addr(uint16_t id) 399 { 400 uint64_t addr = (0x1221ULL << 48); 401 return addr & (id << 24); 402 } 403 404 /* 405 * Frame handling 406 */ 407 static int megasas_next_index(MegasasState *s, int index, int limit) 408 { 409 index++; 410 if (index == limit) { 411 index = 0; 412 } 413 return index; 414 } 415 416 static MegasasCmd *megasas_lookup_frame(MegasasState *s, 417 hwaddr frame) 418 { 419 MegasasCmd *cmd = NULL; 420 int num = 0, index; 421 422 index = s->reply_queue_head; 423 424 while (num < s->fw_cmds) { 425 if (s->frames[index].pa && s->frames[index].pa == frame) { 426 cmd = &s->frames[index]; 427 break; 428 } 429 index = megasas_next_index(s, index, s->fw_cmds); 430 num++; 431 } 432 433 return cmd; 434 } 435 436 static MegasasCmd *megasas_next_frame(MegasasState *s, 437 hwaddr frame) 438 { 439 MegasasCmd *cmd = NULL; 440 int num = 0, index; 441 442 cmd = megasas_lookup_frame(s, frame); 443 if (cmd) { 444 trace_megasas_qf_found(cmd->index, cmd->pa); 445 return cmd; 446 } 447 index = s->reply_queue_head; 448 num = 0; 449 while (num < s->fw_cmds) { 450 if (!s->frames[index].pa) { 451 cmd = &s->frames[index]; 452 break; 453 } 454 index = megasas_next_index(s, index, s->fw_cmds); 455 num++; 456 } 457 if (!cmd) { 458 trace_megasas_qf_failed(frame); 459 } 460 trace_megasas_qf_new(index, cmd); 461 return cmd; 462 } 463 464 static MegasasCmd *megasas_enqueue_frame(MegasasState *s, 465 hwaddr frame, uint64_t context, int count) 466 { 467 MegasasCmd *cmd = NULL; 468 int frame_size = MFI_FRAME_SIZE * 16; 469 hwaddr frame_size_p = frame_size; 470 471 cmd = megasas_next_frame(s, frame); 472 /* All frames busy */ 473 if (!cmd) { 474 return NULL; 475 } 476 if (!cmd->pa) { 477 cmd->pa = frame; 478 /* Map all possible frames */ 479 cmd->frame = cpu_physical_memory_map(frame, &frame_size_p, 0); 480 if (frame_size_p != frame_size) { 481 trace_megasas_qf_map_failed(cmd->index, (unsigned long)frame); 482 if (cmd->frame) { 483 cpu_physical_memory_unmap(cmd->frame, frame_size_p, 0, 0); 484 cmd->frame = NULL; 485 cmd->pa = 0; 486 } 487 s->event_count++; 488 return NULL; 489 } 490 cmd->pa_size = frame_size_p; 491 cmd->context = context; 492 if (!megasas_use_queue64(s)) { 493 cmd->context &= (uint64_t)0xFFFFFFFF; 494 } 495 } 496 cmd->count = count; 497 s->busy++; 498 499 trace_megasas_qf_enqueue(cmd->index, cmd->count, cmd->context, 500 s->reply_queue_head, s->busy); 501 502 return cmd; 503 } 504 505 static void megasas_complete_frame(MegasasState *s, uint64_t context) 506 { 507 PCIDevice *pci_dev = PCI_DEVICE(s); 508 int tail, queue_offset; 509 510 /* Decrement busy count */ 511 s->busy--; 512 513 if (s->reply_queue_pa) { 514 /* 515 * Put command on the reply queue. 516 * Context is opaque, but emulation is running in 517 * little endian. So convert it. 518 */ 519 tail = s->reply_queue_head; 520 if (megasas_use_queue64(s)) { 521 queue_offset = tail * sizeof(uint64_t); 522 stq_le_phys(&address_space_memory, 523 s->reply_queue_pa + queue_offset, context); 524 } else { 525 queue_offset = tail * sizeof(uint32_t); 526 stl_le_phys(&address_space_memory, 527 s->reply_queue_pa + queue_offset, context); 528 } 529 s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds); 530 trace_megasas_qf_complete(context, tail, queue_offset, 531 s->busy, s->doorbell); 532 } 533 534 if (megasas_intr_enabled(s)) { 535 /* Notify HBA */ 536 s->doorbell++; 537 if (s->doorbell == 1) { 538 if (msix_enabled(pci_dev)) { 539 trace_megasas_msix_raise(0); 540 msix_notify(pci_dev, 0); 541 } else { 542 trace_megasas_irq_raise(); 543 pci_irq_assert(pci_dev); 544 } 545 } 546 } else { 547 trace_megasas_qf_complete_noirq(context); 548 } 549 } 550 551 static void megasas_reset_frames(MegasasState *s) 552 { 553 int i; 554 MegasasCmd *cmd; 555 556 for (i = 0; i < s->fw_cmds; i++) { 557 cmd = &s->frames[i]; 558 if (cmd->pa) { 559 cpu_physical_memory_unmap(cmd->frame, cmd->pa_size, 0, 0); 560 cmd->frame = NULL; 561 cmd->pa = 0; 562 } 563 } 564 } 565 566 static void megasas_abort_command(MegasasCmd *cmd) 567 { 568 if (cmd->req) { 569 scsi_req_cancel(cmd->req); 570 cmd->req = NULL; 571 } 572 } 573 574 static int megasas_init_firmware(MegasasState *s, MegasasCmd *cmd) 575 { 576 uint32_t pa_hi, pa_lo; 577 hwaddr iq_pa, initq_size; 578 struct mfi_init_qinfo *initq; 579 uint32_t flags; 580 int ret = MFI_STAT_OK; 581 582 pa_lo = le32_to_cpu(cmd->frame->init.qinfo_new_addr_lo); 583 pa_hi = le32_to_cpu(cmd->frame->init.qinfo_new_addr_hi); 584 iq_pa = (((uint64_t) pa_hi << 32) | pa_lo); 585 trace_megasas_init_firmware((uint64_t)iq_pa); 586 initq_size = sizeof(*initq); 587 initq = cpu_physical_memory_map(iq_pa, &initq_size, 0); 588 if (!initq || initq_size != sizeof(*initq)) { 589 trace_megasas_initq_map_failed(cmd->index); 590 s->event_count++; 591 ret = MFI_STAT_MEMORY_NOT_AVAILABLE; 592 goto out; 593 } 594 s->reply_queue_len = le32_to_cpu(initq->rq_entries) & 0xFFFF; 595 if (s->reply_queue_len > s->fw_cmds) { 596 trace_megasas_initq_mismatch(s->reply_queue_len, s->fw_cmds); 597 s->event_count++; 598 ret = MFI_STAT_INVALID_PARAMETER; 599 goto out; 600 } 601 pa_lo = le32_to_cpu(initq->rq_addr_lo); 602 pa_hi = le32_to_cpu(initq->rq_addr_hi); 603 s->reply_queue_pa = ((uint64_t) pa_hi << 32) | pa_lo; 604 pa_lo = le32_to_cpu(initq->ci_addr_lo); 605 pa_hi = le32_to_cpu(initq->ci_addr_hi); 606 s->consumer_pa = ((uint64_t) pa_hi << 32) | pa_lo; 607 pa_lo = le32_to_cpu(initq->pi_addr_lo); 608 pa_hi = le32_to_cpu(initq->pi_addr_hi); 609 s->producer_pa = ((uint64_t) pa_hi << 32) | pa_lo; 610 s->reply_queue_head = ldl_le_phys(&address_space_memory, s->producer_pa); 611 s->reply_queue_tail = ldl_le_phys(&address_space_memory, s->consumer_pa); 612 flags = le32_to_cpu(initq->flags); 613 if (flags & MFI_QUEUE_FLAG_CONTEXT64) { 614 s->flags |= MEGASAS_MASK_USE_QUEUE64; 615 } 616 trace_megasas_init_queue((unsigned long)s->reply_queue_pa, 617 s->reply_queue_len, s->reply_queue_head, 618 s->reply_queue_tail, flags); 619 megasas_reset_frames(s); 620 s->fw_state = MFI_FWSTATE_OPERATIONAL; 621 out: 622 if (initq) { 623 cpu_physical_memory_unmap(initq, initq_size, 0, 0); 624 } 625 return ret; 626 } 627 628 static int megasas_map_dcmd(MegasasState *s, MegasasCmd *cmd) 629 { 630 dma_addr_t iov_pa, iov_size; 631 632 cmd->flags = le16_to_cpu(cmd->frame->header.flags); 633 if (!cmd->frame->header.sge_count) { 634 trace_megasas_dcmd_zero_sge(cmd->index); 635 cmd->iov_size = 0; 636 return 0; 637 } else if (cmd->frame->header.sge_count > 1) { 638 trace_megasas_dcmd_invalid_sge(cmd->index, 639 cmd->frame->header.sge_count); 640 cmd->iov_size = 0; 641 return -1; 642 } 643 iov_pa = megasas_sgl_get_addr(cmd, &cmd->frame->dcmd.sgl); 644 iov_size = megasas_sgl_get_len(cmd, &cmd->frame->dcmd.sgl); 645 pci_dma_sglist_init(&cmd->qsg, PCI_DEVICE(s), 1); 646 qemu_sglist_add(&cmd->qsg, iov_pa, iov_size); 647 cmd->iov_size = iov_size; 648 return cmd->iov_size; 649 } 650 651 static void megasas_finish_dcmd(MegasasCmd *cmd, uint32_t iov_size) 652 { 653 trace_megasas_finish_dcmd(cmd->index, iov_size); 654 655 if (cmd->frame->header.sge_count) { 656 qemu_sglist_destroy(&cmd->qsg); 657 } 658 if (iov_size > cmd->iov_size) { 659 if (megasas_frame_is_ieee_sgl(cmd)) { 660 cmd->frame->dcmd.sgl.sg_skinny->len = cpu_to_le32(iov_size); 661 } else if (megasas_frame_is_sgl64(cmd)) { 662 cmd->frame->dcmd.sgl.sg64->len = cpu_to_le32(iov_size); 663 } else { 664 cmd->frame->dcmd.sgl.sg32->len = cpu_to_le32(iov_size); 665 } 666 } 667 cmd->iov_size = 0; 668 } 669 670 static int megasas_ctrl_get_info(MegasasState *s, MegasasCmd *cmd) 671 { 672 PCIDevice *pci_dev = PCI_DEVICE(s); 673 struct mfi_ctrl_info info; 674 size_t dcmd_size = sizeof(info); 675 BusChild *kid; 676 int num_ld_disks = 0; 677 uint16_t sdev_id; 678 679 memset(&info, 0x0, cmd->iov_size); 680 if (cmd->iov_size < dcmd_size) { 681 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 682 dcmd_size); 683 return MFI_STAT_INVALID_PARAMETER; 684 } 685 686 info.pci.vendor = cpu_to_le16(PCI_VENDOR_ID_LSI_LOGIC); 687 info.pci.device = cpu_to_le16(PCI_DEVICE_ID_LSI_SAS1078); 688 info.pci.subvendor = cpu_to_le16(PCI_VENDOR_ID_LSI_LOGIC); 689 info.pci.subdevice = cpu_to_le16(0x1013); 690 691 /* 692 * For some reason the firmware supports 693 * only up to 8 device ports. 694 * Despite supporting a far larger number 695 * of devices for the physical devices. 696 * So just display the first 8 devices 697 * in the device port list, independent 698 * of how many logical devices are actually 699 * present. 700 */ 701 info.host.type = MFI_INFO_HOST_PCIE; 702 info.device.type = MFI_INFO_DEV_SAS3G; 703 info.device.port_count = 8; 704 QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { 705 SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child); 706 707 if (num_ld_disks < 8) { 708 sdev_id = ((sdev->id & 0xFF) >> 8) | (sdev->lun & 0xFF); 709 info.device.port_addr[num_ld_disks] = 710 cpu_to_le64(megasas_get_sata_addr(sdev_id)); 711 } 712 num_ld_disks++; 713 } 714 715 memcpy(info.product_name, "MegaRAID SAS 8708EM2", 20); 716 snprintf(info.serial_number, 32, "%s", s->hba_serial); 717 snprintf(info.package_version, 0x60, "%s-QEMU", QEMU_VERSION); 718 memcpy(info.image_component[0].name, "APP", 3); 719 memcpy(info.image_component[0].version, MEGASAS_VERSION "-QEMU", 9); 720 memcpy(info.image_component[0].build_date, __DATE__, 11); 721 memcpy(info.image_component[0].build_time, __TIME__, 8); 722 info.image_component_count = 1; 723 if (pci_dev->has_rom) { 724 uint8_t biosver[32]; 725 uint8_t *ptr; 726 727 ptr = memory_region_get_ram_ptr(&pci_dev->rom); 728 memcpy(biosver, ptr + 0x41, 31); 729 memcpy(info.image_component[1].name, "BIOS", 4); 730 memcpy(info.image_component[1].version, biosver, 731 strlen((const char *)biosver)); 732 info.image_component_count++; 733 } 734 info.current_fw_time = cpu_to_le32(megasas_fw_time()); 735 info.max_arms = 32; 736 info.max_spans = 8; 737 info.max_arrays = MEGASAS_MAX_ARRAYS; 738 info.max_lds = s->fw_luns; 739 info.max_cmds = cpu_to_le16(s->fw_cmds); 740 info.max_sg_elements = cpu_to_le16(s->fw_sge); 741 info.max_request_size = cpu_to_le32(MEGASAS_MAX_SECTORS); 742 info.lds_present = cpu_to_le16(num_ld_disks); 743 info.pd_present = cpu_to_le16(num_ld_disks); 744 info.pd_disks_present = cpu_to_le16(num_ld_disks); 745 info.hw_present = cpu_to_le32(MFI_INFO_HW_NVRAM | 746 MFI_INFO_HW_MEM | 747 MFI_INFO_HW_FLASH); 748 info.memory_size = cpu_to_le16(512); 749 info.nvram_size = cpu_to_le16(32); 750 info.flash_size = cpu_to_le16(16); 751 info.raid_levels = cpu_to_le32(MFI_INFO_RAID_0); 752 info.adapter_ops = cpu_to_le32(MFI_INFO_AOPS_RBLD_RATE | 753 MFI_INFO_AOPS_SELF_DIAGNOSTIC | 754 MFI_INFO_AOPS_MIXED_ARRAY); 755 info.ld_ops = cpu_to_le32(MFI_INFO_LDOPS_DISK_CACHE_POLICY | 756 MFI_INFO_LDOPS_ACCESS_POLICY | 757 MFI_INFO_LDOPS_IO_POLICY | 758 MFI_INFO_LDOPS_WRITE_POLICY | 759 MFI_INFO_LDOPS_READ_POLICY); 760 info.max_strips_per_io = cpu_to_le16(s->fw_sge); 761 info.stripe_sz_ops.min = 3; 762 info.stripe_sz_ops.max = ffs(MEGASAS_MAX_SECTORS + 1) - 1; 763 info.properties.pred_fail_poll_interval = cpu_to_le16(300); 764 info.properties.intr_throttle_cnt = cpu_to_le16(16); 765 info.properties.intr_throttle_timeout = cpu_to_le16(50); 766 info.properties.rebuild_rate = 30; 767 info.properties.patrol_read_rate = 30; 768 info.properties.bgi_rate = 30; 769 info.properties.cc_rate = 30; 770 info.properties.recon_rate = 30; 771 info.properties.cache_flush_interval = 4; 772 info.properties.spinup_drv_cnt = 2; 773 info.properties.spinup_delay = 6; 774 info.properties.ecc_bucket_size = 15; 775 info.properties.ecc_bucket_leak_rate = cpu_to_le16(1440); 776 info.properties.expose_encl_devices = 1; 777 info.properties.OnOffProperties = cpu_to_le32(MFI_CTRL_PROP_EnableJBOD); 778 info.pd_ops = cpu_to_le32(MFI_INFO_PDOPS_FORCE_ONLINE | 779 MFI_INFO_PDOPS_FORCE_OFFLINE); 780 info.pd_mix_support = cpu_to_le32(MFI_INFO_PDMIX_SAS | 781 MFI_INFO_PDMIX_SATA | 782 MFI_INFO_PDMIX_LD); 783 784 cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 785 return MFI_STAT_OK; 786 } 787 788 static int megasas_mfc_get_defaults(MegasasState *s, MegasasCmd *cmd) 789 { 790 struct mfi_defaults info; 791 size_t dcmd_size = sizeof(struct mfi_defaults); 792 793 memset(&info, 0x0, dcmd_size); 794 if (cmd->iov_size < dcmd_size) { 795 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 796 dcmd_size); 797 return MFI_STAT_INVALID_PARAMETER; 798 } 799 800 info.sas_addr = cpu_to_le64(s->sas_addr); 801 info.stripe_size = 3; 802 info.flush_time = 4; 803 info.background_rate = 30; 804 info.allow_mix_in_enclosure = 1; 805 info.allow_mix_in_ld = 1; 806 info.direct_pd_mapping = 1; 807 /* Enable for BIOS support */ 808 info.bios_enumerate_lds = 1; 809 info.disable_ctrl_r = 1; 810 info.expose_enclosure_devices = 1; 811 info.disable_preboot_cli = 1; 812 info.cluster_disable = 1; 813 814 cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 815 return MFI_STAT_OK; 816 } 817 818 static int megasas_dcmd_get_bios_info(MegasasState *s, MegasasCmd *cmd) 819 { 820 struct mfi_bios_data info; 821 size_t dcmd_size = sizeof(info); 822 823 memset(&info, 0x0, dcmd_size); 824 if (cmd->iov_size < dcmd_size) { 825 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 826 dcmd_size); 827 return MFI_STAT_INVALID_PARAMETER; 828 } 829 info.continue_on_error = 1; 830 info.verbose = 1; 831 if (megasas_is_jbod(s)) { 832 info.expose_all_drives = 1; 833 } 834 835 cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 836 return MFI_STAT_OK; 837 } 838 839 static int megasas_dcmd_get_fw_time(MegasasState *s, MegasasCmd *cmd) 840 { 841 uint64_t fw_time; 842 size_t dcmd_size = sizeof(fw_time); 843 844 fw_time = cpu_to_le64(megasas_fw_time()); 845 846 cmd->iov_size -= dma_buf_read((uint8_t *)&fw_time, dcmd_size, &cmd->qsg); 847 return MFI_STAT_OK; 848 } 849 850 static int megasas_dcmd_set_fw_time(MegasasState *s, MegasasCmd *cmd) 851 { 852 uint64_t fw_time; 853 854 /* This is a dummy; setting of firmware time is not allowed */ 855 memcpy(&fw_time, cmd->frame->dcmd.mbox, sizeof(fw_time)); 856 857 trace_megasas_dcmd_set_fw_time(cmd->index, fw_time); 858 fw_time = cpu_to_le64(megasas_fw_time()); 859 return MFI_STAT_OK; 860 } 861 862 static int megasas_event_info(MegasasState *s, MegasasCmd *cmd) 863 { 864 struct mfi_evt_log_state info; 865 size_t dcmd_size = sizeof(info); 866 867 memset(&info, 0, dcmd_size); 868 869 info.newest_seq_num = cpu_to_le32(s->event_count); 870 info.shutdown_seq_num = cpu_to_le32(s->shutdown_event); 871 info.boot_seq_num = cpu_to_le32(s->boot_event); 872 873 cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 874 return MFI_STAT_OK; 875 } 876 877 static int megasas_event_wait(MegasasState *s, MegasasCmd *cmd) 878 { 879 union mfi_evt event; 880 881 if (cmd->iov_size < sizeof(struct mfi_evt_detail)) { 882 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 883 sizeof(struct mfi_evt_detail)); 884 return MFI_STAT_INVALID_PARAMETER; 885 } 886 s->event_count = cpu_to_le32(cmd->frame->dcmd.mbox[0]); 887 event.word = cpu_to_le32(cmd->frame->dcmd.mbox[4]); 888 s->event_locale = event.members.locale; 889 s->event_class = event.members.class; 890 s->event_cmd = cmd; 891 /* Decrease busy count; event frame doesn't count here */ 892 s->busy--; 893 cmd->iov_size = sizeof(struct mfi_evt_detail); 894 return MFI_STAT_INVALID_STATUS; 895 } 896 897 static int megasas_dcmd_pd_get_list(MegasasState *s, MegasasCmd *cmd) 898 { 899 struct mfi_pd_list info; 900 size_t dcmd_size = sizeof(info); 901 BusChild *kid; 902 uint32_t offset, dcmd_limit, num_pd_disks = 0, max_pd_disks; 903 uint16_t sdev_id; 904 905 memset(&info, 0, dcmd_size); 906 offset = 8; 907 dcmd_limit = offset + sizeof(struct mfi_pd_address); 908 if (cmd->iov_size < dcmd_limit) { 909 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 910 dcmd_limit); 911 return MFI_STAT_INVALID_PARAMETER; 912 } 913 914 max_pd_disks = (cmd->iov_size - offset) / sizeof(struct mfi_pd_address); 915 if (max_pd_disks > s->fw_luns) { 916 max_pd_disks = s->fw_luns; 917 } 918 919 QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { 920 SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child); 921 922 sdev_id = ((sdev->id & 0xFF) >> 8) | (sdev->lun & 0xFF); 923 info.addr[num_pd_disks].device_id = cpu_to_le16(sdev_id); 924 info.addr[num_pd_disks].encl_device_id = 0xFFFF; 925 info.addr[num_pd_disks].encl_index = 0; 926 info.addr[num_pd_disks].slot_number = (sdev->id & 0xFF); 927 info.addr[num_pd_disks].scsi_dev_type = sdev->type; 928 info.addr[num_pd_disks].connect_port_bitmap = 0x1; 929 info.addr[num_pd_disks].sas_addr[0] = 930 cpu_to_le64(megasas_get_sata_addr(sdev_id)); 931 num_pd_disks++; 932 offset += sizeof(struct mfi_pd_address); 933 } 934 trace_megasas_dcmd_pd_get_list(cmd->index, num_pd_disks, 935 max_pd_disks, offset); 936 937 info.size = cpu_to_le32(offset); 938 info.count = cpu_to_le32(num_pd_disks); 939 940 cmd->iov_size -= dma_buf_read((uint8_t *)&info, offset, &cmd->qsg); 941 return MFI_STAT_OK; 942 } 943 944 static int megasas_dcmd_pd_list_query(MegasasState *s, MegasasCmd *cmd) 945 { 946 uint16_t flags; 947 948 /* mbox0 contains flags */ 949 flags = le16_to_cpu(cmd->frame->dcmd.mbox[0]); 950 trace_megasas_dcmd_pd_list_query(cmd->index, flags); 951 if (flags == MR_PD_QUERY_TYPE_ALL || 952 megasas_is_jbod(s)) { 953 return megasas_dcmd_pd_get_list(s, cmd); 954 } 955 956 return MFI_STAT_OK; 957 } 958 959 static int megasas_pd_get_info_submit(SCSIDevice *sdev, int lun, 960 MegasasCmd *cmd) 961 { 962 struct mfi_pd_info *info = cmd->iov_buf; 963 size_t dcmd_size = sizeof(struct mfi_pd_info); 964 BlockConf *conf = &sdev->conf; 965 uint64_t pd_size; 966 uint16_t sdev_id = ((sdev->id & 0xFF) >> 8) | (lun & 0xFF); 967 uint8_t cmdbuf[6]; 968 SCSIRequest *req; 969 size_t len, resid; 970 971 if (!cmd->iov_buf) { 972 cmd->iov_buf = g_malloc(dcmd_size); 973 memset(cmd->iov_buf, 0, dcmd_size); 974 info = cmd->iov_buf; 975 info->inquiry_data[0] = 0x7f; /* Force PQual 0x3, PType 0x1f */ 976 info->vpd_page83[0] = 0x7f; 977 megasas_setup_inquiry(cmdbuf, 0, sizeof(info->inquiry_data)); 978 req = scsi_req_new(sdev, cmd->index, lun, cmdbuf, cmd); 979 if (!req) { 980 trace_megasas_dcmd_req_alloc_failed(cmd->index, 981 "PD get info std inquiry"); 982 g_free(cmd->iov_buf); 983 cmd->iov_buf = NULL; 984 return MFI_STAT_FLASH_ALLOC_FAIL; 985 } 986 trace_megasas_dcmd_internal_submit(cmd->index, 987 "PD get info std inquiry", lun); 988 len = scsi_req_enqueue(req); 989 if (len > 0) { 990 cmd->iov_size = len; 991 scsi_req_continue(req); 992 } 993 return MFI_STAT_INVALID_STATUS; 994 } else if (info->inquiry_data[0] != 0x7f && info->vpd_page83[0] == 0x7f) { 995 megasas_setup_inquiry(cmdbuf, 0x83, sizeof(info->vpd_page83)); 996 req = scsi_req_new(sdev, cmd->index, lun, cmdbuf, cmd); 997 if (!req) { 998 trace_megasas_dcmd_req_alloc_failed(cmd->index, 999 "PD get info vpd inquiry"); 1000 return MFI_STAT_FLASH_ALLOC_FAIL; 1001 } 1002 trace_megasas_dcmd_internal_submit(cmd->index, 1003 "PD get info vpd inquiry", lun); 1004 len = scsi_req_enqueue(req); 1005 if (len > 0) { 1006 cmd->iov_size = len; 1007 scsi_req_continue(req); 1008 } 1009 return MFI_STAT_INVALID_STATUS; 1010 } 1011 /* Finished, set FW state */ 1012 if ((info->inquiry_data[0] >> 5) == 0) { 1013 if (megasas_is_jbod(cmd->state)) { 1014 info->fw_state = cpu_to_le16(MFI_PD_STATE_SYSTEM); 1015 } else { 1016 info->fw_state = cpu_to_le16(MFI_PD_STATE_ONLINE); 1017 } 1018 } else { 1019 info->fw_state = cpu_to_le16(MFI_PD_STATE_OFFLINE); 1020 } 1021 1022 info->ref.v.device_id = cpu_to_le16(sdev_id); 1023 info->state.ddf.pd_type = cpu_to_le16(MFI_PD_DDF_TYPE_IN_VD| 1024 MFI_PD_DDF_TYPE_INTF_SAS); 1025 bdrv_get_geometry(conf->bs, &pd_size); 1026 info->raw_size = cpu_to_le64(pd_size); 1027 info->non_coerced_size = cpu_to_le64(pd_size); 1028 info->coerced_size = cpu_to_le64(pd_size); 1029 info->encl_device_id = 0xFFFF; 1030 info->slot_number = (sdev->id & 0xFF); 1031 info->path_info.count = 1; 1032 info->path_info.sas_addr[0] = 1033 cpu_to_le64(megasas_get_sata_addr(sdev_id)); 1034 info->connected_port_bitmap = 0x1; 1035 info->device_speed = 1; 1036 info->link_speed = 1; 1037 resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg); 1038 g_free(cmd->iov_buf); 1039 cmd->iov_size = dcmd_size - resid; 1040 cmd->iov_buf = NULL; 1041 return MFI_STAT_OK; 1042 } 1043 1044 static int megasas_dcmd_pd_get_info(MegasasState *s, MegasasCmd *cmd) 1045 { 1046 size_t dcmd_size = sizeof(struct mfi_pd_info); 1047 uint16_t pd_id; 1048 SCSIDevice *sdev = NULL; 1049 int retval = MFI_STAT_DEVICE_NOT_FOUND; 1050 1051 if (cmd->iov_size < dcmd_size) { 1052 return MFI_STAT_INVALID_PARAMETER; 1053 } 1054 1055 /* mbox0 has the ID */ 1056 pd_id = le16_to_cpu(cmd->frame->dcmd.mbox[0]); 1057 sdev = scsi_device_find(&s->bus, 0, pd_id, 0); 1058 trace_megasas_dcmd_pd_get_info(cmd->index, pd_id); 1059 1060 if (sdev) { 1061 /* Submit inquiry */ 1062 retval = megasas_pd_get_info_submit(sdev, pd_id, cmd); 1063 } 1064 1065 return retval; 1066 } 1067 1068 static int megasas_dcmd_ld_get_list(MegasasState *s, MegasasCmd *cmd) 1069 { 1070 struct mfi_ld_list info; 1071 size_t dcmd_size = sizeof(info), resid; 1072 uint32_t num_ld_disks = 0, max_ld_disks = s->fw_luns; 1073 uint64_t ld_size; 1074 BusChild *kid; 1075 1076 memset(&info, 0, dcmd_size); 1077 if (cmd->iov_size < dcmd_size) { 1078 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 1079 dcmd_size); 1080 return MFI_STAT_INVALID_PARAMETER; 1081 } 1082 1083 if (megasas_is_jbod(s)) { 1084 max_ld_disks = 0; 1085 } 1086 QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { 1087 SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child); 1088 BlockConf *conf = &sdev->conf; 1089 1090 if (num_ld_disks >= max_ld_disks) { 1091 break; 1092 } 1093 /* Logical device size is in blocks */ 1094 bdrv_get_geometry(conf->bs, &ld_size); 1095 info.ld_list[num_ld_disks].ld.v.target_id = sdev->id; 1096 info.ld_list[num_ld_disks].ld.v.lun_id = sdev->lun; 1097 info.ld_list[num_ld_disks].state = MFI_LD_STATE_OPTIMAL; 1098 info.ld_list[num_ld_disks].size = cpu_to_le64(ld_size); 1099 num_ld_disks++; 1100 } 1101 info.ld_count = cpu_to_le32(num_ld_disks); 1102 trace_megasas_dcmd_ld_get_list(cmd->index, num_ld_disks, max_ld_disks); 1103 1104 resid = dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 1105 cmd->iov_size = dcmd_size - resid; 1106 return MFI_STAT_OK; 1107 } 1108 1109 static int megasas_dcmd_ld_list_query(MegasasState *s, MegasasCmd *cmd) 1110 { 1111 uint16_t flags; 1112 1113 /* mbox0 contains flags */ 1114 flags = le16_to_cpu(cmd->frame->dcmd.mbox[0]); 1115 trace_megasas_dcmd_ld_list_query(cmd->index, flags); 1116 if (flags == MR_LD_QUERY_TYPE_ALL || 1117 flags == MR_LD_QUERY_TYPE_EXPOSED_TO_HOST) { 1118 return megasas_dcmd_ld_get_list(s, cmd); 1119 } 1120 1121 return MFI_STAT_OK; 1122 } 1123 1124 static int megasas_ld_get_info_submit(SCSIDevice *sdev, int lun, 1125 MegasasCmd *cmd) 1126 { 1127 struct mfi_ld_info *info = cmd->iov_buf; 1128 size_t dcmd_size = sizeof(struct mfi_ld_info); 1129 uint8_t cdb[6]; 1130 SCSIRequest *req; 1131 ssize_t len, resid; 1132 BlockConf *conf = &sdev->conf; 1133 uint16_t sdev_id = ((sdev->id & 0xFF) >> 8) | (lun & 0xFF); 1134 uint64_t ld_size; 1135 1136 if (!cmd->iov_buf) { 1137 cmd->iov_buf = g_malloc(dcmd_size); 1138 memset(cmd->iov_buf, 0x0, dcmd_size); 1139 info = cmd->iov_buf; 1140 megasas_setup_inquiry(cdb, 0x83, sizeof(info->vpd_page83)); 1141 req = scsi_req_new(sdev, cmd->index, lun, cdb, cmd); 1142 if (!req) { 1143 trace_megasas_dcmd_req_alloc_failed(cmd->index, 1144 "LD get info vpd inquiry"); 1145 g_free(cmd->iov_buf); 1146 cmd->iov_buf = NULL; 1147 return MFI_STAT_FLASH_ALLOC_FAIL; 1148 } 1149 trace_megasas_dcmd_internal_submit(cmd->index, 1150 "LD get info vpd inquiry", lun); 1151 len = scsi_req_enqueue(req); 1152 if (len > 0) { 1153 cmd->iov_size = len; 1154 scsi_req_continue(req); 1155 } 1156 return MFI_STAT_INVALID_STATUS; 1157 } 1158 1159 info->ld_config.params.state = MFI_LD_STATE_OPTIMAL; 1160 info->ld_config.properties.ld.v.target_id = lun; 1161 info->ld_config.params.stripe_size = 3; 1162 info->ld_config.params.num_drives = 1; 1163 info->ld_config.params.is_consistent = 1; 1164 /* Logical device size is in blocks */ 1165 bdrv_get_geometry(conf->bs, &ld_size); 1166 info->size = cpu_to_le64(ld_size); 1167 memset(info->ld_config.span, 0, sizeof(info->ld_config.span)); 1168 info->ld_config.span[0].start_block = 0; 1169 info->ld_config.span[0].num_blocks = info->size; 1170 info->ld_config.span[0].array_ref = cpu_to_le16(sdev_id); 1171 1172 resid = dma_buf_read(cmd->iov_buf, dcmd_size, &cmd->qsg); 1173 g_free(cmd->iov_buf); 1174 cmd->iov_size = dcmd_size - resid; 1175 cmd->iov_buf = NULL; 1176 return MFI_STAT_OK; 1177 } 1178 1179 static int megasas_dcmd_ld_get_info(MegasasState *s, MegasasCmd *cmd) 1180 { 1181 struct mfi_ld_info info; 1182 size_t dcmd_size = sizeof(info); 1183 uint16_t ld_id; 1184 uint32_t max_ld_disks = s->fw_luns; 1185 SCSIDevice *sdev = NULL; 1186 int retval = MFI_STAT_DEVICE_NOT_FOUND; 1187 1188 if (cmd->iov_size < dcmd_size) { 1189 return MFI_STAT_INVALID_PARAMETER; 1190 } 1191 1192 /* mbox0 has the ID */ 1193 ld_id = le16_to_cpu(cmd->frame->dcmd.mbox[0]); 1194 trace_megasas_dcmd_ld_get_info(cmd->index, ld_id); 1195 1196 if (megasas_is_jbod(s)) { 1197 return MFI_STAT_DEVICE_NOT_FOUND; 1198 } 1199 1200 if (ld_id < max_ld_disks) { 1201 sdev = scsi_device_find(&s->bus, 0, ld_id, 0); 1202 } 1203 1204 if (sdev) { 1205 retval = megasas_ld_get_info_submit(sdev, ld_id, cmd); 1206 } 1207 1208 return retval; 1209 } 1210 1211 static int megasas_dcmd_cfg_read(MegasasState *s, MegasasCmd *cmd) 1212 { 1213 uint8_t data[4096]; 1214 struct mfi_config_data *info; 1215 int num_pd_disks = 0, array_offset, ld_offset; 1216 BusChild *kid; 1217 1218 if (cmd->iov_size > 4096) { 1219 return MFI_STAT_INVALID_PARAMETER; 1220 } 1221 1222 QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { 1223 num_pd_disks++; 1224 } 1225 info = (struct mfi_config_data *)&data; 1226 /* 1227 * Array mapping: 1228 * - One array per SCSI device 1229 * - One logical drive per SCSI device 1230 * spanning the entire device 1231 */ 1232 info->array_count = num_pd_disks; 1233 info->array_size = sizeof(struct mfi_array) * num_pd_disks; 1234 info->log_drv_count = num_pd_disks; 1235 info->log_drv_size = sizeof(struct mfi_ld_config) * num_pd_disks; 1236 info->spares_count = 0; 1237 info->spares_size = sizeof(struct mfi_spare); 1238 info->size = sizeof(struct mfi_config_data) + info->array_size + 1239 info->log_drv_size; 1240 if (info->size > 4096) { 1241 return MFI_STAT_INVALID_PARAMETER; 1242 } 1243 1244 array_offset = sizeof(struct mfi_config_data); 1245 ld_offset = array_offset + sizeof(struct mfi_array) * num_pd_disks; 1246 1247 QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { 1248 SCSIDevice *sdev = DO_UPCAST(SCSIDevice, qdev, kid->child); 1249 BlockConf *conf = &sdev->conf; 1250 uint16_t sdev_id = ((sdev->id & 0xFF) >> 8) | (sdev->lun & 0xFF); 1251 struct mfi_array *array; 1252 struct mfi_ld_config *ld; 1253 uint64_t pd_size; 1254 int i; 1255 1256 array = (struct mfi_array *)(data + array_offset); 1257 bdrv_get_geometry(conf->bs, &pd_size); 1258 array->size = cpu_to_le64(pd_size); 1259 array->num_drives = 1; 1260 array->array_ref = cpu_to_le16(sdev_id); 1261 array->pd[0].ref.v.device_id = cpu_to_le16(sdev_id); 1262 array->pd[0].ref.v.seq_num = 0; 1263 array->pd[0].fw_state = MFI_PD_STATE_ONLINE; 1264 array->pd[0].encl.pd = 0xFF; 1265 array->pd[0].encl.slot = (sdev->id & 0xFF); 1266 for (i = 1; i < MFI_MAX_ROW_SIZE; i++) { 1267 array->pd[i].ref.v.device_id = 0xFFFF; 1268 array->pd[i].ref.v.seq_num = 0; 1269 array->pd[i].fw_state = MFI_PD_STATE_UNCONFIGURED_GOOD; 1270 array->pd[i].encl.pd = 0xFF; 1271 array->pd[i].encl.slot = 0xFF; 1272 } 1273 array_offset += sizeof(struct mfi_array); 1274 ld = (struct mfi_ld_config *)(data + ld_offset); 1275 memset(ld, 0, sizeof(struct mfi_ld_config)); 1276 ld->properties.ld.v.target_id = (sdev->id & 0xFF); 1277 ld->properties.default_cache_policy = MR_LD_CACHE_READ_AHEAD | 1278 MR_LD_CACHE_READ_ADAPTIVE; 1279 ld->properties.current_cache_policy = MR_LD_CACHE_READ_AHEAD | 1280 MR_LD_CACHE_READ_ADAPTIVE; 1281 ld->params.state = MFI_LD_STATE_OPTIMAL; 1282 ld->params.stripe_size = 3; 1283 ld->params.num_drives = 1; 1284 ld->params.span_depth = 1; 1285 ld->params.is_consistent = 1; 1286 ld->span[0].start_block = 0; 1287 ld->span[0].num_blocks = cpu_to_le64(pd_size); 1288 ld->span[0].array_ref = cpu_to_le16(sdev_id); 1289 ld_offset += sizeof(struct mfi_ld_config); 1290 } 1291 1292 cmd->iov_size -= dma_buf_read((uint8_t *)data, info->size, &cmd->qsg); 1293 return MFI_STAT_OK; 1294 } 1295 1296 static int megasas_dcmd_get_properties(MegasasState *s, MegasasCmd *cmd) 1297 { 1298 struct mfi_ctrl_props info; 1299 size_t dcmd_size = sizeof(info); 1300 1301 memset(&info, 0x0, dcmd_size); 1302 if (cmd->iov_size < dcmd_size) { 1303 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 1304 dcmd_size); 1305 return MFI_STAT_INVALID_PARAMETER; 1306 } 1307 info.pred_fail_poll_interval = cpu_to_le16(300); 1308 info.intr_throttle_cnt = cpu_to_le16(16); 1309 info.intr_throttle_timeout = cpu_to_le16(50); 1310 info.rebuild_rate = 30; 1311 info.patrol_read_rate = 30; 1312 info.bgi_rate = 30; 1313 info.cc_rate = 30; 1314 info.recon_rate = 30; 1315 info.cache_flush_interval = 4; 1316 info.spinup_drv_cnt = 2; 1317 info.spinup_delay = 6; 1318 info.ecc_bucket_size = 15; 1319 info.ecc_bucket_leak_rate = cpu_to_le16(1440); 1320 info.expose_encl_devices = 1; 1321 1322 cmd->iov_size -= dma_buf_read((uint8_t *)&info, dcmd_size, &cmd->qsg); 1323 return MFI_STAT_OK; 1324 } 1325 1326 static int megasas_cache_flush(MegasasState *s, MegasasCmd *cmd) 1327 { 1328 bdrv_drain_all(); 1329 return MFI_STAT_OK; 1330 } 1331 1332 static int megasas_ctrl_shutdown(MegasasState *s, MegasasCmd *cmd) 1333 { 1334 s->fw_state = MFI_FWSTATE_READY; 1335 return MFI_STAT_OK; 1336 } 1337 1338 static int megasas_cluster_reset_ld(MegasasState *s, MegasasCmd *cmd) 1339 { 1340 return MFI_STAT_INVALID_DCMD; 1341 } 1342 1343 static int megasas_dcmd_set_properties(MegasasState *s, MegasasCmd *cmd) 1344 { 1345 struct mfi_ctrl_props info; 1346 size_t dcmd_size = sizeof(info); 1347 1348 if (cmd->iov_size < dcmd_size) { 1349 trace_megasas_dcmd_invalid_xfer_len(cmd->index, cmd->iov_size, 1350 dcmd_size); 1351 return MFI_STAT_INVALID_PARAMETER; 1352 } 1353 dma_buf_write((uint8_t *)&info, cmd->iov_size, &cmd->qsg); 1354 trace_megasas_dcmd_unsupported(cmd->index, cmd->iov_size); 1355 return MFI_STAT_OK; 1356 } 1357 1358 static int megasas_dcmd_dummy(MegasasState *s, MegasasCmd *cmd) 1359 { 1360 trace_megasas_dcmd_dummy(cmd->index, cmd->iov_size); 1361 return MFI_STAT_OK; 1362 } 1363 1364 static const struct dcmd_cmd_tbl_t { 1365 int opcode; 1366 const char *desc; 1367 int (*func)(MegasasState *s, MegasasCmd *cmd); 1368 } dcmd_cmd_tbl[] = { 1369 { MFI_DCMD_CTRL_MFI_HOST_MEM_ALLOC, "CTRL_HOST_MEM_ALLOC", 1370 megasas_dcmd_dummy }, 1371 { MFI_DCMD_CTRL_GET_INFO, "CTRL_GET_INFO", 1372 megasas_ctrl_get_info }, 1373 { MFI_DCMD_CTRL_GET_PROPERTIES, "CTRL_GET_PROPERTIES", 1374 megasas_dcmd_get_properties }, 1375 { MFI_DCMD_CTRL_SET_PROPERTIES, "CTRL_SET_PROPERTIES", 1376 megasas_dcmd_set_properties }, 1377 { MFI_DCMD_CTRL_ALARM_GET, "CTRL_ALARM_GET", 1378 megasas_dcmd_dummy }, 1379 { MFI_DCMD_CTRL_ALARM_ENABLE, "CTRL_ALARM_ENABLE", 1380 megasas_dcmd_dummy }, 1381 { MFI_DCMD_CTRL_ALARM_DISABLE, "CTRL_ALARM_DISABLE", 1382 megasas_dcmd_dummy }, 1383 { MFI_DCMD_CTRL_ALARM_SILENCE, "CTRL_ALARM_SILENCE", 1384 megasas_dcmd_dummy }, 1385 { MFI_DCMD_CTRL_ALARM_TEST, "CTRL_ALARM_TEST", 1386 megasas_dcmd_dummy }, 1387 { MFI_DCMD_CTRL_EVENT_GETINFO, "CTRL_EVENT_GETINFO", 1388 megasas_event_info }, 1389 { MFI_DCMD_CTRL_EVENT_GET, "CTRL_EVENT_GET", 1390 megasas_dcmd_dummy }, 1391 { MFI_DCMD_CTRL_EVENT_WAIT, "CTRL_EVENT_WAIT", 1392 megasas_event_wait }, 1393 { MFI_DCMD_CTRL_SHUTDOWN, "CTRL_SHUTDOWN", 1394 megasas_ctrl_shutdown }, 1395 { MFI_DCMD_HIBERNATE_STANDBY, "CTRL_STANDBY", 1396 megasas_dcmd_dummy }, 1397 { MFI_DCMD_CTRL_GET_TIME, "CTRL_GET_TIME", 1398 megasas_dcmd_get_fw_time }, 1399 { MFI_DCMD_CTRL_SET_TIME, "CTRL_SET_TIME", 1400 megasas_dcmd_set_fw_time }, 1401 { MFI_DCMD_CTRL_BIOS_DATA_GET, "CTRL_BIOS_DATA_GET", 1402 megasas_dcmd_get_bios_info }, 1403 { MFI_DCMD_CTRL_FACTORY_DEFAULTS, "CTRL_FACTORY_DEFAULTS", 1404 megasas_dcmd_dummy }, 1405 { MFI_DCMD_CTRL_MFC_DEFAULTS_GET, "CTRL_MFC_DEFAULTS_GET", 1406 megasas_mfc_get_defaults }, 1407 { MFI_DCMD_CTRL_MFC_DEFAULTS_SET, "CTRL_MFC_DEFAULTS_SET", 1408 megasas_dcmd_dummy }, 1409 { MFI_DCMD_CTRL_CACHE_FLUSH, "CTRL_CACHE_FLUSH", 1410 megasas_cache_flush }, 1411 { MFI_DCMD_PD_GET_LIST, "PD_GET_LIST", 1412 megasas_dcmd_pd_get_list }, 1413 { MFI_DCMD_PD_LIST_QUERY, "PD_LIST_QUERY", 1414 megasas_dcmd_pd_list_query }, 1415 { MFI_DCMD_PD_GET_INFO, "PD_GET_INFO", 1416 megasas_dcmd_pd_get_info }, 1417 { MFI_DCMD_PD_STATE_SET, "PD_STATE_SET", 1418 megasas_dcmd_dummy }, 1419 { MFI_DCMD_PD_REBUILD, "PD_REBUILD", 1420 megasas_dcmd_dummy }, 1421 { MFI_DCMD_PD_BLINK, "PD_BLINK", 1422 megasas_dcmd_dummy }, 1423 { MFI_DCMD_PD_UNBLINK, "PD_UNBLINK", 1424 megasas_dcmd_dummy }, 1425 { MFI_DCMD_LD_GET_LIST, "LD_GET_LIST", 1426 megasas_dcmd_ld_get_list}, 1427 { MFI_DCMD_LD_LIST_QUERY, "LD_LIST_QUERY", 1428 megasas_dcmd_ld_list_query }, 1429 { MFI_DCMD_LD_GET_INFO, "LD_GET_INFO", 1430 megasas_dcmd_ld_get_info }, 1431 { MFI_DCMD_LD_GET_PROP, "LD_GET_PROP", 1432 megasas_dcmd_dummy }, 1433 { MFI_DCMD_LD_SET_PROP, "LD_SET_PROP", 1434 megasas_dcmd_dummy }, 1435 { MFI_DCMD_LD_DELETE, "LD_DELETE", 1436 megasas_dcmd_dummy }, 1437 { MFI_DCMD_CFG_READ, "CFG_READ", 1438 megasas_dcmd_cfg_read }, 1439 { MFI_DCMD_CFG_ADD, "CFG_ADD", 1440 megasas_dcmd_dummy }, 1441 { MFI_DCMD_CFG_CLEAR, "CFG_CLEAR", 1442 megasas_dcmd_dummy }, 1443 { MFI_DCMD_CFG_FOREIGN_READ, "CFG_FOREIGN_READ", 1444 megasas_dcmd_dummy }, 1445 { MFI_DCMD_CFG_FOREIGN_IMPORT, "CFG_FOREIGN_IMPORT", 1446 megasas_dcmd_dummy }, 1447 { MFI_DCMD_BBU_STATUS, "BBU_STATUS", 1448 megasas_dcmd_dummy }, 1449 { MFI_DCMD_BBU_CAPACITY_INFO, "BBU_CAPACITY_INFO", 1450 megasas_dcmd_dummy }, 1451 { MFI_DCMD_BBU_DESIGN_INFO, "BBU_DESIGN_INFO", 1452 megasas_dcmd_dummy }, 1453 { MFI_DCMD_BBU_PROP_GET, "BBU_PROP_GET", 1454 megasas_dcmd_dummy }, 1455 { MFI_DCMD_CLUSTER, "CLUSTER", 1456 megasas_dcmd_dummy }, 1457 { MFI_DCMD_CLUSTER_RESET_ALL, "CLUSTER_RESET_ALL", 1458 megasas_dcmd_dummy }, 1459 { MFI_DCMD_CLUSTER_RESET_LD, "CLUSTER_RESET_LD", 1460 megasas_cluster_reset_ld }, 1461 { -1, NULL, NULL } 1462 }; 1463 1464 static int megasas_handle_dcmd(MegasasState *s, MegasasCmd *cmd) 1465 { 1466 int opcode, len; 1467 int retval = 0; 1468 const struct dcmd_cmd_tbl_t *cmdptr = dcmd_cmd_tbl; 1469 1470 opcode = le32_to_cpu(cmd->frame->dcmd.opcode); 1471 trace_megasas_handle_dcmd(cmd->index, opcode); 1472 len = megasas_map_dcmd(s, cmd); 1473 if (len < 0) { 1474 return MFI_STAT_MEMORY_NOT_AVAILABLE; 1475 } 1476 while (cmdptr->opcode != -1 && cmdptr->opcode != opcode) { 1477 cmdptr++; 1478 } 1479 if (cmdptr->opcode == -1) { 1480 trace_megasas_dcmd_unhandled(cmd->index, opcode, len); 1481 retval = megasas_dcmd_dummy(s, cmd); 1482 } else { 1483 trace_megasas_dcmd_enter(cmd->index, cmdptr->desc, len); 1484 retval = cmdptr->func(s, cmd); 1485 } 1486 if (retval != MFI_STAT_INVALID_STATUS) { 1487 megasas_finish_dcmd(cmd, len); 1488 } 1489 return retval; 1490 } 1491 1492 static int megasas_finish_internal_dcmd(MegasasCmd *cmd, 1493 SCSIRequest *req) 1494 { 1495 int opcode; 1496 int retval = MFI_STAT_OK; 1497 int lun = req->lun; 1498 1499 opcode = le32_to_cpu(cmd->frame->dcmd.opcode); 1500 scsi_req_unref(req); 1501 trace_megasas_dcmd_internal_finish(cmd->index, opcode, lun); 1502 switch (opcode) { 1503 case MFI_DCMD_PD_GET_INFO: 1504 retval = megasas_pd_get_info_submit(req->dev, lun, cmd); 1505 break; 1506 case MFI_DCMD_LD_GET_INFO: 1507 retval = megasas_ld_get_info_submit(req->dev, lun, cmd); 1508 break; 1509 default: 1510 trace_megasas_dcmd_internal_invalid(cmd->index, opcode); 1511 retval = MFI_STAT_INVALID_DCMD; 1512 break; 1513 } 1514 if (retval != MFI_STAT_INVALID_STATUS) { 1515 megasas_finish_dcmd(cmd, cmd->iov_size); 1516 } 1517 return retval; 1518 } 1519 1520 static int megasas_enqueue_req(MegasasCmd *cmd, bool is_write) 1521 { 1522 int len; 1523 1524 len = scsi_req_enqueue(cmd->req); 1525 if (len < 0) { 1526 len = -len; 1527 } 1528 if (len > 0) { 1529 if (len > cmd->iov_size) { 1530 if (is_write) { 1531 trace_megasas_iov_write_overflow(cmd->index, len, 1532 cmd->iov_size); 1533 } else { 1534 trace_megasas_iov_read_overflow(cmd->index, len, 1535 cmd->iov_size); 1536 } 1537 } 1538 if (len < cmd->iov_size) { 1539 if (is_write) { 1540 trace_megasas_iov_write_underflow(cmd->index, len, 1541 cmd->iov_size); 1542 } else { 1543 trace_megasas_iov_read_underflow(cmd->index, len, 1544 cmd->iov_size); 1545 } 1546 cmd->iov_size = len; 1547 } 1548 scsi_req_continue(cmd->req); 1549 } 1550 return len; 1551 } 1552 1553 static int megasas_handle_scsi(MegasasState *s, MegasasCmd *cmd, 1554 bool is_logical) 1555 { 1556 uint8_t *cdb; 1557 int len; 1558 bool is_write; 1559 struct SCSIDevice *sdev = NULL; 1560 1561 cdb = cmd->frame->pass.cdb; 1562 1563 if (cmd->frame->header.target_id < s->fw_luns) { 1564 sdev = scsi_device_find(&s->bus, 0, cmd->frame->header.target_id, 1565 cmd->frame->header.lun_id); 1566 } 1567 cmd->iov_size = le32_to_cpu(cmd->frame->header.data_len); 1568 trace_megasas_handle_scsi(mfi_frame_desc[cmd->frame->header.frame_cmd], 1569 is_logical, cmd->frame->header.target_id, 1570 cmd->frame->header.lun_id, sdev, cmd->iov_size); 1571 1572 if (!sdev || (megasas_is_jbod(s) && is_logical)) { 1573 trace_megasas_scsi_target_not_present( 1574 mfi_frame_desc[cmd->frame->header.frame_cmd], is_logical, 1575 cmd->frame->header.target_id, cmd->frame->header.lun_id); 1576 return MFI_STAT_DEVICE_NOT_FOUND; 1577 } 1578 1579 if (cmd->frame->header.cdb_len > 16) { 1580 trace_megasas_scsi_invalid_cdb_len( 1581 mfi_frame_desc[cmd->frame->header.frame_cmd], is_logical, 1582 cmd->frame->header.target_id, cmd->frame->header.lun_id, 1583 cmd->frame->header.cdb_len); 1584 megasas_write_sense(cmd, SENSE_CODE(INVALID_OPCODE)); 1585 cmd->frame->header.scsi_status = CHECK_CONDITION; 1586 s->event_count++; 1587 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1588 } 1589 1590 if (megasas_map_sgl(s, cmd, &cmd->frame->pass.sgl)) { 1591 megasas_write_sense(cmd, SENSE_CODE(TARGET_FAILURE)); 1592 cmd->frame->header.scsi_status = CHECK_CONDITION; 1593 s->event_count++; 1594 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1595 } 1596 1597 cmd->req = scsi_req_new(sdev, cmd->index, 1598 cmd->frame->header.lun_id, cdb, cmd); 1599 if (!cmd->req) { 1600 trace_megasas_scsi_req_alloc_failed( 1601 mfi_frame_desc[cmd->frame->header.frame_cmd], 1602 cmd->frame->header.target_id, cmd->frame->header.lun_id); 1603 megasas_write_sense(cmd, SENSE_CODE(NO_SENSE)); 1604 cmd->frame->header.scsi_status = BUSY; 1605 s->event_count++; 1606 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1607 } 1608 1609 is_write = (cmd->req->cmd.mode == SCSI_XFER_TO_DEV); 1610 len = megasas_enqueue_req(cmd, is_write); 1611 if (len > 0) { 1612 if (is_write) { 1613 trace_megasas_scsi_write_start(cmd->index, len); 1614 } else { 1615 trace_megasas_scsi_read_start(cmd->index, len); 1616 } 1617 } else { 1618 trace_megasas_scsi_nodata(cmd->index); 1619 } 1620 return MFI_STAT_INVALID_STATUS; 1621 } 1622 1623 static int megasas_handle_io(MegasasState *s, MegasasCmd *cmd) 1624 { 1625 uint32_t lba_count, lba_start_hi, lba_start_lo; 1626 uint64_t lba_start; 1627 bool is_write = (cmd->frame->header.frame_cmd == MFI_CMD_LD_WRITE); 1628 uint8_t cdb[16]; 1629 int len; 1630 struct SCSIDevice *sdev = NULL; 1631 1632 lba_count = le32_to_cpu(cmd->frame->io.header.data_len); 1633 lba_start_lo = le32_to_cpu(cmd->frame->io.lba_lo); 1634 lba_start_hi = le32_to_cpu(cmd->frame->io.lba_hi); 1635 lba_start = ((uint64_t)lba_start_hi << 32) | lba_start_lo; 1636 1637 if (cmd->frame->header.target_id < s->fw_luns) { 1638 sdev = scsi_device_find(&s->bus, 0, cmd->frame->header.target_id, 1639 cmd->frame->header.lun_id); 1640 } 1641 1642 trace_megasas_handle_io(cmd->index, 1643 mfi_frame_desc[cmd->frame->header.frame_cmd], 1644 cmd->frame->header.target_id, 1645 cmd->frame->header.lun_id, 1646 (unsigned long)lba_start, (unsigned long)lba_count); 1647 if (!sdev) { 1648 trace_megasas_io_target_not_present(cmd->index, 1649 mfi_frame_desc[cmd->frame->header.frame_cmd], 1650 cmd->frame->header.target_id, cmd->frame->header.lun_id); 1651 return MFI_STAT_DEVICE_NOT_FOUND; 1652 } 1653 1654 if (cmd->frame->header.cdb_len > 16) { 1655 trace_megasas_scsi_invalid_cdb_len( 1656 mfi_frame_desc[cmd->frame->header.frame_cmd], 1, 1657 cmd->frame->header.target_id, cmd->frame->header.lun_id, 1658 cmd->frame->header.cdb_len); 1659 megasas_write_sense(cmd, SENSE_CODE(INVALID_OPCODE)); 1660 cmd->frame->header.scsi_status = CHECK_CONDITION; 1661 s->event_count++; 1662 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1663 } 1664 1665 cmd->iov_size = lba_count * sdev->blocksize; 1666 if (megasas_map_sgl(s, cmd, &cmd->frame->io.sgl)) { 1667 megasas_write_sense(cmd, SENSE_CODE(TARGET_FAILURE)); 1668 cmd->frame->header.scsi_status = CHECK_CONDITION; 1669 s->event_count++; 1670 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1671 } 1672 1673 megasas_encode_lba(cdb, lba_start, lba_count, is_write); 1674 cmd->req = scsi_req_new(sdev, cmd->index, 1675 cmd->frame->header.lun_id, cdb, cmd); 1676 if (!cmd->req) { 1677 trace_megasas_scsi_req_alloc_failed( 1678 mfi_frame_desc[cmd->frame->header.frame_cmd], 1679 cmd->frame->header.target_id, cmd->frame->header.lun_id); 1680 megasas_write_sense(cmd, SENSE_CODE(NO_SENSE)); 1681 cmd->frame->header.scsi_status = BUSY; 1682 s->event_count++; 1683 return MFI_STAT_SCSI_DONE_WITH_ERROR; 1684 } 1685 len = megasas_enqueue_req(cmd, is_write); 1686 if (len > 0) { 1687 if (is_write) { 1688 trace_megasas_io_write_start(cmd->index, lba_start, lba_count, len); 1689 } else { 1690 trace_megasas_io_read_start(cmd->index, lba_start, lba_count, len); 1691 } 1692 } 1693 return MFI_STAT_INVALID_STATUS; 1694 } 1695 1696 static int megasas_finish_internal_command(MegasasCmd *cmd, 1697 SCSIRequest *req, size_t resid) 1698 { 1699 int retval = MFI_STAT_INVALID_CMD; 1700 1701 if (cmd->frame->header.frame_cmd == MFI_CMD_DCMD) { 1702 cmd->iov_size -= resid; 1703 retval = megasas_finish_internal_dcmd(cmd, req); 1704 } 1705 return retval; 1706 } 1707 1708 static QEMUSGList *megasas_get_sg_list(SCSIRequest *req) 1709 { 1710 MegasasCmd *cmd = req->hba_private; 1711 1712 if (cmd->frame->header.frame_cmd == MFI_CMD_DCMD) { 1713 return NULL; 1714 } else { 1715 return &cmd->qsg; 1716 } 1717 } 1718 1719 static void megasas_xfer_complete(SCSIRequest *req, uint32_t len) 1720 { 1721 MegasasCmd *cmd = req->hba_private; 1722 uint8_t *buf; 1723 uint32_t opcode; 1724 1725 trace_megasas_io_complete(cmd->index, len); 1726 1727 if (cmd->frame->header.frame_cmd != MFI_CMD_DCMD) { 1728 scsi_req_continue(req); 1729 return; 1730 } 1731 1732 buf = scsi_req_get_buf(req); 1733 opcode = le32_to_cpu(cmd->frame->dcmd.opcode); 1734 if (opcode == MFI_DCMD_PD_GET_INFO && cmd->iov_buf) { 1735 struct mfi_pd_info *info = cmd->iov_buf; 1736 1737 if (info->inquiry_data[0] == 0x7f) { 1738 memset(info->inquiry_data, 0, sizeof(info->inquiry_data)); 1739 memcpy(info->inquiry_data, buf, len); 1740 } else if (info->vpd_page83[0] == 0x7f) { 1741 memset(info->vpd_page83, 0, sizeof(info->vpd_page83)); 1742 memcpy(info->vpd_page83, buf, len); 1743 } 1744 scsi_req_continue(req); 1745 } else if (opcode == MFI_DCMD_LD_GET_INFO) { 1746 struct mfi_ld_info *info = cmd->iov_buf; 1747 1748 if (cmd->iov_buf) { 1749 memcpy(info->vpd_page83, buf, sizeof(info->vpd_page83)); 1750 scsi_req_continue(req); 1751 } 1752 } 1753 } 1754 1755 static void megasas_command_complete(SCSIRequest *req, uint32_t status, 1756 size_t resid) 1757 { 1758 MegasasCmd *cmd = req->hba_private; 1759 uint8_t cmd_status = MFI_STAT_OK; 1760 1761 trace_megasas_command_complete(cmd->index, status, resid); 1762 1763 if (cmd->req != req) { 1764 /* 1765 * Internal command complete 1766 */ 1767 cmd_status = megasas_finish_internal_command(cmd, req, resid); 1768 if (cmd_status == MFI_STAT_INVALID_STATUS) { 1769 return; 1770 } 1771 } else { 1772 req->status = status; 1773 trace_megasas_scsi_complete(cmd->index, req->status, 1774 cmd->iov_size, req->cmd.xfer); 1775 if (req->status != GOOD) { 1776 cmd_status = MFI_STAT_SCSI_DONE_WITH_ERROR; 1777 } 1778 if (req->status == CHECK_CONDITION) { 1779 megasas_copy_sense(cmd); 1780 } 1781 1782 megasas_unmap_sgl(cmd); 1783 cmd->frame->header.scsi_status = req->status; 1784 scsi_req_unref(cmd->req); 1785 cmd->req = NULL; 1786 } 1787 cmd->frame->header.cmd_status = cmd_status; 1788 megasas_complete_frame(cmd->state, cmd->context); 1789 } 1790 1791 static void megasas_command_cancel(SCSIRequest *req) 1792 { 1793 MegasasCmd *cmd = req->hba_private; 1794 1795 if (cmd) { 1796 megasas_abort_command(cmd); 1797 } else { 1798 scsi_req_unref(req); 1799 } 1800 } 1801 1802 static int megasas_handle_abort(MegasasState *s, MegasasCmd *cmd) 1803 { 1804 uint64_t abort_ctx = le64_to_cpu(cmd->frame->abort.abort_context); 1805 hwaddr abort_addr, addr_hi, addr_lo; 1806 MegasasCmd *abort_cmd; 1807 1808 addr_hi = le32_to_cpu(cmd->frame->abort.abort_mfi_addr_hi); 1809 addr_lo = le32_to_cpu(cmd->frame->abort.abort_mfi_addr_lo); 1810 abort_addr = ((uint64_t)addr_hi << 32) | addr_lo; 1811 1812 abort_cmd = megasas_lookup_frame(s, abort_addr); 1813 if (!abort_cmd) { 1814 trace_megasas_abort_no_cmd(cmd->index, abort_ctx); 1815 s->event_count++; 1816 return MFI_STAT_OK; 1817 } 1818 if (!megasas_use_queue64(s)) { 1819 abort_ctx &= (uint64_t)0xFFFFFFFF; 1820 } 1821 if (abort_cmd->context != abort_ctx) { 1822 trace_megasas_abort_invalid_context(cmd->index, abort_cmd->index, 1823 abort_cmd->context); 1824 s->event_count++; 1825 return MFI_STAT_ABORT_NOT_POSSIBLE; 1826 } 1827 trace_megasas_abort_frame(cmd->index, abort_cmd->index); 1828 megasas_abort_command(abort_cmd); 1829 if (!s->event_cmd || abort_cmd != s->event_cmd) { 1830 s->event_cmd = NULL; 1831 } 1832 s->event_count++; 1833 return MFI_STAT_OK; 1834 } 1835 1836 static void megasas_handle_frame(MegasasState *s, uint64_t frame_addr, 1837 uint32_t frame_count) 1838 { 1839 uint8_t frame_status = MFI_STAT_INVALID_CMD; 1840 uint64_t frame_context; 1841 MegasasCmd *cmd; 1842 1843 /* 1844 * Always read 64bit context, top bits will be 1845 * masked out if required in megasas_enqueue_frame() 1846 */ 1847 frame_context = megasas_frame_get_context(frame_addr); 1848 1849 cmd = megasas_enqueue_frame(s, frame_addr, frame_context, frame_count); 1850 if (!cmd) { 1851 /* reply queue full */ 1852 trace_megasas_frame_busy(frame_addr); 1853 megasas_frame_set_scsi_status(frame_addr, BUSY); 1854 megasas_frame_set_cmd_status(frame_addr, MFI_STAT_SCSI_DONE_WITH_ERROR); 1855 megasas_complete_frame(s, frame_context); 1856 s->event_count++; 1857 return; 1858 } 1859 switch (cmd->frame->header.frame_cmd) { 1860 case MFI_CMD_INIT: 1861 frame_status = megasas_init_firmware(s, cmd); 1862 break; 1863 case MFI_CMD_DCMD: 1864 frame_status = megasas_handle_dcmd(s, cmd); 1865 break; 1866 case MFI_CMD_ABORT: 1867 frame_status = megasas_handle_abort(s, cmd); 1868 break; 1869 case MFI_CMD_PD_SCSI_IO: 1870 frame_status = megasas_handle_scsi(s, cmd, 0); 1871 break; 1872 case MFI_CMD_LD_SCSI_IO: 1873 frame_status = megasas_handle_scsi(s, cmd, 1); 1874 break; 1875 case MFI_CMD_LD_READ: 1876 case MFI_CMD_LD_WRITE: 1877 frame_status = megasas_handle_io(s, cmd); 1878 break; 1879 default: 1880 trace_megasas_unhandled_frame_cmd(cmd->index, 1881 cmd->frame->header.frame_cmd); 1882 s->event_count++; 1883 break; 1884 } 1885 if (frame_status != MFI_STAT_INVALID_STATUS) { 1886 if (cmd->frame) { 1887 cmd->frame->header.cmd_status = frame_status; 1888 } else { 1889 megasas_frame_set_cmd_status(frame_addr, frame_status); 1890 } 1891 megasas_complete_frame(s, cmd->context); 1892 } 1893 } 1894 1895 static uint64_t megasas_mmio_read(void *opaque, hwaddr addr, 1896 unsigned size) 1897 { 1898 MegasasState *s = opaque; 1899 uint32_t retval = 0; 1900 1901 switch (addr) { 1902 case MFI_IDB: 1903 retval = 0; 1904 break; 1905 case MFI_OMSG0: 1906 case MFI_OSP0: 1907 retval = (megasas_use_msix(s) ? MFI_FWSTATE_MSIX_SUPPORTED : 0) | 1908 (s->fw_state & MFI_FWSTATE_MASK) | 1909 ((s->fw_sge & 0xff) << 16) | 1910 (s->fw_cmds & 0xFFFF); 1911 break; 1912 case MFI_OSTS: 1913 if (megasas_intr_enabled(s) && s->doorbell) { 1914 retval = MFI_1078_RM | 1; 1915 } 1916 break; 1917 case MFI_OMSK: 1918 retval = s->intr_mask; 1919 break; 1920 case MFI_ODCR0: 1921 retval = s->doorbell; 1922 break; 1923 default: 1924 trace_megasas_mmio_invalid_readl(addr); 1925 break; 1926 } 1927 trace_megasas_mmio_readl(addr, retval); 1928 return retval; 1929 } 1930 1931 static void megasas_mmio_write(void *opaque, hwaddr addr, 1932 uint64_t val, unsigned size) 1933 { 1934 MegasasState *s = opaque; 1935 PCIDevice *pci_dev = PCI_DEVICE(s); 1936 uint64_t frame_addr; 1937 uint32_t frame_count; 1938 int i; 1939 1940 trace_megasas_mmio_writel(addr, val); 1941 switch (addr) { 1942 case MFI_IDB: 1943 if (val & MFI_FWINIT_ABORT) { 1944 /* Abort all pending cmds */ 1945 for (i = 0; i < s->fw_cmds; i++) { 1946 megasas_abort_command(&s->frames[i]); 1947 } 1948 } 1949 if (val & MFI_FWINIT_READY) { 1950 /* move to FW READY */ 1951 megasas_soft_reset(s); 1952 } 1953 if (val & MFI_FWINIT_MFIMODE) { 1954 /* discard MFIs */ 1955 } 1956 break; 1957 case MFI_OMSK: 1958 s->intr_mask = val; 1959 if (!megasas_intr_enabled(s) && !msix_enabled(pci_dev)) { 1960 trace_megasas_irq_lower(); 1961 pci_irq_deassert(pci_dev); 1962 } 1963 if (megasas_intr_enabled(s)) { 1964 trace_megasas_intr_enabled(); 1965 } else { 1966 trace_megasas_intr_disabled(); 1967 } 1968 break; 1969 case MFI_ODCR0: 1970 s->doorbell = 0; 1971 if (s->producer_pa && megasas_intr_enabled(s)) { 1972 /* Update reply queue pointer */ 1973 trace_megasas_qf_update(s->reply_queue_head, s->busy); 1974 stl_le_phys(&address_space_memory, 1975 s->producer_pa, s->reply_queue_head); 1976 if (!msix_enabled(pci_dev)) { 1977 trace_megasas_irq_lower(); 1978 pci_irq_deassert(pci_dev); 1979 } 1980 } 1981 break; 1982 case MFI_IQPH: 1983 /* Received high 32 bits of a 64 bit MFI frame address */ 1984 s->frame_hi = val; 1985 break; 1986 case MFI_IQPL: 1987 /* Received low 32 bits of a 64 bit MFI frame address */ 1988 case MFI_IQP: 1989 /* Received 32 bit MFI frame address */ 1990 frame_addr = (val & ~0x1F); 1991 /* Add possible 64 bit offset */ 1992 frame_addr |= ((uint64_t)s->frame_hi << 32); 1993 s->frame_hi = 0; 1994 frame_count = (val >> 1) & 0xF; 1995 megasas_handle_frame(s, frame_addr, frame_count); 1996 break; 1997 default: 1998 trace_megasas_mmio_invalid_writel(addr, val); 1999 break; 2000 } 2001 } 2002 2003 static const MemoryRegionOps megasas_mmio_ops = { 2004 .read = megasas_mmio_read, 2005 .write = megasas_mmio_write, 2006 .endianness = DEVICE_LITTLE_ENDIAN, 2007 .impl = { 2008 .min_access_size = 8, 2009 .max_access_size = 8, 2010 } 2011 }; 2012 2013 static uint64_t megasas_port_read(void *opaque, hwaddr addr, 2014 unsigned size) 2015 { 2016 return megasas_mmio_read(opaque, addr & 0xff, size); 2017 } 2018 2019 static void megasas_port_write(void *opaque, hwaddr addr, 2020 uint64_t val, unsigned size) 2021 { 2022 megasas_mmio_write(opaque, addr & 0xff, val, size); 2023 } 2024 2025 static const MemoryRegionOps megasas_port_ops = { 2026 .read = megasas_port_read, 2027 .write = megasas_port_write, 2028 .endianness = DEVICE_LITTLE_ENDIAN, 2029 .impl = { 2030 .min_access_size = 4, 2031 .max_access_size = 4, 2032 } 2033 }; 2034 2035 static uint64_t megasas_queue_read(void *opaque, hwaddr addr, 2036 unsigned size) 2037 { 2038 return 0; 2039 } 2040 2041 static const MemoryRegionOps megasas_queue_ops = { 2042 .read = megasas_queue_read, 2043 .endianness = DEVICE_LITTLE_ENDIAN, 2044 .impl = { 2045 .min_access_size = 8, 2046 .max_access_size = 8, 2047 } 2048 }; 2049 2050 static void megasas_soft_reset(MegasasState *s) 2051 { 2052 int i; 2053 MegasasCmd *cmd; 2054 2055 trace_megasas_reset(); 2056 for (i = 0; i < s->fw_cmds; i++) { 2057 cmd = &s->frames[i]; 2058 megasas_abort_command(cmd); 2059 } 2060 megasas_reset_frames(s); 2061 s->reply_queue_len = s->fw_cmds; 2062 s->reply_queue_pa = 0; 2063 s->consumer_pa = 0; 2064 s->producer_pa = 0; 2065 s->fw_state = MFI_FWSTATE_READY; 2066 s->doorbell = 0; 2067 s->intr_mask = MEGASAS_INTR_DISABLED_MASK; 2068 s->frame_hi = 0; 2069 s->flags &= ~MEGASAS_MASK_USE_QUEUE64; 2070 s->event_count++; 2071 s->boot_event = s->event_count; 2072 } 2073 2074 static void megasas_scsi_reset(DeviceState *dev) 2075 { 2076 MegasasState *s = MEGASAS(dev); 2077 2078 megasas_soft_reset(s); 2079 } 2080 2081 static const VMStateDescription vmstate_megasas = { 2082 .name = "megasas", 2083 .version_id = 0, 2084 .minimum_version_id = 0, 2085 .minimum_version_id_old = 0, 2086 .fields = (VMStateField[]) { 2087 VMSTATE_PCI_DEVICE(parent_obj, MegasasState), 2088 2089 VMSTATE_INT32(fw_state, MegasasState), 2090 VMSTATE_INT32(intr_mask, MegasasState), 2091 VMSTATE_INT32(doorbell, MegasasState), 2092 VMSTATE_UINT64(reply_queue_pa, MegasasState), 2093 VMSTATE_UINT64(consumer_pa, MegasasState), 2094 VMSTATE_UINT64(producer_pa, MegasasState), 2095 VMSTATE_END_OF_LIST() 2096 } 2097 }; 2098 2099 static void megasas_scsi_uninit(PCIDevice *d) 2100 { 2101 MegasasState *s = MEGASAS(d); 2102 2103 #ifdef USE_MSIX 2104 msix_uninit(d, &s->mmio_io); 2105 #endif 2106 memory_region_destroy(&s->mmio_io); 2107 memory_region_destroy(&s->port_io); 2108 memory_region_destroy(&s->queue_io); 2109 } 2110 2111 static const struct SCSIBusInfo megasas_scsi_info = { 2112 .tcq = true, 2113 .max_target = MFI_MAX_LD, 2114 .max_lun = 255, 2115 2116 .transfer_data = megasas_xfer_complete, 2117 .get_sg_list = megasas_get_sg_list, 2118 .complete = megasas_command_complete, 2119 .cancel = megasas_command_cancel, 2120 }; 2121 2122 static int megasas_scsi_init(PCIDevice *dev) 2123 { 2124 DeviceState *d = DEVICE(dev); 2125 MegasasState *s = MEGASAS(dev); 2126 uint8_t *pci_conf; 2127 int i, bar_type; 2128 Error *err = NULL; 2129 2130 pci_conf = dev->config; 2131 2132 /* PCI latency timer = 0 */ 2133 pci_conf[PCI_LATENCY_TIMER] = 0; 2134 /* Interrupt pin 1 */ 2135 pci_conf[PCI_INTERRUPT_PIN] = 0x01; 2136 2137 memory_region_init_io(&s->mmio_io, OBJECT(s), &megasas_mmio_ops, s, 2138 "megasas-mmio", 0x4000); 2139 memory_region_init_io(&s->port_io, OBJECT(s), &megasas_port_ops, s, 2140 "megasas-io", 256); 2141 memory_region_init_io(&s->queue_io, OBJECT(s), &megasas_queue_ops, s, 2142 "megasas-queue", 0x40000); 2143 2144 #ifdef USE_MSIX 2145 /* MSI-X support is currently broken */ 2146 if (megasas_use_msix(s) && 2147 msix_init(dev, 15, &s->mmio_io, 0, 0x2000)) { 2148 s->flags &= ~MEGASAS_MASK_USE_MSIX; 2149 } 2150 #else 2151 s->flags &= ~MEGASAS_MASK_USE_MSIX; 2152 #endif 2153 2154 bar_type = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64; 2155 pci_register_bar(dev, 0, bar_type, &s->mmio_io); 2156 pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, &s->port_io); 2157 pci_register_bar(dev, 3, bar_type, &s->queue_io); 2158 2159 if (megasas_use_msix(s)) { 2160 msix_vector_use(dev, 0); 2161 } 2162 2163 if (!s->sas_addr) { 2164 s->sas_addr = ((NAA_LOCALLY_ASSIGNED_ID << 24) | 2165 IEEE_COMPANY_LOCALLY_ASSIGNED) << 36; 2166 s->sas_addr |= (pci_bus_num(dev->bus) << 16); 2167 s->sas_addr |= (PCI_SLOT(dev->devfn) << 8); 2168 s->sas_addr |= PCI_FUNC(dev->devfn); 2169 } 2170 if (!s->hba_serial) { 2171 s->hba_serial = g_strdup(MEGASAS_HBA_SERIAL); 2172 } 2173 if (s->fw_sge >= MEGASAS_MAX_SGE - MFI_PASS_FRAME_SIZE) { 2174 s->fw_sge = MEGASAS_MAX_SGE - MFI_PASS_FRAME_SIZE; 2175 } else if (s->fw_sge >= 128 - MFI_PASS_FRAME_SIZE) { 2176 s->fw_sge = 128 - MFI_PASS_FRAME_SIZE; 2177 } else { 2178 s->fw_sge = 64 - MFI_PASS_FRAME_SIZE; 2179 } 2180 if (s->fw_cmds > MEGASAS_MAX_FRAMES) { 2181 s->fw_cmds = MEGASAS_MAX_FRAMES; 2182 } 2183 trace_megasas_init(s->fw_sge, s->fw_cmds, 2184 megasas_use_msix(s) ? "MSI-X" : "INTx", 2185 megasas_is_jbod(s) ? "jbod" : "raid"); 2186 s->fw_luns = (MFI_MAX_LD > MAX_SCSI_DEVS) ? 2187 MAX_SCSI_DEVS : MFI_MAX_LD; 2188 s->producer_pa = 0; 2189 s->consumer_pa = 0; 2190 for (i = 0; i < s->fw_cmds; i++) { 2191 s->frames[i].index = i; 2192 s->frames[i].context = -1; 2193 s->frames[i].pa = 0; 2194 s->frames[i].state = s; 2195 } 2196 2197 scsi_bus_new(&s->bus, sizeof(s->bus), DEVICE(dev), 2198 &megasas_scsi_info, NULL); 2199 if (!d->hotplugged) { 2200 scsi_bus_legacy_handle_cmdline(&s->bus, &err); 2201 if (err != NULL) { 2202 error_free(err); 2203 return -1; 2204 } 2205 } 2206 return 0; 2207 } 2208 2209 static Property megasas_properties[] = { 2210 DEFINE_PROP_UINT32("max_sge", MegasasState, fw_sge, 2211 MEGASAS_DEFAULT_SGE), 2212 DEFINE_PROP_UINT32("max_cmds", MegasasState, fw_cmds, 2213 MEGASAS_DEFAULT_FRAMES), 2214 DEFINE_PROP_STRING("hba_serial", MegasasState, hba_serial), 2215 DEFINE_PROP_UINT64("sas_address", MegasasState, sas_addr, 0), 2216 #ifdef USE_MSIX 2217 DEFINE_PROP_BIT("use_msix", MegasasState, flags, 2218 MEGASAS_FLAG_USE_MSIX, false), 2219 #endif 2220 DEFINE_PROP_BIT("use_jbod", MegasasState, flags, 2221 MEGASAS_FLAG_USE_JBOD, false), 2222 DEFINE_PROP_END_OF_LIST(), 2223 }; 2224 2225 static void megasas_class_init(ObjectClass *oc, void *data) 2226 { 2227 DeviceClass *dc = DEVICE_CLASS(oc); 2228 PCIDeviceClass *pc = PCI_DEVICE_CLASS(oc); 2229 2230 pc->init = megasas_scsi_init; 2231 pc->exit = megasas_scsi_uninit; 2232 pc->vendor_id = PCI_VENDOR_ID_LSI_LOGIC; 2233 pc->device_id = PCI_DEVICE_ID_LSI_SAS1078; 2234 pc->subsystem_vendor_id = PCI_VENDOR_ID_LSI_LOGIC; 2235 pc->subsystem_id = 0x1013; 2236 pc->class_id = PCI_CLASS_STORAGE_RAID; 2237 dc->props = megasas_properties; 2238 dc->reset = megasas_scsi_reset; 2239 dc->vmsd = &vmstate_megasas; 2240 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2241 dc->desc = "LSI MegaRAID SAS 1078"; 2242 } 2243 2244 static const TypeInfo megasas_info = { 2245 .name = TYPE_MEGASAS, 2246 .parent = TYPE_PCI_DEVICE, 2247 .instance_size = sizeof(MegasasState), 2248 .class_init = megasas_class_init, 2249 }; 2250 2251 static void megasas_register_types(void) 2252 { 2253 type_register_static(&megasas_info); 2254 } 2255 2256 type_init(megasas_register_types) 2257