1 /* 2 * QEMU PowerPC MPC8544 global util pseudo-device 3 * 4 * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved. 5 * 6 * Author: Alexander Graf, <alex@csgraf.de> 7 * 8 * This is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * ***************************************************************** 14 * 15 * The documentation for this device is noted in the MPC8544 documentation, 16 * file name "MPC8544ERM.pdf". You can easily find it on the web. 17 * 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/module.h" 22 #include "qemu/log.h" 23 #include "sysemu/runstate.h" 24 #include "cpu.h" 25 #include "hw/sysbus.h" 26 #include "qom/object.h" 27 28 #define MPC8544_GUTS_MMIO_SIZE 0x1000 29 #define MPC8544_GUTS_RSTCR_RESET 0x02 30 31 #define MPC8544_GUTS_ADDR_PORPLLSR 0x00 32 REG32(GUTS_PORPLLSR, 0x00) 33 FIELD(GUTS_PORPLLSR, E500_1_RATIO, 24, 6) 34 FIELD(GUTS_PORPLLSR, E500_0_RATIO, 16, 6) 35 FIELD(GUTS_PORPLLSR, DDR_RATIO, 9, 5) 36 FIELD(GUTS_PORPLLSR, PLAT_RATIO, 1, 5) 37 38 #define MPC8544_GUTS_ADDR_PORBMSR 0x04 39 #define MPC8544_GUTS_ADDR_PORIMPSCR 0x08 40 #define MPC8544_GUTS_ADDR_PORDEVSR 0x0C 41 #define MPC8544_GUTS_ADDR_PORDBGMSR 0x10 42 #define MPC8544_GUTS_ADDR_PORDEVSR2 0x14 43 #define MPC8544_GUTS_ADDR_GPPORCR 0x20 44 #define MPC8544_GUTS_ADDR_GPIOCR 0x30 45 #define MPC8544_GUTS_ADDR_GPOUTDR 0x40 46 #define MPC8544_GUTS_ADDR_GPINDR 0x50 47 #define MPC8544_GUTS_ADDR_PMUXCR 0x60 48 #define MPC8544_GUTS_ADDR_DEVDISR 0x70 49 #define MPC8544_GUTS_ADDR_POWMGTCSR 0x80 50 #define MPC8544_GUTS_ADDR_MCPSUMR 0x90 51 #define MPC8544_GUTS_ADDR_RSTRSCR 0x94 52 #define MPC8544_GUTS_ADDR_PVR 0xA0 53 #define MPC8544_GUTS_ADDR_SVR 0xA4 54 #define MPC8544_GUTS_ADDR_RSTCR 0xB0 55 #define MPC8544_GUTS_ADDR_IOVSELSR 0xC0 56 #define MPC8544_GUTS_ADDR_DDRCSR 0xB20 57 #define MPC8544_GUTS_ADDR_DDRCDR 0xB24 58 #define MPC8544_GUTS_ADDR_DDRCLKDR 0xB28 59 #define MPC8544_GUTS_ADDR_CLKOCR 0xE00 60 #define MPC8544_GUTS_ADDR_SRDS1CR1 0xF04 61 #define MPC8544_GUTS_ADDR_SRDS2CR1 0xF10 62 #define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18 63 64 #define TYPE_MPC8544_GUTS "mpc8544-guts" 65 OBJECT_DECLARE_SIMPLE_TYPE(GutsState, MPC8544_GUTS) 66 67 struct GutsState { 68 /*< private >*/ 69 SysBusDevice parent_obj; 70 /*< public >*/ 71 72 MemoryRegion iomem; 73 }; 74 75 76 static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr, 77 unsigned size) 78 { 79 uint32_t value = 0; 80 CPUPPCState *env = cpu_env(current_cpu); 81 82 addr &= MPC8544_GUTS_MMIO_SIZE - 1; 83 switch (addr) { 84 case MPC8544_GUTS_ADDR_PORPLLSR: 85 value = FIELD_DP32(value, GUTS_PORPLLSR, E500_1_RATIO, 6); /* 3:1 */ 86 value = FIELD_DP32(value, GUTS_PORPLLSR, E500_0_RATIO, 6); /* 3:1 */ 87 value = FIELD_DP32(value, GUTS_PORPLLSR, DDR_RATIO, 12); /* 12:1 */ 88 value = FIELD_DP32(value, GUTS_PORPLLSR, PLAT_RATIO, 6); /* 6:1 */ 89 break; 90 case MPC8544_GUTS_ADDR_PVR: 91 value = env->spr[SPR_PVR]; 92 break; 93 case MPC8544_GUTS_ADDR_SVR: 94 value = env->spr[SPR_E500_SVR]; 95 break; 96 default: 97 qemu_log_mask(LOG_GUEST_ERROR, 98 "%s: Unknown register 0x%" HWADDR_PRIx "\n", 99 __func__, addr); 100 break; 101 } 102 103 return value; 104 } 105 106 static void mpc8544_guts_write(void *opaque, hwaddr addr, 107 uint64_t value, unsigned size) 108 { 109 addr &= MPC8544_GUTS_MMIO_SIZE - 1; 110 111 switch (addr) { 112 case MPC8544_GUTS_ADDR_RSTCR: 113 if (value & MPC8544_GUTS_RSTCR_RESET) { 114 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 115 } 116 break; 117 default: 118 qemu_log_mask(LOG_GUEST_ERROR, "%s: Unknown register 0x%" HWADDR_PRIx 119 " = 0x%" PRIx64 "\n", __func__, addr, value); 120 break; 121 } 122 } 123 124 static const MemoryRegionOps mpc8544_guts_ops = { 125 .read = mpc8544_guts_read, 126 .write = mpc8544_guts_write, 127 .endianness = DEVICE_BIG_ENDIAN, 128 .valid = { 129 .min_access_size = 4, 130 .max_access_size = 4, 131 }, 132 }; 133 134 static void mpc8544_guts_initfn(Object *obj) 135 { 136 SysBusDevice *d = SYS_BUS_DEVICE(obj); 137 GutsState *s = MPC8544_GUTS(obj); 138 139 memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s, 140 "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE); 141 sysbus_init_mmio(d, &s->iomem); 142 } 143 144 static const TypeInfo mpc8544_guts_info = { 145 .name = TYPE_MPC8544_GUTS, 146 .parent = TYPE_SYS_BUS_DEVICE, 147 .instance_size = sizeof(GutsState), 148 .instance_init = mpc8544_guts_initfn, 149 }; 150 151 static void mpc8544_guts_register_types(void) 152 { 153 type_register_static(&mpc8544_guts_info); 154 } 155 156 type_init(mpc8544_guts_register_types) 157