1*c0907c9eSPaolo Bonzini /* 2*c0907c9eSPaolo Bonzini * QEMU i440FX/PIIX3 PCI Bridge Emulation 3*c0907c9eSPaolo Bonzini * 4*c0907c9eSPaolo Bonzini * Copyright (c) 2006 Fabrice Bellard 5*c0907c9eSPaolo Bonzini * Copyright (c) 2011 Isaku Yamahata <yamahata at valinux co jp> 6*c0907c9eSPaolo Bonzini * VA Linux Systems Japan K.K. 7*c0907c9eSPaolo Bonzini * Copyright (c) 2012 Jason Baron <jbaron@redhat.com> 8*c0907c9eSPaolo Bonzini * 9*c0907c9eSPaolo Bonzini * Split out from piix_pci.c 10*c0907c9eSPaolo Bonzini * 11*c0907c9eSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 12*c0907c9eSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 13*c0907c9eSPaolo Bonzini * in the Software without restriction, including without limitation the rights 14*c0907c9eSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 15*c0907c9eSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 16*c0907c9eSPaolo Bonzini * furnished to do so, subject to the following conditions: 17*c0907c9eSPaolo Bonzini * 18*c0907c9eSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 19*c0907c9eSPaolo Bonzini * all copies or substantial portions of the Software. 20*c0907c9eSPaolo Bonzini * 21*c0907c9eSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22*c0907c9eSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23*c0907c9eSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24*c0907c9eSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25*c0907c9eSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 26*c0907c9eSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 27*c0907c9eSPaolo Bonzini * THE SOFTWARE. 28*c0907c9eSPaolo Bonzini */ 29*c0907c9eSPaolo Bonzini #include "sysemu/sysemu.h" 30*c0907c9eSPaolo Bonzini #include "hw/pci-host/pam.h" 31*c0907c9eSPaolo Bonzini 32*c0907c9eSPaolo Bonzini void smram_update(MemoryRegion *smram_region, uint8_t smram, 33*c0907c9eSPaolo Bonzini uint8_t smm_enabled) 34*c0907c9eSPaolo Bonzini { 35*c0907c9eSPaolo Bonzini bool smram_enabled; 36*c0907c9eSPaolo Bonzini 37*c0907c9eSPaolo Bonzini smram_enabled = ((smm_enabled && (smram & SMRAM_G_SMRAME)) || 38*c0907c9eSPaolo Bonzini (smram & SMRAM_D_OPEN)); 39*c0907c9eSPaolo Bonzini memory_region_set_enabled(smram_region, !smram_enabled); 40*c0907c9eSPaolo Bonzini } 41*c0907c9eSPaolo Bonzini 42*c0907c9eSPaolo Bonzini void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram, 43*c0907c9eSPaolo Bonzini MemoryRegion *smram_region) 44*c0907c9eSPaolo Bonzini { 45*c0907c9eSPaolo Bonzini uint8_t smm_enabled = (smm != 0); 46*c0907c9eSPaolo Bonzini if (*host_smm_enabled != smm_enabled) { 47*c0907c9eSPaolo Bonzini *host_smm_enabled = smm_enabled; 48*c0907c9eSPaolo Bonzini smram_update(smram_region, smram, *host_smm_enabled); 49*c0907c9eSPaolo Bonzini } 50*c0907c9eSPaolo Bonzini } 51*c0907c9eSPaolo Bonzini 52*c0907c9eSPaolo Bonzini void init_pam(MemoryRegion *ram_memory, MemoryRegion *system_memory, 53*c0907c9eSPaolo Bonzini MemoryRegion *pci_address_space, PAMMemoryRegion *mem, 54*c0907c9eSPaolo Bonzini uint32_t start, uint32_t size) 55*c0907c9eSPaolo Bonzini { 56*c0907c9eSPaolo Bonzini int i; 57*c0907c9eSPaolo Bonzini 58*c0907c9eSPaolo Bonzini /* RAM */ 59*c0907c9eSPaolo Bonzini memory_region_init_alias(&mem->alias[3], "pam-ram", ram_memory, 60*c0907c9eSPaolo Bonzini start, size); 61*c0907c9eSPaolo Bonzini /* ROM (XXX: not quite correct) */ 62*c0907c9eSPaolo Bonzini memory_region_init_alias(&mem->alias[1], "pam-rom", ram_memory, 63*c0907c9eSPaolo Bonzini start, size); 64*c0907c9eSPaolo Bonzini memory_region_set_readonly(&mem->alias[1], true); 65*c0907c9eSPaolo Bonzini 66*c0907c9eSPaolo Bonzini /* XXX: should distinguish read/write cases */ 67*c0907c9eSPaolo Bonzini memory_region_init_alias(&mem->alias[0], "pam-pci", pci_address_space, 68*c0907c9eSPaolo Bonzini start, size); 69*c0907c9eSPaolo Bonzini memory_region_init_alias(&mem->alias[2], "pam-pci", pci_address_space, 70*c0907c9eSPaolo Bonzini start, size); 71*c0907c9eSPaolo Bonzini 72*c0907c9eSPaolo Bonzini for (i = 0; i < 4; ++i) { 73*c0907c9eSPaolo Bonzini memory_region_set_enabled(&mem->alias[i], false); 74*c0907c9eSPaolo Bonzini memory_region_add_subregion_overlap(system_memory, start, 75*c0907c9eSPaolo Bonzini &mem->alias[i], 1); 76*c0907c9eSPaolo Bonzini } 77*c0907c9eSPaolo Bonzini mem->current = 0; 78*c0907c9eSPaolo Bonzini } 79*c0907c9eSPaolo Bonzini 80*c0907c9eSPaolo Bonzini void pam_update(PAMMemoryRegion *pam, int idx, uint8_t val) 81*c0907c9eSPaolo Bonzini { 82*c0907c9eSPaolo Bonzini assert(0 <= idx && idx <= 12); 83*c0907c9eSPaolo Bonzini 84*c0907c9eSPaolo Bonzini memory_region_set_enabled(&pam->alias[pam->current], false); 85*c0907c9eSPaolo Bonzini pam->current = (val >> ((!(idx & 1)) * 4)) & PAM_ATTR_MASK; 86*c0907c9eSPaolo Bonzini memory_region_set_enabled(&pam->alias[pam->current], true); 87*c0907c9eSPaolo Bonzini } 88