1c0907c9eSPaolo Bonzini /* 2c0907c9eSPaolo Bonzini * QEMU i440FX/PIIX3 PCI Bridge Emulation 3c0907c9eSPaolo Bonzini * 4c0907c9eSPaolo Bonzini * Copyright (c) 2006 Fabrice Bellard 5c0907c9eSPaolo Bonzini * Copyright (c) 2011 Isaku Yamahata <yamahata at valinux co jp> 6c0907c9eSPaolo Bonzini * VA Linux Systems Japan K.K. 7c0907c9eSPaolo Bonzini * Copyright (c) 2012 Jason Baron <jbaron@redhat.com> 8c0907c9eSPaolo Bonzini * 9c0907c9eSPaolo Bonzini * Split out from piix_pci.c 10c0907c9eSPaolo Bonzini * 11c0907c9eSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 12c0907c9eSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 13c0907c9eSPaolo Bonzini * in the Software without restriction, including without limitation the rights 14c0907c9eSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 15c0907c9eSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 16c0907c9eSPaolo Bonzini * furnished to do so, subject to the following conditions: 17c0907c9eSPaolo Bonzini * 18c0907c9eSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 19c0907c9eSPaolo Bonzini * all copies or substantial portions of the Software. 20c0907c9eSPaolo Bonzini * 21c0907c9eSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22c0907c9eSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23c0907c9eSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24c0907c9eSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25c0907c9eSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 26c0907c9eSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 27c0907c9eSPaolo Bonzini * THE SOFTWARE. 28c0907c9eSPaolo Bonzini */ 29*3cd2cf43SPaolo Bonzini 30*3cd2cf43SPaolo Bonzini #include "qom/object.h" 31c0907c9eSPaolo Bonzini #include "sysemu/sysemu.h" 32c0907c9eSPaolo Bonzini #include "hw/pci-host/pam.h" 33c0907c9eSPaolo Bonzini 34c0907c9eSPaolo Bonzini void smram_update(MemoryRegion *smram_region, uint8_t smram, 35c0907c9eSPaolo Bonzini uint8_t smm_enabled) 36c0907c9eSPaolo Bonzini { 37c0907c9eSPaolo Bonzini bool smram_enabled; 38c0907c9eSPaolo Bonzini 39c0907c9eSPaolo Bonzini smram_enabled = ((smm_enabled && (smram & SMRAM_G_SMRAME)) || 40c0907c9eSPaolo Bonzini (smram & SMRAM_D_OPEN)); 41c0907c9eSPaolo Bonzini memory_region_set_enabled(smram_region, !smram_enabled); 42c0907c9eSPaolo Bonzini } 43c0907c9eSPaolo Bonzini 44c0907c9eSPaolo Bonzini void smram_set_smm(uint8_t *host_smm_enabled, int smm, uint8_t smram, 45c0907c9eSPaolo Bonzini MemoryRegion *smram_region) 46c0907c9eSPaolo Bonzini { 47c0907c9eSPaolo Bonzini uint8_t smm_enabled = (smm != 0); 48c0907c9eSPaolo Bonzini if (*host_smm_enabled != smm_enabled) { 49c0907c9eSPaolo Bonzini *host_smm_enabled = smm_enabled; 50c0907c9eSPaolo Bonzini smram_update(smram_region, smram, *host_smm_enabled); 51c0907c9eSPaolo Bonzini } 52c0907c9eSPaolo Bonzini } 53c0907c9eSPaolo Bonzini 54*3cd2cf43SPaolo Bonzini void init_pam(DeviceState *dev, MemoryRegion *ram_memory, 55*3cd2cf43SPaolo Bonzini MemoryRegion *system_memory, MemoryRegion *pci_address_space, 56*3cd2cf43SPaolo Bonzini PAMMemoryRegion *mem, uint32_t start, uint32_t size) 57c0907c9eSPaolo Bonzini { 58c0907c9eSPaolo Bonzini int i; 59c0907c9eSPaolo Bonzini 60c0907c9eSPaolo Bonzini /* RAM */ 61*3cd2cf43SPaolo Bonzini memory_region_init_alias(&mem->alias[3], OBJECT(dev), "pam-ram", ram_memory, 62c0907c9eSPaolo Bonzini start, size); 63c0907c9eSPaolo Bonzini /* ROM (XXX: not quite correct) */ 64*3cd2cf43SPaolo Bonzini memory_region_init_alias(&mem->alias[1], OBJECT(dev), "pam-rom", ram_memory, 65c0907c9eSPaolo Bonzini start, size); 66c0907c9eSPaolo Bonzini memory_region_set_readonly(&mem->alias[1], true); 67c0907c9eSPaolo Bonzini 68c0907c9eSPaolo Bonzini /* XXX: should distinguish read/write cases */ 69*3cd2cf43SPaolo Bonzini memory_region_init_alias(&mem->alias[0], OBJECT(dev), "pam-pci", pci_address_space, 70c0907c9eSPaolo Bonzini start, size); 71*3cd2cf43SPaolo Bonzini memory_region_init_alias(&mem->alias[2], OBJECT(dev), "pam-pci", pci_address_space, 72c0907c9eSPaolo Bonzini start, size); 73c0907c9eSPaolo Bonzini 74c0907c9eSPaolo Bonzini for (i = 0; i < 4; ++i) { 75c0907c9eSPaolo Bonzini memory_region_set_enabled(&mem->alias[i], false); 76c0907c9eSPaolo Bonzini memory_region_add_subregion_overlap(system_memory, start, 77c0907c9eSPaolo Bonzini &mem->alias[i], 1); 78c0907c9eSPaolo Bonzini } 79c0907c9eSPaolo Bonzini mem->current = 0; 80c0907c9eSPaolo Bonzini } 81c0907c9eSPaolo Bonzini 82c0907c9eSPaolo Bonzini void pam_update(PAMMemoryRegion *pam, int idx, uint8_t val) 83c0907c9eSPaolo Bonzini { 84c0907c9eSPaolo Bonzini assert(0 <= idx && idx <= 12); 85c0907c9eSPaolo Bonzini 86c0907c9eSPaolo Bonzini memory_region_set_enabled(&pam->alias[pam->current], false); 87c0907c9eSPaolo Bonzini pam->current = (val >> ((!(idx & 1)) * 4)) & PAM_ATTR_MASK; 88c0907c9eSPaolo Bonzini memory_region_set_enabled(&pam->alias[pam->current], true); 89c0907c9eSPaolo Bonzini } 90