1*bbbbd900SAlistair Francis /* 2*bbbbd900SAlistair Francis * STM32F2XX SYSCFG 3*bbbbd900SAlistair Francis * 4*bbbbd900SAlistair Francis * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> 5*bbbbd900SAlistair Francis * 6*bbbbd900SAlistair Francis * Permission is hereby granted, free of charge, to any person obtaining a copy 7*bbbbd900SAlistair Francis * of this software and associated documentation files (the "Software"), to deal 8*bbbbd900SAlistair Francis * in the Software without restriction, including without limitation the rights 9*bbbbd900SAlistair Francis * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10*bbbbd900SAlistair Francis * copies of the Software, and to permit persons to whom the Software is 11*bbbbd900SAlistair Francis * furnished to do so, subject to the following conditions: 12*bbbbd900SAlistair Francis * 13*bbbbd900SAlistair Francis * The above copyright notice and this permission notice shall be included in 14*bbbbd900SAlistair Francis * all copies or substantial portions of the Software. 15*bbbbd900SAlistair Francis * 16*bbbbd900SAlistair Francis * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17*bbbbd900SAlistair Francis * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18*bbbbd900SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19*bbbbd900SAlistair Francis * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20*bbbbd900SAlistair Francis * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21*bbbbd900SAlistair Francis * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22*bbbbd900SAlistair Francis * THE SOFTWARE. 23*bbbbd900SAlistair Francis */ 24*bbbbd900SAlistair Francis 25*bbbbd900SAlistair Francis #include "hw/misc/stm32f2xx_syscfg.h" 26*bbbbd900SAlistair Francis 27*bbbbd900SAlistair Francis #ifndef STM_SYSCFG_ERR_DEBUG 28*bbbbd900SAlistair Francis #define STM_SYSCFG_ERR_DEBUG 0 29*bbbbd900SAlistair Francis #endif 30*bbbbd900SAlistair Francis 31*bbbbd900SAlistair Francis #define DB_PRINT_L(lvl, fmt, args...) do { \ 32*bbbbd900SAlistair Francis if (STM_SYSCFG_ERR_DEBUG >= lvl) { \ 33*bbbbd900SAlistair Francis qemu_log("%s: " fmt, __func__, ## args); \ 34*bbbbd900SAlistair Francis } \ 35*bbbbd900SAlistair Francis } while (0); 36*bbbbd900SAlistair Francis 37*bbbbd900SAlistair Francis #define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args) 38*bbbbd900SAlistair Francis 39*bbbbd900SAlistair Francis static void stm32f2xx_syscfg_reset(DeviceState *dev) 40*bbbbd900SAlistair Francis { 41*bbbbd900SAlistair Francis STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(dev); 42*bbbbd900SAlistair Francis 43*bbbbd900SAlistair Francis s->syscfg_memrmp = 0x00000000; 44*bbbbd900SAlistair Francis s->syscfg_pmc = 0x00000000; 45*bbbbd900SAlistair Francis s->syscfg_exticr1 = 0x00000000; 46*bbbbd900SAlistair Francis s->syscfg_exticr2 = 0x00000000; 47*bbbbd900SAlistair Francis s->syscfg_exticr3 = 0x00000000; 48*bbbbd900SAlistair Francis s->syscfg_exticr4 = 0x00000000; 49*bbbbd900SAlistair Francis s->syscfg_cmpcr = 0x00000000; 50*bbbbd900SAlistair Francis } 51*bbbbd900SAlistair Francis 52*bbbbd900SAlistair Francis static uint64_t stm32f2xx_syscfg_read(void *opaque, hwaddr addr, 53*bbbbd900SAlistair Francis unsigned int size) 54*bbbbd900SAlistair Francis { 55*bbbbd900SAlistair Francis STM32F2XXSyscfgState *s = opaque; 56*bbbbd900SAlistair Francis 57*bbbbd900SAlistair Francis DB_PRINT("0x%"HWADDR_PRIx"\n", addr); 58*bbbbd900SAlistair Francis 59*bbbbd900SAlistair Francis switch (addr) { 60*bbbbd900SAlistair Francis case SYSCFG_MEMRMP: 61*bbbbd900SAlistair Francis return s->syscfg_memrmp; 62*bbbbd900SAlistair Francis case SYSCFG_PMC: 63*bbbbd900SAlistair Francis return s->syscfg_pmc; 64*bbbbd900SAlistair Francis case SYSCFG_EXTICR1: 65*bbbbd900SAlistair Francis return s->syscfg_exticr1; 66*bbbbd900SAlistair Francis case SYSCFG_EXTICR2: 67*bbbbd900SAlistair Francis return s->syscfg_exticr2; 68*bbbbd900SAlistair Francis case SYSCFG_EXTICR3: 69*bbbbd900SAlistair Francis return s->syscfg_exticr3; 70*bbbbd900SAlistair Francis case SYSCFG_EXTICR4: 71*bbbbd900SAlistair Francis return s->syscfg_exticr4; 72*bbbbd900SAlistair Francis case SYSCFG_CMPCR: 73*bbbbd900SAlistair Francis return s->syscfg_cmpcr; 74*bbbbd900SAlistair Francis default: 75*bbbbd900SAlistair Francis qemu_log_mask(LOG_GUEST_ERROR, 76*bbbbd900SAlistair Francis "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); 77*bbbbd900SAlistair Francis return 0; 78*bbbbd900SAlistair Francis } 79*bbbbd900SAlistair Francis 80*bbbbd900SAlistair Francis return 0; 81*bbbbd900SAlistair Francis } 82*bbbbd900SAlistair Francis 83*bbbbd900SAlistair Francis static void stm32f2xx_syscfg_write(void *opaque, hwaddr addr, 84*bbbbd900SAlistair Francis uint64_t val64, unsigned int size) 85*bbbbd900SAlistair Francis { 86*bbbbd900SAlistair Francis STM32F2XXSyscfgState *s = opaque; 87*bbbbd900SAlistair Francis uint32_t value = val64; 88*bbbbd900SAlistair Francis 89*bbbbd900SAlistair Francis DB_PRINT("0x%x, 0x%"HWADDR_PRIx"\n", value, addr); 90*bbbbd900SAlistair Francis 91*bbbbd900SAlistair Francis switch (addr) { 92*bbbbd900SAlistair Francis case SYSCFG_MEMRMP: 93*bbbbd900SAlistair Francis qemu_log_mask(LOG_UNIMP, 94*bbbbd900SAlistair Francis "%s: Changeing the memory mapping isn't supported " \ 95*bbbbd900SAlistair Francis "in QEMU\n", __func__); 96*bbbbd900SAlistair Francis return; 97*bbbbd900SAlistair Francis case SYSCFG_PMC: 98*bbbbd900SAlistair Francis qemu_log_mask(LOG_UNIMP, 99*bbbbd900SAlistair Francis "%s: Changeing the memory mapping isn't supported " \ 100*bbbbd900SAlistair Francis "in QEMU\n", __func__); 101*bbbbd900SAlistair Francis return; 102*bbbbd900SAlistair Francis case SYSCFG_EXTICR1: 103*bbbbd900SAlistair Francis s->syscfg_exticr1 = (value & 0xFFFF); 104*bbbbd900SAlistair Francis return; 105*bbbbd900SAlistair Francis case SYSCFG_EXTICR2: 106*bbbbd900SAlistair Francis s->syscfg_exticr2 = (value & 0xFFFF); 107*bbbbd900SAlistair Francis return; 108*bbbbd900SAlistair Francis case SYSCFG_EXTICR3: 109*bbbbd900SAlistair Francis s->syscfg_exticr3 = (value & 0xFFFF); 110*bbbbd900SAlistair Francis return; 111*bbbbd900SAlistair Francis case SYSCFG_EXTICR4: 112*bbbbd900SAlistair Francis s->syscfg_exticr4 = (value & 0xFFFF); 113*bbbbd900SAlistair Francis return; 114*bbbbd900SAlistair Francis case SYSCFG_CMPCR: 115*bbbbd900SAlistair Francis s->syscfg_cmpcr = value; 116*bbbbd900SAlistair Francis return; 117*bbbbd900SAlistair Francis default: 118*bbbbd900SAlistair Francis qemu_log_mask(LOG_GUEST_ERROR, 119*bbbbd900SAlistair Francis "%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr); 120*bbbbd900SAlistair Francis } 121*bbbbd900SAlistair Francis } 122*bbbbd900SAlistair Francis 123*bbbbd900SAlistair Francis static const MemoryRegionOps stm32f2xx_syscfg_ops = { 124*bbbbd900SAlistair Francis .read = stm32f2xx_syscfg_read, 125*bbbbd900SAlistair Francis .write = stm32f2xx_syscfg_write, 126*bbbbd900SAlistair Francis .endianness = DEVICE_NATIVE_ENDIAN, 127*bbbbd900SAlistair Francis }; 128*bbbbd900SAlistair Francis 129*bbbbd900SAlistair Francis static void stm32f2xx_syscfg_init(Object *obj) 130*bbbbd900SAlistair Francis { 131*bbbbd900SAlistair Francis STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(obj); 132*bbbbd900SAlistair Francis 133*bbbbd900SAlistair Francis sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); 134*bbbbd900SAlistair Francis 135*bbbbd900SAlistair Francis memory_region_init_io(&s->mmio, obj, &stm32f2xx_syscfg_ops, s, 136*bbbbd900SAlistair Francis TYPE_STM32F2XX_SYSCFG, 0x400); 137*bbbbd900SAlistair Francis sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); 138*bbbbd900SAlistair Francis } 139*bbbbd900SAlistair Francis 140*bbbbd900SAlistair Francis static void stm32f2xx_syscfg_class_init(ObjectClass *klass, void *data) 141*bbbbd900SAlistair Francis { 142*bbbbd900SAlistair Francis DeviceClass *dc = DEVICE_CLASS(klass); 143*bbbbd900SAlistair Francis 144*bbbbd900SAlistair Francis dc->reset = stm32f2xx_syscfg_reset; 145*bbbbd900SAlistair Francis } 146*bbbbd900SAlistair Francis 147*bbbbd900SAlistair Francis static const TypeInfo stm32f2xx_syscfg_info = { 148*bbbbd900SAlistair Francis .name = TYPE_STM32F2XX_SYSCFG, 149*bbbbd900SAlistair Francis .parent = TYPE_SYS_BUS_DEVICE, 150*bbbbd900SAlistair Francis .instance_size = sizeof(STM32F2XXSyscfgState), 151*bbbbd900SAlistair Francis .instance_init = stm32f2xx_syscfg_init, 152*bbbbd900SAlistair Francis .class_init = stm32f2xx_syscfg_class_init, 153*bbbbd900SAlistair Francis }; 154*bbbbd900SAlistair Francis 155*bbbbd900SAlistair Francis static void stm32f2xx_syscfg_register_types(void) 156*bbbbd900SAlistair Francis { 157*bbbbd900SAlistair Francis type_register_static(&stm32f2xx_syscfg_info); 158*bbbbd900SAlistair Francis } 159*bbbbd900SAlistair Francis 160*bbbbd900SAlistair Francis type_init(stm32f2xx_syscfg_register_types) 161