1 /* 2 * QEMU x86 ISA testdev 3 * 4 * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* 26 * This device is used to test KVM features specific to the x86 port, such 27 * as emulation, power management, interrupt routing, among others. It's meant 28 * to be used like: 29 * 30 * qemu-system-x86_64 -device pc-testdev -serial stdio \ 31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \ 32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat 33 * 34 * Where msr.flat is one of the KVM unittests, present on a separate repo, 35 * git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git 36 */ 37 38 #include "config-host.h" 39 #if defined(CONFIG_POSIX) 40 #include <sys/mman.h> 41 #endif 42 #include "hw/hw.h" 43 #include "hw/qdev.h" 44 #include "hw/isa/isa.h" 45 46 #define IOMEM_LEN 0x10000 47 48 typedef struct PCTestdev { 49 ISADevice parent_obj; 50 51 MemoryRegion ioport; 52 MemoryRegion flush; 53 MemoryRegion irq; 54 MemoryRegion iomem; 55 uint32_t ioport_data; 56 char iomem_buf[IOMEM_LEN]; 57 } PCTestdev; 58 59 #define TYPE_TESTDEV "pc-testdev" 60 #define TESTDEV(obj) \ 61 OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV) 62 63 static void test_irq_line(void *opaque, hwaddr addr, uint64_t data, 64 unsigned len) 65 { 66 PCTestdev *dev = opaque; 67 ISADevice *isa = ISA_DEVICE(dev); 68 69 qemu_set_irq(isa_get_irq(isa, addr), !!data); 70 } 71 72 static const MemoryRegionOps test_irq_ops = { 73 .write = test_irq_line, 74 .valid.min_access_size = 1, 75 .valid.max_access_size = 1, 76 .endianness = DEVICE_LITTLE_ENDIAN, 77 }; 78 79 static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data, 80 unsigned len) 81 { 82 PCTestdev *dev = opaque; 83 int bits = len * 8; 84 int start_bit = (addr & 3) * 8; 85 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit; 86 dev->ioport_data &= ~mask; 87 dev->ioport_data |= data << start_bit; 88 } 89 90 static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len) 91 { 92 PCTestdev *dev = opaque; 93 int bits = len * 8; 94 int start_bit = (addr & 3) * 8; 95 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit; 96 return (dev->ioport_data & mask) >> start_bit; 97 } 98 99 static const MemoryRegionOps test_ioport_ops = { 100 .read = test_ioport_read, 101 .write = test_ioport_write, 102 .endianness = DEVICE_LITTLE_ENDIAN, 103 }; 104 105 static void test_flush_page(void *opaque, hwaddr addr, uint64_t data, 106 unsigned len) 107 { 108 hwaddr page = 4096; 109 void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0); 110 111 /* We might not be able to get the full page, only mprotect what we actually 112 have mapped */ 113 #if defined(CONFIG_POSIX) 114 mprotect(a, page, PROT_NONE); 115 mprotect(a, page, PROT_READ|PROT_WRITE); 116 #endif 117 cpu_physical_memory_unmap(a, page, 0, 0); 118 } 119 120 static const MemoryRegionOps test_flush_ops = { 121 .write = test_flush_page, 122 .valid.min_access_size = 4, 123 .valid.max_access_size = 4, 124 .endianness = DEVICE_LITTLE_ENDIAN, 125 }; 126 127 static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len) 128 { 129 PCTestdev *dev = opaque; 130 uint64_t ret = 0; 131 memcpy(&ret, &dev->iomem_buf[addr], len); 132 133 return ret; 134 } 135 136 static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val, 137 unsigned len) 138 { 139 PCTestdev *dev = opaque; 140 memcpy(&dev->iomem_buf[addr], &val, len); 141 dev->iomem_buf[addr] = val; 142 } 143 144 static const MemoryRegionOps test_iomem_ops = { 145 .read = test_iomem_read, 146 .write = test_iomem_write, 147 .endianness = DEVICE_LITTLE_ENDIAN, 148 }; 149 150 static void testdev_realizefn(DeviceState *d, Error **errp) 151 { 152 ISADevice *isa = ISA_DEVICE(d); 153 PCTestdev *dev = TESTDEV(d); 154 MemoryRegion *mem = isa_address_space(isa); 155 MemoryRegion *io = isa_address_space_io(isa); 156 157 memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev, 158 "pc-testdev-ioport", 4); 159 memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev, 160 "pc-testdev-flush-page", 4); 161 memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev, 162 "pc-testdev-irq-line", 24); 163 memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev, 164 "pc-testdev-iomem", IOMEM_LEN); 165 166 memory_region_add_subregion(io, 0xe0, &dev->ioport); 167 memory_region_add_subregion(io, 0xe4, &dev->flush); 168 memory_region_add_subregion(io, 0x2000, &dev->irq); 169 memory_region_add_subregion(mem, 0xff000000, &dev->iomem); 170 } 171 172 static void testdev_class_init(ObjectClass *klass, void *data) 173 { 174 DeviceClass *dc = DEVICE_CLASS(klass); 175 176 dc->realize = testdev_realizefn; 177 } 178 179 static const TypeInfo testdev_info = { 180 .name = TYPE_TESTDEV, 181 .parent = TYPE_ISA_DEVICE, 182 .instance_size = sizeof(PCTestdev), 183 .class_init = testdev_class_init, 184 }; 185 186 static void testdev_register_types(void) 187 { 188 type_register_static(&testdev_info); 189 } 190 191 type_init(testdev_register_types) 192