1d85937e6SScott Wood /* 2d85937e6SScott Wood * KVM in-kernel OpenPIC 3d85937e6SScott Wood * 4d85937e6SScott Wood * Copyright 2013 Freescale Semiconductor, Inc. 5d85937e6SScott Wood * 6d85937e6SScott Wood * Permission is hereby granted, free of charge, to any person obtaining a copy 7d85937e6SScott Wood * of this software and associated documentation files (the "Software"), to deal 8d85937e6SScott Wood * in the Software without restriction, including without limitation the rights 9d85937e6SScott Wood * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10d85937e6SScott Wood * copies of the Software, and to permit persons to whom the Software is 11d85937e6SScott Wood * furnished to do so, subject to the following conditions: 12d85937e6SScott Wood * 13d85937e6SScott Wood * The above copyright notice and this permission notice shall be included in 14d85937e6SScott Wood * all copies or substantial portions of the Software. 15d85937e6SScott Wood * 16d85937e6SScott Wood * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17d85937e6SScott Wood * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18d85937e6SScott Wood * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19d85937e6SScott Wood * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20d85937e6SScott Wood * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21d85937e6SScott Wood * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22d85937e6SScott Wood * THE SOFTWARE. 23d85937e6SScott Wood */ 24d85937e6SScott Wood 2590191d07SPeter Maydell #include "qemu/osdep.h" 26*da34e65cSMarkus Armbruster #include "qapi/error.h" 27d85937e6SScott Wood #include <sys/ioctl.h> 28d85937e6SScott Wood #include "exec/address-spaces.h" 29d85937e6SScott Wood #include "hw/hw.h" 30d85937e6SScott Wood #include "hw/ppc/openpic.h" 31d85937e6SScott Wood #include "hw/pci/msi.h" 32d85937e6SScott Wood #include "hw/sysbus.h" 33d85937e6SScott Wood #include "sysemu/kvm.h" 34d85937e6SScott Wood #include "qemu/log.h" 35d85937e6SScott Wood 36af354f19SAlexander Graf #define GCR_RESET 0x80000000 37af354f19SAlexander Graf 38dd49c038SAndreas Färber #define KVM_OPENPIC(obj) \ 39dd49c038SAndreas Färber OBJECT_CHECK(KVMOpenPICState, (obj), TYPE_KVM_OPENPIC) 40dd49c038SAndreas Färber 41d85937e6SScott Wood typedef struct KVMOpenPICState { 42dd49c038SAndreas Färber /*< private >*/ 43dd49c038SAndreas Färber SysBusDevice parent_obj; 44dd49c038SAndreas Färber /*< public >*/ 45dd49c038SAndreas Färber 46d85937e6SScott Wood MemoryRegion mem; 47d85937e6SScott Wood MemoryListener mem_listener; 48d85937e6SScott Wood uint32_t fd; 49d85937e6SScott Wood uint32_t model; 509ac58dc5SAlexander Graf hwaddr mapped; 51d85937e6SScott Wood } KVMOpenPICState; 52d85937e6SScott Wood 53d85937e6SScott Wood static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level) 54d85937e6SScott Wood { 55d85937e6SScott Wood kvm_set_irq(kvm_state, n_IRQ, level); 56d85937e6SScott Wood } 57d85937e6SScott Wood 58d85937e6SScott Wood static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val, 59d85937e6SScott Wood unsigned size) 60d85937e6SScott Wood { 61d85937e6SScott Wood KVMOpenPICState *opp = opaque; 62d85937e6SScott Wood struct kvm_device_attr attr; 63d85937e6SScott Wood uint32_t val32 = val; 64d85937e6SScott Wood int ret; 65d85937e6SScott Wood 66d85937e6SScott Wood attr.group = KVM_DEV_MPIC_GRP_REGISTER; 67d85937e6SScott Wood attr.attr = addr; 68d85937e6SScott Wood attr.addr = (uint64_t)(unsigned long)&val32; 69d85937e6SScott Wood 70d85937e6SScott Wood ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 71d85937e6SScott Wood if (ret < 0) { 72d85937e6SScott Wood qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__, 73d85937e6SScott Wood strerror(errno), attr.attr); 74d85937e6SScott Wood } 75d85937e6SScott Wood } 76d85937e6SScott Wood 77af354f19SAlexander Graf static void kvm_openpic_reset(DeviceState *d) 78af354f19SAlexander Graf { 79af354f19SAlexander Graf KVMOpenPICState *opp = KVM_OPENPIC(d); 80af354f19SAlexander Graf 81af354f19SAlexander Graf /* Trigger the GCR.RESET bit to reset the PIC */ 82af354f19SAlexander Graf kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t)); 83af354f19SAlexander Graf } 84af354f19SAlexander Graf 85d85937e6SScott Wood static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size) 86d85937e6SScott Wood { 87d85937e6SScott Wood KVMOpenPICState *opp = opaque; 88d85937e6SScott Wood struct kvm_device_attr attr; 89d85937e6SScott Wood uint32_t val = 0xdeadbeef; 90d85937e6SScott Wood int ret; 91d85937e6SScott Wood 92d85937e6SScott Wood attr.group = KVM_DEV_MPIC_GRP_REGISTER; 93d85937e6SScott Wood attr.attr = addr; 94d85937e6SScott Wood attr.addr = (uint64_t)(unsigned long)&val; 95d85937e6SScott Wood 96d85937e6SScott Wood ret = ioctl(opp->fd, KVM_GET_DEVICE_ATTR, &attr); 97d85937e6SScott Wood if (ret < 0) { 98d85937e6SScott Wood qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__, 99d85937e6SScott Wood strerror(errno), attr.attr); 100d85937e6SScott Wood return 0; 101d85937e6SScott Wood } 102d85937e6SScott Wood 103d85937e6SScott Wood return val; 104d85937e6SScott Wood } 105d85937e6SScott Wood 106d85937e6SScott Wood static const MemoryRegionOps kvm_openpic_mem_ops = { 107d85937e6SScott Wood .write = kvm_openpic_write, 108d85937e6SScott Wood .read = kvm_openpic_read, 109d85937e6SScott Wood .endianness = DEVICE_BIG_ENDIAN, 110d85937e6SScott Wood .impl = { 111d85937e6SScott Wood .min_access_size = 4, 112d85937e6SScott Wood .max_access_size = 4, 113d85937e6SScott Wood }, 114d85937e6SScott Wood }; 115d85937e6SScott Wood 116d85937e6SScott Wood static void kvm_openpic_region_add(MemoryListener *listener, 117d85937e6SScott Wood MemoryRegionSection *section) 118d85937e6SScott Wood { 119d85937e6SScott Wood KVMOpenPICState *opp = container_of(listener, KVMOpenPICState, 120d85937e6SScott Wood mem_listener); 121d85937e6SScott Wood struct kvm_device_attr attr; 122d85937e6SScott Wood uint64_t reg_base; 123d85937e6SScott Wood int ret; 124d85937e6SScott Wood 125d85937e6SScott Wood if (section->address_space != &address_space_memory) { 126d85937e6SScott Wood abort(); 127d85937e6SScott Wood } 128d85937e6SScott Wood 12987d8354dSAlexander Graf /* Ignore events on regions that are not us */ 13087d8354dSAlexander Graf if (section->mr != &opp->mem) { 13187d8354dSAlexander Graf return; 13287d8354dSAlexander Graf } 13387d8354dSAlexander Graf 1349ac58dc5SAlexander Graf if (opp->mapped) { 1359ac58dc5SAlexander Graf /* 1369ac58dc5SAlexander Graf * We can only map the MPIC once. Since we are already mapped, 1379ac58dc5SAlexander Graf * the best we can do is ignore new maps. 1389ac58dc5SAlexander Graf */ 1399ac58dc5SAlexander Graf return; 1409ac58dc5SAlexander Graf } 1419ac58dc5SAlexander Graf 142d85937e6SScott Wood reg_base = section->offset_within_address_space; 1439ac58dc5SAlexander Graf opp->mapped = reg_base; 144d85937e6SScott Wood 145d85937e6SScott Wood attr.group = KVM_DEV_MPIC_GRP_MISC; 146d85937e6SScott Wood attr.attr = KVM_DEV_MPIC_BASE_ADDR; 147d85937e6SScott Wood attr.addr = (uint64_t)(unsigned long)®_base; 148d85937e6SScott Wood 149d85937e6SScott Wood ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 150d85937e6SScott Wood if (ret < 0) { 151d85937e6SScott Wood fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__, 152d85937e6SScott Wood strerror(errno), reg_base); 153d85937e6SScott Wood } 154d85937e6SScott Wood } 155d85937e6SScott Wood 156d85937e6SScott Wood static void kvm_openpic_region_del(MemoryListener *listener, 157d85937e6SScott Wood MemoryRegionSection *section) 158d85937e6SScott Wood { 159d85937e6SScott Wood KVMOpenPICState *opp = container_of(listener, KVMOpenPICState, 160d85937e6SScott Wood mem_listener); 161d85937e6SScott Wood struct kvm_device_attr attr; 162d85937e6SScott Wood uint64_t reg_base = 0; 163d85937e6SScott Wood int ret; 164d85937e6SScott Wood 16587d8354dSAlexander Graf /* Ignore events on regions that are not us */ 16687d8354dSAlexander Graf if (section->mr != &opp->mem) { 16787d8354dSAlexander Graf return; 16887d8354dSAlexander Graf } 16987d8354dSAlexander Graf 1709ac58dc5SAlexander Graf if (section->offset_within_address_space != opp->mapped) { 1719ac58dc5SAlexander Graf /* 1729ac58dc5SAlexander Graf * We can only map the MPIC once. This mapping was a secondary 1739ac58dc5SAlexander Graf * one that we couldn't fulfill. Ignore it. 1749ac58dc5SAlexander Graf */ 1759ac58dc5SAlexander Graf return; 1769ac58dc5SAlexander Graf } 1779ac58dc5SAlexander Graf opp->mapped = 0; 1789ac58dc5SAlexander Graf 179d85937e6SScott Wood attr.group = KVM_DEV_MPIC_GRP_MISC; 180d85937e6SScott Wood attr.attr = KVM_DEV_MPIC_BASE_ADDR; 181d85937e6SScott Wood attr.addr = (uint64_t)(unsigned long)®_base; 182d85937e6SScott Wood 183d85937e6SScott Wood ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); 184d85937e6SScott Wood if (ret < 0) { 185d85937e6SScott Wood fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__, 186d85937e6SScott Wood strerror(errno), reg_base); 187d85937e6SScott Wood } 188d85937e6SScott Wood } 189d85937e6SScott Wood 190dd49c038SAndreas Färber static void kvm_openpic_init(Object *obj) 191d85937e6SScott Wood { 192dd49c038SAndreas Färber KVMOpenPICState *opp = KVM_OPENPIC(obj); 193dd49c038SAndreas Färber 1941437c94bSPaolo Bonzini memory_region_init_io(&opp->mem, OBJECT(opp), &kvm_openpic_mem_ops, opp, 195dd49c038SAndreas Färber "kvm-openpic", 0x40000); 196dd49c038SAndreas Färber } 197dd49c038SAndreas Färber 198dd49c038SAndreas Färber static void kvm_openpic_realize(DeviceState *dev, Error **errp) 199dd49c038SAndreas Färber { 200dd49c038SAndreas Färber SysBusDevice *d = SYS_BUS_DEVICE(dev); 201dd49c038SAndreas Färber KVMOpenPICState *opp = KVM_OPENPIC(dev); 202d85937e6SScott Wood KVMState *s = kvm_state; 203d85937e6SScott Wood int kvm_openpic_model; 204d85937e6SScott Wood struct kvm_create_device cd = {0}; 205d85937e6SScott Wood int ret, i; 206d85937e6SScott Wood 207d85937e6SScott Wood if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) { 208dd49c038SAndreas Färber error_setg(errp, "Kernel is lacking Device Control API"); 209dd49c038SAndreas Färber return; 210d85937e6SScott Wood } 211d85937e6SScott Wood 212d85937e6SScott Wood switch (opp->model) { 213d85937e6SScott Wood case OPENPIC_MODEL_FSL_MPIC_20: 214d85937e6SScott Wood kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_20; 215d85937e6SScott Wood break; 216d85937e6SScott Wood 217d85937e6SScott Wood case OPENPIC_MODEL_FSL_MPIC_42: 218d85937e6SScott Wood kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_42; 219d85937e6SScott Wood break; 220d85937e6SScott Wood 221d85937e6SScott Wood default: 222dd49c038SAndreas Färber error_setg(errp, "Unsupported OpenPIC model %" PRIu32, opp->model); 223dd49c038SAndreas Färber return; 224d85937e6SScott Wood } 225d85937e6SScott Wood 226d85937e6SScott Wood cd.type = kvm_openpic_model; 227d85937e6SScott Wood ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd); 228d85937e6SScott Wood if (ret < 0) { 229dd49c038SAndreas Färber error_setg(errp, "Can't create device %d: %s", 230dd49c038SAndreas Färber cd.type, strerror(errno)); 231dd49c038SAndreas Färber return; 232d85937e6SScott Wood } 233d85937e6SScott Wood opp->fd = cd.fd; 234d85937e6SScott Wood 235dd49c038SAndreas Färber sysbus_init_mmio(d, &opp->mem); 236dd49c038SAndreas Färber qdev_init_gpio_in(dev, kvm_openpic_set_irq, OPENPIC_MAX_IRQ); 237d85937e6SScott Wood 238d85937e6SScott Wood opp->mem_listener.region_add = kvm_openpic_region_add; 2396f1834a2SPrasad Joshi opp->mem_listener.region_del = kvm_openpic_region_del; 240d85937e6SScott Wood memory_listener_register(&opp->mem_listener, &address_space_memory); 241d85937e6SScott Wood 242d85937e6SScott Wood /* indicate pic capabilities */ 243226419d6SMichael S. Tsirkin msi_nonbroken = true; 244d85937e6SScott Wood kvm_kernel_irqchip = true; 245d85937e6SScott Wood kvm_async_interrupts_allowed = true; 246d85937e6SScott Wood 247d85937e6SScott Wood /* set up irq routing */ 248d85937e6SScott Wood kvm_init_irq_routing(kvm_state); 249d85937e6SScott Wood for (i = 0; i < 256; ++i) { 250d85937e6SScott Wood kvm_irqchip_add_irq_route(kvm_state, i, 0, i); 251d85937e6SScott Wood } 252d85937e6SScott Wood 253d85937e6SScott Wood kvm_msi_via_irqfd_allowed = true; 254d85937e6SScott Wood kvm_gsi_routing_allowed = true; 255d85937e6SScott Wood 256d85937e6SScott Wood kvm_irqchip_commit_routes(s); 257d85937e6SScott Wood } 258d85937e6SScott Wood 259d85937e6SScott Wood int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs) 260d85937e6SScott Wood { 261dd49c038SAndreas Färber KVMOpenPICState *opp = KVM_OPENPIC(d); 262d85937e6SScott Wood 26348add816SCornelia Huck return kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_MPIC, 0, opp->fd, 26448add816SCornelia Huck kvm_arch_vcpu_id(cs)); 265d85937e6SScott Wood } 266d85937e6SScott Wood 267d85937e6SScott Wood static Property kvm_openpic_properties[] = { 268d85937e6SScott Wood DEFINE_PROP_UINT32("model", KVMOpenPICState, model, 269d85937e6SScott Wood OPENPIC_MODEL_FSL_MPIC_20), 270d85937e6SScott Wood DEFINE_PROP_END_OF_LIST(), 271d85937e6SScott Wood }; 272d85937e6SScott Wood 273dd49c038SAndreas Färber static void kvm_openpic_class_init(ObjectClass *oc, void *data) 274d85937e6SScott Wood { 275dd49c038SAndreas Färber DeviceClass *dc = DEVICE_CLASS(oc); 276d85937e6SScott Wood 277dd49c038SAndreas Färber dc->realize = kvm_openpic_realize; 278d85937e6SScott Wood dc->props = kvm_openpic_properties; 279d85937e6SScott Wood dc->reset = kvm_openpic_reset; 28029f8dd66SLaurent Vivier set_bit(DEVICE_CATEGORY_MISC, dc->categories); 281d85937e6SScott Wood } 282d85937e6SScott Wood 283d85937e6SScott Wood static const TypeInfo kvm_openpic_info = { 284dd49c038SAndreas Färber .name = TYPE_KVM_OPENPIC, 285d85937e6SScott Wood .parent = TYPE_SYS_BUS_DEVICE, 286d85937e6SScott Wood .instance_size = sizeof(KVMOpenPICState), 287dd49c038SAndreas Färber .instance_init = kvm_openpic_init, 288d85937e6SScott Wood .class_init = kvm_openpic_class_init, 289d85937e6SScott Wood }; 290d85937e6SScott Wood 291d85937e6SScott Wood static void kvm_openpic_register_types(void) 292d85937e6SScott Wood { 293d85937e6SScott Wood type_register_static(&kvm_openpic_info); 294d85937e6SScott Wood } 295d85937e6SScott Wood 296d85937e6SScott Wood type_init(kvm_openpic_register_types) 297