xref: /openbmc/qemu/hw/i386/e820_memory_layout.h (revision 1406b7fc4bbaab42133b1ef03270179746e91723)
1d6d059caSPhilippe Mathieu-Daudé /*
2d6d059caSPhilippe Mathieu-Daudé  * QEMU BIOS e820 routines
3d6d059caSPhilippe Mathieu-Daudé  *
4d6d059caSPhilippe Mathieu-Daudé  * Copyright (c) 2003-2004 Fabrice Bellard
5d6d059caSPhilippe Mathieu-Daudé  *
6d6d059caSPhilippe Mathieu-Daudé  * SPDX-License-Identifier: MIT
7d6d059caSPhilippe Mathieu-Daudé  */
8d6d059caSPhilippe Mathieu-Daudé 
952581c71SMarkus Armbruster #ifndef HW_I386_E820_MEMORY_LAYOUT_H
1052581c71SMarkus Armbruster #define HW_I386_E820_MEMORY_LAYOUT_H
11d6d059caSPhilippe Mathieu-Daudé 
12d6d059caSPhilippe Mathieu-Daudé /* e820 types */
13d6d059caSPhilippe Mathieu-Daudé #define E820_RAM        1
14d6d059caSPhilippe Mathieu-Daudé #define E820_RESERVED   2
15d6d059caSPhilippe Mathieu-Daudé #define E820_ACPI       3
16d6d059caSPhilippe Mathieu-Daudé #define E820_NVS        4
17d6d059caSPhilippe Mathieu-Daudé #define E820_UNUSABLE   5
18d6d059caSPhilippe Mathieu-Daudé 
19d6d059caSPhilippe Mathieu-Daudé struct e820_entry {
20d6d059caSPhilippe Mathieu-Daudé     uint64_t address;
21d6d059caSPhilippe Mathieu-Daudé     uint64_t length;
22d6d059caSPhilippe Mathieu-Daudé     uint32_t type;
23d6d059caSPhilippe Mathieu-Daudé } QEMU_PACKED __attribute((__aligned__(4)));
24d6d059caSPhilippe Mathieu-Daudé 
25*93c76555SDavid Woodhouse void e820_add_entry(uint64_t address, uint64_t length, uint32_t type);
26d6d059caSPhilippe Mathieu-Daudé bool e820_get_entry(int index, uint32_t type,
27d6d059caSPhilippe Mathieu-Daudé                     uint64_t *address, uint64_t *length);
28*93c76555SDavid Woodhouse int e820_get_table(struct e820_entry **table);
29d6d059caSPhilippe Mathieu-Daudé 
30d6d059caSPhilippe Mathieu-Daudé #endif
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