1 /* 2 * QEMU CPU model 3 * 4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see 18 * <http://www.gnu.org/licenses/gpl-2.0.html> 19 */ 20 21 #include "qemu/osdep.h" 22 #include "qapi/error.h" 23 #include "hw/core/cpu.h" 24 #include "sysemu/hw_accel.h" 25 #include "qemu/notify.h" 26 #include "qemu/log.h" 27 #include "qemu/main-loop.h" 28 #include "exec/log.h" 29 #include "exec/cpu-common.h" 30 #include "exec/gdbstub.h" 31 #include "qemu/error-report.h" 32 #include "qemu/qemu-print.h" 33 #include "sysemu/tcg.h" 34 #include "hw/boards.h" 35 #include "hw/qdev-properties.h" 36 #include "trace.h" 37 #include "qemu/plugin.h" 38 39 CPUState *cpu_by_arch_id(int64_t id) 40 { 41 CPUState *cpu; 42 43 CPU_FOREACH(cpu) { 44 CPUClass *cc = CPU_GET_CLASS(cpu); 45 46 if (cc->get_arch_id(cpu) == id) { 47 return cpu; 48 } 49 } 50 return NULL; 51 } 52 53 bool cpu_exists(int64_t id) 54 { 55 return !!cpu_by_arch_id(id); 56 } 57 58 CPUState *cpu_create(const char *typename) 59 { 60 Error *err = NULL; 61 CPUState *cpu = CPU(object_new(typename)); 62 if (!qdev_realize(DEVICE(cpu), NULL, &err)) { 63 error_report_err(err); 64 object_unref(OBJECT(cpu)); 65 exit(EXIT_FAILURE); 66 } 67 return cpu; 68 } 69 70 /* Resetting the IRQ comes from across the code base so we take the 71 * BQL here if we need to. cpu_interrupt assumes it is held.*/ 72 void cpu_reset_interrupt(CPUState *cpu, int mask) 73 { 74 bool need_lock = !bql_locked(); 75 76 if (need_lock) { 77 bql_lock(); 78 } 79 cpu->interrupt_request &= ~mask; 80 if (need_lock) { 81 bql_unlock(); 82 } 83 } 84 85 void cpu_exit(CPUState *cpu) 86 { 87 qatomic_set(&cpu->exit_request, 1); 88 /* Ensure cpu_exec will see the exit request after TCG has exited. */ 89 smp_wmb(); 90 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); 91 } 92 93 static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) 94 { 95 return 0; 96 } 97 98 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) 99 { 100 return 0; 101 } 102 103 void cpu_dump_state(CPUState *cpu, FILE *f, int flags) 104 { 105 CPUClass *cc = CPU_GET_CLASS(cpu); 106 107 if (cc->dump_state) { 108 cpu_synchronize_state(cpu); 109 cc->dump_state(cpu, f, flags); 110 } 111 } 112 113 void cpu_reset(CPUState *cpu) 114 { 115 device_cold_reset(DEVICE(cpu)); 116 117 trace_cpu_reset(cpu->cpu_index); 118 } 119 120 static void cpu_common_reset_hold(Object *obj) 121 { 122 CPUState *cpu = CPU(obj); 123 CPUClass *cc = CPU_GET_CLASS(cpu); 124 125 if (qemu_loglevel_mask(CPU_LOG_RESET)) { 126 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index); 127 log_cpu_state(cpu, cc->reset_dump_flags); 128 } 129 130 cpu->interrupt_request = 0; 131 cpu->halted = cpu->start_powered_off; 132 cpu->mem_io_pc = 0; 133 cpu->icount_extra = 0; 134 qatomic_set(&cpu->neg.icount_decr.u32, 0); 135 cpu->neg.can_do_io = true; 136 cpu->exception_index = -1; 137 cpu->crash_occurred = false; 138 cpu->cflags_next_tb = -1; 139 140 cpu_exec_reset_hold(cpu); 141 } 142 143 static bool cpu_common_has_work(CPUState *cs) 144 { 145 return false; 146 } 147 148 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) 149 { 150 ObjectClass *oc; 151 CPUClass *cc; 152 153 oc = object_class_by_name(typename); 154 cc = CPU_CLASS(oc); 155 assert(cc->class_by_name); 156 assert(cpu_model); 157 oc = cc->class_by_name(cpu_model); 158 if (object_class_dynamic_cast(oc, typename) && 159 !object_class_is_abstract(oc)) { 160 return oc; 161 } 162 163 return NULL; 164 } 165 166 static void cpu_common_parse_features(const char *typename, char *features, 167 Error **errp) 168 { 169 char *val; 170 static bool cpu_globals_initialized; 171 /* Single "key=value" string being parsed */ 172 char *featurestr = features ? strtok(features, ",") : NULL; 173 174 /* should be called only once, catch invalid users */ 175 assert(!cpu_globals_initialized); 176 cpu_globals_initialized = true; 177 178 while (featurestr) { 179 val = strchr(featurestr, '='); 180 if (val) { 181 GlobalProperty *prop = g_new0(typeof(*prop), 1); 182 *val = 0; 183 val++; 184 prop->driver = typename; 185 prop->property = g_strdup(featurestr); 186 prop->value = g_strdup(val); 187 qdev_prop_register_global(prop); 188 } else { 189 error_setg(errp, "Expected key=value format, found %s.", 190 featurestr); 191 return; 192 } 193 featurestr = strtok(NULL, ","); 194 } 195 } 196 197 static void cpu_common_realizefn(DeviceState *dev, Error **errp) 198 { 199 CPUState *cpu = CPU(dev); 200 Object *machine = qdev_get_machine(); 201 202 /* qdev_get_machine() can return something that's not TYPE_MACHINE 203 * if this is one of the user-only emulators; in that case there's 204 * no need to check the ignore_memory_transaction_failures board flag. 205 */ 206 if (object_dynamic_cast(machine, TYPE_MACHINE)) { 207 MachineClass *mc = MACHINE_GET_CLASS(machine); 208 209 if (mc) { 210 cpu->ignore_memory_transaction_failures = 211 mc->ignore_memory_transaction_failures; 212 } 213 } 214 215 if (dev->hotplugged) { 216 cpu_synchronize_post_init(cpu); 217 cpu_resume(cpu); 218 } 219 220 /* Plugin initialization must wait until the cpu is fully realized. */ 221 if (tcg_enabled()) { 222 qemu_plugin_vcpu_init_hook(cpu); 223 } 224 225 /* NOTE: latest generic point where the cpu is fully realized */ 226 } 227 228 static void cpu_common_unrealizefn(DeviceState *dev) 229 { 230 CPUState *cpu = CPU(dev); 231 232 /* Call the plugin hook before clearing the cpu is fully unrealized */ 233 if (tcg_enabled()) { 234 qemu_plugin_vcpu_exit_hook(cpu); 235 } 236 237 /* NOTE: latest generic point before the cpu is fully unrealized */ 238 cpu_exec_unrealizefn(cpu); 239 } 240 241 static void cpu_common_initfn(Object *obj) 242 { 243 CPUState *cpu = CPU(obj); 244 245 gdb_init_cpu(cpu); 246 cpu->cpu_index = UNASSIGNED_CPU_INDEX; 247 cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX; 248 /* user-mode doesn't have configurable SMP topology */ 249 /* the default value is changed by qemu_init_vcpu() for system-mode */ 250 cpu->nr_cores = 1; 251 cpu->nr_threads = 1; 252 cpu->cflags_next_tb = -1; 253 254 qemu_mutex_init(&cpu->work_mutex); 255 qemu_lockcnt_init(&cpu->in_ioctl_lock); 256 QSIMPLEQ_INIT(&cpu->work_list); 257 QTAILQ_INIT(&cpu->breakpoints); 258 QTAILQ_INIT(&cpu->watchpoints); 259 260 cpu_exec_initfn(cpu); 261 } 262 263 static void cpu_common_finalize(Object *obj) 264 { 265 CPUState *cpu = CPU(obj); 266 267 g_array_free(cpu->gdb_regs, TRUE); 268 qemu_lockcnt_destroy(&cpu->in_ioctl_lock); 269 qemu_mutex_destroy(&cpu->work_mutex); 270 } 271 272 static int64_t cpu_common_get_arch_id(CPUState *cpu) 273 { 274 return cpu->cpu_index; 275 } 276 277 static void cpu_common_class_init(ObjectClass *klass, void *data) 278 { 279 DeviceClass *dc = DEVICE_CLASS(klass); 280 ResettableClass *rc = RESETTABLE_CLASS(klass); 281 CPUClass *k = CPU_CLASS(klass); 282 283 k->parse_features = cpu_common_parse_features; 284 k->get_arch_id = cpu_common_get_arch_id; 285 k->has_work = cpu_common_has_work; 286 k->gdb_read_register = cpu_common_gdb_read_register; 287 k->gdb_write_register = cpu_common_gdb_write_register; 288 set_bit(DEVICE_CATEGORY_CPU, dc->categories); 289 dc->realize = cpu_common_realizefn; 290 dc->unrealize = cpu_common_unrealizefn; 291 rc->phases.hold = cpu_common_reset_hold; 292 cpu_class_init_props(dc); 293 /* 294 * Reason: CPUs still need special care by board code: wiring up 295 * IRQs, adding reset handlers, halting non-first CPUs, ... 296 */ 297 dc->user_creatable = false; 298 } 299 300 static const TypeInfo cpu_type_info = { 301 .name = TYPE_CPU, 302 .parent = TYPE_DEVICE, 303 .instance_size = sizeof(CPUState), 304 .instance_init = cpu_common_initfn, 305 .instance_finalize = cpu_common_finalize, 306 .abstract = true, 307 .class_size = sizeof(CPUClass), 308 .class_init = cpu_common_class_init, 309 }; 310 311 static void cpu_register_types(void) 312 { 313 type_register_static(&cpu_type_info); 314 } 315 316 type_init(cpu_register_types) 317