1af55b781SPhilippe Mathieu-Daudé /* 2af55b781SPhilippe Mathieu-Daudé * QEMU ATmega MCU 3af55b781SPhilippe Mathieu-Daudé * 4af55b781SPhilippe Mathieu-Daudé * Copyright (c) 2019-2020 Philippe Mathieu-Daudé 5af55b781SPhilippe Mathieu-Daudé * 6af55b781SPhilippe Mathieu-Daudé * This work is licensed under the terms of the GNU GPLv2 or later. 7af55b781SPhilippe Mathieu-Daudé * See the COPYING file in the top-level directory. 8af55b781SPhilippe Mathieu-Daudé * SPDX-License-Identifier: GPL-2.0-or-later 9af55b781SPhilippe Mathieu-Daudé */ 10af55b781SPhilippe Mathieu-Daudé 11af55b781SPhilippe Mathieu-Daudé #ifndef HW_AVR_ATMEGA_H 12af55b781SPhilippe Mathieu-Daudé #define HW_AVR_ATMEGA_H 13af55b781SPhilippe Mathieu-Daudé 14af55b781SPhilippe Mathieu-Daudé #include "hw/char/avr_usart.h" 15af55b781SPhilippe Mathieu-Daudé #include "hw/timer/avr_timer16.h" 16af55b781SPhilippe Mathieu-Daudé #include "hw/misc/avr_power.h" 17af55b781SPhilippe Mathieu-Daudé #include "target/avr/cpu.h" 18db1015e9SEduardo Habkost #include "qom/object.h" 19af55b781SPhilippe Mathieu-Daudé 20af55b781SPhilippe Mathieu-Daudé #define TYPE_ATMEGA_MCU "ATmega" 21af55b781SPhilippe Mathieu-Daudé #define TYPE_ATMEGA168_MCU "ATmega168" 22af55b781SPhilippe Mathieu-Daudé #define TYPE_ATMEGA328_MCU "ATmega328" 23af55b781SPhilippe Mathieu-Daudé #define TYPE_ATMEGA1280_MCU "ATmega1280" 24af55b781SPhilippe Mathieu-Daudé #define TYPE_ATMEGA2560_MCU "ATmega2560" 25af55b781SPhilippe Mathieu-Daudé 26db1015e9SEduardo Habkost typedef struct AtmegaMcuState AtmegaMcuState; 27*8110fa1dSEduardo Habkost DECLARE_INSTANCE_CHECKER(AtmegaMcuState, ATMEGA_MCU, 28*8110fa1dSEduardo Habkost TYPE_ATMEGA_MCU) 29af55b781SPhilippe Mathieu-Daudé 30af55b781SPhilippe Mathieu-Daudé #define POWER_MAX 2 31af55b781SPhilippe Mathieu-Daudé #define USART_MAX 4 32af55b781SPhilippe Mathieu-Daudé #define TIMER_MAX 6 33af55b781SPhilippe Mathieu-Daudé #define GPIO_MAX 12 34af55b781SPhilippe Mathieu-Daudé 35db1015e9SEduardo Habkost struct AtmegaMcuState { 36af55b781SPhilippe Mathieu-Daudé /*< private >*/ 37af55b781SPhilippe Mathieu-Daudé SysBusDevice parent_obj; 38af55b781SPhilippe Mathieu-Daudé /*< public >*/ 39af55b781SPhilippe Mathieu-Daudé 40af55b781SPhilippe Mathieu-Daudé AVRCPU cpu; 41af55b781SPhilippe Mathieu-Daudé MemoryRegion flash; 42af55b781SPhilippe Mathieu-Daudé MemoryRegion eeprom; 43af55b781SPhilippe Mathieu-Daudé MemoryRegion sram; 44af55b781SPhilippe Mathieu-Daudé DeviceState *io; 45af55b781SPhilippe Mathieu-Daudé AVRMaskState pwr[POWER_MAX]; 46af55b781SPhilippe Mathieu-Daudé AVRUsartState usart[USART_MAX]; 47af55b781SPhilippe Mathieu-Daudé AVRTimer16State timer[TIMER_MAX]; 48af55b781SPhilippe Mathieu-Daudé uint64_t xtal_freq_hz; 49db1015e9SEduardo Habkost }; 50af55b781SPhilippe Mathieu-Daudé 51af55b781SPhilippe Mathieu-Daudé #endif /* HW_AVR_ATMEGA_H */ 52