xref: /openbmc/qemu/hw/audio/pl041.hx (revision 47b5264eb3e1cd2825e48d28fd0d1b239ed53974)
1*49ab747fSPaolo Bonzini/*
2*49ab747fSPaolo Bonzini * Arm PrimeCell PL041 Advanced Audio Codec Interface
3*49ab747fSPaolo Bonzini *
4*49ab747fSPaolo Bonzini * Copyright (c) 2011
5*49ab747fSPaolo Bonzini * Written by Mathieu Sonet - www.elasticsheep.com
6*49ab747fSPaolo Bonzini *
7*49ab747fSPaolo Bonzini * This code is licensed under the GPL.
8*49ab747fSPaolo Bonzini *
9*49ab747fSPaolo Bonzini * *****************************************************************
10*49ab747fSPaolo Bonzini */
11*49ab747fSPaolo Bonzini
12*49ab747fSPaolo Bonzini/* PL041 register file description */
13*49ab747fSPaolo Bonzini
14*49ab747fSPaolo BonziniREGISTER( rxcr1,   0x00 )
15*49ab747fSPaolo BonziniREGISTER( txcr1,   0x04 )
16*49ab747fSPaolo BonziniREGISTER( sr1,     0x08 )
17*49ab747fSPaolo BonziniREGISTER( isr1,    0x0C )
18*49ab747fSPaolo BonziniREGISTER( ie1,     0x10 )
19*49ab747fSPaolo BonziniREGISTER( rxcr2,   0x14 )
20*49ab747fSPaolo BonziniREGISTER( txcr2,   0x18 )
21*49ab747fSPaolo BonziniREGISTER( sr2,     0x1C )
22*49ab747fSPaolo BonziniREGISTER( isr2,    0x20 )
23*49ab747fSPaolo BonziniREGISTER( ie2,     0x24 )
24*49ab747fSPaolo BonziniREGISTER( rxcr3,   0x28 )
25*49ab747fSPaolo BonziniREGISTER( txcr3,   0x2C )
26*49ab747fSPaolo BonziniREGISTER( sr3,     0x30 )
27*49ab747fSPaolo BonziniREGISTER( isr3,    0x34 )
28*49ab747fSPaolo BonziniREGISTER( ie3,     0x38 )
29*49ab747fSPaolo BonziniREGISTER( rxcr4,   0x3C )
30*49ab747fSPaolo BonziniREGISTER( txcr4,   0x40 )
31*49ab747fSPaolo BonziniREGISTER( sr4,     0x44 )
32*49ab747fSPaolo BonziniREGISTER( isr4,    0x48 )
33*49ab747fSPaolo BonziniREGISTER( ie4,     0x4C )
34*49ab747fSPaolo BonziniREGISTER( sl1rx,   0x50 )
35*49ab747fSPaolo BonziniREGISTER( sl1tx,   0x54 )
36*49ab747fSPaolo BonziniREGISTER( sl2rx,   0x58 )
37*49ab747fSPaolo BonziniREGISTER( sl2tx,   0x5C )
38*49ab747fSPaolo BonziniREGISTER( sl12rx,  0x60 )
39*49ab747fSPaolo BonziniREGISTER( sl12tx,  0x64 )
40*49ab747fSPaolo BonziniREGISTER( slfr,    0x68 )
41*49ab747fSPaolo BonziniREGISTER( slistat, 0x6C )
42*49ab747fSPaolo BonziniREGISTER( slien,   0x70 )
43*49ab747fSPaolo BonziniREGISTER( intclr,  0x74 )
44*49ab747fSPaolo BonziniREGISTER( maincr,  0x78 )
45*49ab747fSPaolo BonziniREGISTER( reset,   0x7C )
46*49ab747fSPaolo BonziniREGISTER( sync,    0x80 )
47*49ab747fSPaolo BonziniREGISTER( allints, 0x84 )
48*49ab747fSPaolo BonziniREGISTER( mainfr,  0x88 )
49*49ab747fSPaolo BonziniREGISTER( unused,  0x8C )
50*49ab747fSPaolo BonziniREGISTER( dr1_0,   0x90 )
51*49ab747fSPaolo BonziniREGISTER( dr1_1,   0x94 )
52*49ab747fSPaolo BonziniREGISTER( dr1_2,   0x98 )
53*49ab747fSPaolo BonziniREGISTER( dr1_3,   0x9C )
54*49ab747fSPaolo BonziniREGISTER( dr1_4,   0xA0 )
55*49ab747fSPaolo BonziniREGISTER( dr1_5,   0xA4 )
56*49ab747fSPaolo BonziniREGISTER( dr1_6,   0xA8 )
57*49ab747fSPaolo BonziniREGISTER( dr1_7,   0xAC )
58*49ab747fSPaolo BonziniREGISTER( dr2_0,   0xB0 )
59*49ab747fSPaolo BonziniREGISTER( dr2_1,   0xB4 )
60*49ab747fSPaolo BonziniREGISTER( dr2_2,   0xB8 )
61*49ab747fSPaolo BonziniREGISTER( dr2_3,   0xBC )
62*49ab747fSPaolo BonziniREGISTER( dr2_4,   0xC0 )
63*49ab747fSPaolo BonziniREGISTER( dr2_5,   0xC4 )
64*49ab747fSPaolo BonziniREGISTER( dr2_6,   0xC8 )
65*49ab747fSPaolo BonziniREGISTER( dr2_7,   0xCC )
66*49ab747fSPaolo BonziniREGISTER( dr3_0,   0xD0 )
67*49ab747fSPaolo BonziniREGISTER( dr3_1,   0xD4 )
68*49ab747fSPaolo BonziniREGISTER( dr3_2,   0xD8 )
69*49ab747fSPaolo BonziniREGISTER( dr3_3,   0xDC )
70*49ab747fSPaolo BonziniREGISTER( dr3_4,   0xE0 )
71*49ab747fSPaolo BonziniREGISTER( dr3_5,   0xE4 )
72*49ab747fSPaolo BonziniREGISTER( dr3_6,   0xE8 )
73*49ab747fSPaolo BonziniREGISTER( dr3_7,   0xEC )
74*49ab747fSPaolo BonziniREGISTER( dr4_0,   0xF0 )
75*49ab747fSPaolo BonziniREGISTER( dr4_1,   0xF4 )
76*49ab747fSPaolo BonziniREGISTER( dr4_2,   0xF8 )
77*49ab747fSPaolo BonziniREGISTER( dr4_3,   0xFC )
78*49ab747fSPaolo BonziniREGISTER( dr4_4,   0x100 )
79*49ab747fSPaolo BonziniREGISTER( dr4_5,   0x104 )
80*49ab747fSPaolo BonziniREGISTER( dr4_6,   0x108 )
81*49ab747fSPaolo BonziniREGISTER( dr4_7,   0x10C )
82