1 /* 2 * Raspberry Pi emulation (c) 2012 Gregory Estrade 3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous 4 * 5 * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft 6 * Written by Andrew Baumann 7 * 8 * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti 9 * Upstream code cleanup (c) 2018 Pekka Enberg 10 * 11 * This code is licensed under the GNU GPLv2 and later. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qapi/error.h" 16 #include "qemu-common.h" 17 #include "cpu.h" 18 #include "hw/arm/bcm2836.h" 19 #include "qemu/error-report.h" 20 #include "hw/boards.h" 21 #include "hw/loader.h" 22 #include "hw/arm/arm.h" 23 #include "sysemu/sysemu.h" 24 25 #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ 26 #define MVBAR_ADDR 0x400 /* secure vectors */ 27 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */ 28 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */ 29 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ 30 31 /* Table of Linux board IDs for different Pi versions */ 32 static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44}; 33 34 typedef struct RasPiState { 35 BCM283XState soc; 36 MemoryRegion ram; 37 } RasPiState; 38 39 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) 40 { 41 static const uint32_t smpboot[] = { 42 0xe1a0e00f, /* mov lr, pc */ 43 0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */ 44 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */ 45 0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */ 46 0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */ 47 0xe320f001, /* 1: yield */ 48 0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/ 49 0xe3530000, /* cmp r3, #0 ;spin while zero */ 50 0x0afffffb, /* beq 1b */ 51 0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */ 52 0xe12fff13, /* bx r3 ;jump to target */ 53 0x400000cc, /* (constant: mailbox 3 read/clear base) */ 54 }; 55 56 /* check that we don't overrun board setup vectors */ 57 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); 58 /* check that board setup address is correctly relocated */ 59 QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0 60 || (BOARDSETUP_ADDR >> 4) >= 0x100); 61 62 rom_add_blob_fixed("raspi_smpboot", smpboot, sizeof(smpboot), 63 info->smp_loader_start); 64 } 65 66 static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) 67 { 68 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); 69 } 70 71 static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info) 72 { 73 CPUState *cs = CPU(cpu); 74 cpu_set_pc(cs, info->smp_loader_start); 75 } 76 77 static void setup_boot(MachineState *machine, int version, size_t ram_size) 78 { 79 static struct arm_boot_info binfo; 80 int r; 81 82 binfo.board_id = raspi_boardid[version]; 83 binfo.ram_size = ram_size; 84 binfo.nb_cpus = smp_cpus; 85 86 if (version <= 2) { 87 /* The rpi1 and 2 require some custom setup code to run in Secure 88 * mode before booting a kernel (to set up the SMC vectors so 89 * that we get a no-op SMC; this is used by Linux to call the 90 * firmware for some cache maintenance operations. 91 * The rpi3 doesn't need this. 92 */ 93 binfo.board_setup_addr = BOARDSETUP_ADDR; 94 binfo.write_board_setup = write_board_setup; 95 binfo.secure_board_setup = true; 96 binfo.secure_boot = true; 97 } 98 99 /* Pi2 and Pi3 requires SMP setup */ 100 if (version >= 2) { 101 binfo.smp_loader_start = SMPBOOT_ADDR; 102 binfo.write_secondary_boot = write_smpboot; 103 binfo.secondary_cpu_reset_hook = reset_secondary; 104 } 105 106 /* If the user specified a "firmware" image (e.g. UEFI), we bypass 107 * the normal Linux boot process 108 */ 109 if (machine->firmware) { 110 hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2; 111 /* load the firmware image (typically kernel.img) */ 112 r = load_image_targphys(machine->firmware, firmware_addr, 113 ram_size - firmware_addr); 114 if (r < 0) { 115 error_report("Failed to load firmware from %s", machine->firmware); 116 exit(1); 117 } 118 119 binfo.entry = firmware_addr; 120 binfo.firmware_loaded = true; 121 } else { 122 binfo.kernel_filename = machine->kernel_filename; 123 binfo.kernel_cmdline = machine->kernel_cmdline; 124 binfo.initrd_filename = machine->initrd_filename; 125 } 126 127 arm_load_kernel(ARM_CPU(first_cpu), &binfo); 128 } 129 130 static void raspi_init(MachineState *machine, int version) 131 { 132 RasPiState *s = g_new0(RasPiState, 1); 133 uint32_t vcram_size; 134 DriveInfo *di; 135 BlockBackend *blk; 136 BusState *bus; 137 DeviceState *carddev; 138 139 object_initialize(&s->soc, sizeof(s->soc), TYPE_BCM283X); 140 object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), 141 &error_abort); 142 143 /* Allocate and map RAM */ 144 memory_region_allocate_system_memory(&s->ram, OBJECT(machine), "ram", 145 machine->ram_size); 146 /* FIXME: Remove when we have custom CPU address space support */ 147 memory_region_add_subregion_overlap(get_system_memory(), 0, &s->ram, 0); 148 149 /* Setup the SOC */ 150 object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram), 151 &error_abort); 152 object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", 153 &error_abort); 154 object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus", 155 &error_abort); 156 int board_rev = version == 3 ? 0xa02082 : 0xa21041; 157 object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", 158 &error_abort); 159 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); 160 161 /* Create and plug in the SD cards */ 162 di = drive_get_next(IF_SD); 163 blk = di ? blk_by_legacy_dinfo(di) : NULL; 164 bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus"); 165 if (bus == NULL) { 166 error_report("No SD bus found in SOC object"); 167 exit(1); 168 } 169 carddev = qdev_create(bus, TYPE_SD_CARD); 170 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal); 171 object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal); 172 173 vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size", 174 &error_abort); 175 setup_boot(machine, version, machine->ram_size - vcram_size); 176 } 177 178 static void raspi2_init(MachineState *machine) 179 { 180 raspi_init(machine, 2); 181 } 182 183 static void raspi2_machine_init(MachineClass *mc) 184 { 185 mc->desc = "Raspberry Pi 2"; 186 mc->init = raspi2_init; 187 mc->block_default_type = IF_SD; 188 mc->no_parallel = 1; 189 mc->no_floppy = 1; 190 mc->no_cdrom = 1; 191 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); 192 mc->max_cpus = BCM283X_NCPUS; 193 mc->min_cpus = BCM283X_NCPUS; 194 mc->default_cpus = BCM283X_NCPUS; 195 mc->default_ram_size = 1024 * 1024 * 1024; 196 mc->ignore_memory_transaction_failures = true; 197 }; 198 DEFINE_MACHINE("raspi2", raspi2_machine_init) 199 200 #ifdef TARGET_AARCH64 201 static void raspi3_init(MachineState *machine) 202 { 203 raspi_init(machine, 3); 204 } 205 206 static void raspi3_machine_init(MachineClass *mc) 207 { 208 mc->desc = "Raspberry Pi 3"; 209 mc->init = raspi3_init; 210 mc->block_default_type = IF_SD; 211 mc->no_parallel = 1; 212 mc->no_floppy = 1; 213 mc->no_cdrom = 1; 214 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"); 215 mc->max_cpus = BCM283X_NCPUS; 216 mc->min_cpus = BCM283X_NCPUS; 217 mc->default_cpus = BCM283X_NCPUS; 218 mc->default_ram_size = 1024 * 1024 * 1024; 219 } 220 DEFINE_MACHINE("raspi3", raspi3_machine_init) 221 #endif 222