1 /* 2 * ARM kernel loader. 3 * 4 * Copyright (c) 2006-2007 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the GPL. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "hw/hw.h" 12 #include "hw/arm/arm.h" 13 #include "hw/arm/linux-boot-if.h" 14 #include "sysemu/kvm.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/boards.h" 17 #include "hw/loader.h" 18 #include "elf.h" 19 #include "sysemu/device_tree.h" 20 #include "qemu/config-file.h" 21 #include "exec/address-spaces.h" 22 23 /* Kernel boot protocol is specified in the kernel docs 24 * Documentation/arm/Booting and Documentation/arm64/booting.txt 25 * They have different preferred image load offsets from system RAM base. 26 */ 27 #define KERNEL_ARGS_ADDR 0x100 28 #define KERNEL_LOAD_ADDR 0x00010000 29 #define KERNEL64_LOAD_ADDR 0x00080000 30 31 typedef enum { 32 FIXUP_NONE = 0, /* do nothing */ 33 FIXUP_TERMINATOR, /* end of insns */ 34 FIXUP_BOARDID, /* overwrite with board ID number */ 35 FIXUP_BOARD_SETUP, /* overwrite with board specific setup code address */ 36 FIXUP_ARGPTR, /* overwrite with pointer to kernel args */ 37 FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */ 38 FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */ 39 FIXUP_BOOTREG, /* overwrite with boot register address */ 40 FIXUP_DSB, /* overwrite with correct DSB insn for cpu */ 41 FIXUP_MAX, 42 } FixupType; 43 44 typedef struct ARMInsnFixup { 45 uint32_t insn; 46 FixupType fixup; 47 } ARMInsnFixup; 48 49 static const ARMInsnFixup bootloader_aarch64[] = { 50 { 0x580000c0 }, /* ldr x0, arg ; Load the lower 32-bits of DTB */ 51 { 0xaa1f03e1 }, /* mov x1, xzr */ 52 { 0xaa1f03e2 }, /* mov x2, xzr */ 53 { 0xaa1f03e3 }, /* mov x3, xzr */ 54 { 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry */ 55 { 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */ 56 { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */ 57 { 0 }, /* .word @DTB Higher 32-bits */ 58 { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */ 59 { 0 }, /* .word @Kernel Entry Higher 32-bits */ 60 { 0, FIXUP_TERMINATOR } 61 }; 62 63 /* A very small bootloader: call the board-setup code (if needed), 64 * set r0-r2, then jump to the kernel. 65 * If we're not calling boot setup code then we don't copy across 66 * the first BOOTLOADER_NO_BOARD_SETUP_OFFSET insns in this array. 67 */ 68 69 static const ARMInsnFixup bootloader[] = { 70 { 0xe28fe008 }, /* add lr, pc, #8 */ 71 { 0xe51ff004 }, /* ldr pc, [pc, #-4] */ 72 { 0, FIXUP_BOARD_SETUP }, 73 #define BOOTLOADER_NO_BOARD_SETUP_OFFSET 3 74 { 0xe3a00000 }, /* mov r0, #0 */ 75 { 0xe59f1004 }, /* ldr r1, [pc, #4] */ 76 { 0xe59f2004 }, /* ldr r2, [pc, #4] */ 77 { 0xe59ff004 }, /* ldr pc, [pc, #4] */ 78 { 0, FIXUP_BOARDID }, 79 { 0, FIXUP_ARGPTR }, 80 { 0, FIXUP_ENTRYPOINT }, 81 { 0, FIXUP_TERMINATOR } 82 }; 83 84 /* Handling for secondary CPU boot in a multicore system. 85 * Unlike the uniprocessor/primary CPU boot, this is platform 86 * dependent. The default code here is based on the secondary 87 * CPU boot protocol used on realview/vexpress boards, with 88 * some parameterisation to increase its flexibility. 89 * QEMU platform models for which this code is not appropriate 90 * should override write_secondary_boot and secondary_cpu_reset_hook 91 * instead. 92 * 93 * This code enables the interrupt controllers for the secondary 94 * CPUs and then puts all the secondary CPUs into a loop waiting 95 * for an interprocessor interrupt and polling a configurable 96 * location for the kernel secondary CPU entry point. 97 */ 98 #define DSB_INSN 0xf57ff04f 99 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */ 100 101 static const ARMInsnFixup smpboot[] = { 102 { 0xe59f2028 }, /* ldr r2, gic_cpu_if */ 103 { 0xe59f0028 }, /* ldr r0, bootreg_addr */ 104 { 0xe3a01001 }, /* mov r1, #1 */ 105 { 0xe5821000 }, /* str r1, [r2] - set GICC_CTLR.Enable */ 106 { 0xe3a010ff }, /* mov r1, #0xff */ 107 { 0xe5821004 }, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */ 108 { 0, FIXUP_DSB }, /* dsb */ 109 { 0xe320f003 }, /* wfi */ 110 { 0xe5901000 }, /* ldr r1, [r0] */ 111 { 0xe1110001 }, /* tst r1, r1 */ 112 { 0x0afffffb }, /* beq <wfi> */ 113 { 0xe12fff11 }, /* bx r1 */ 114 { 0, FIXUP_GIC_CPU_IF }, /* gic_cpu_if: .word 0x.... */ 115 { 0, FIXUP_BOOTREG }, /* bootreg_addr: .word 0x.... */ 116 { 0, FIXUP_TERMINATOR } 117 }; 118 119 static void write_bootloader(const char *name, hwaddr addr, 120 const ARMInsnFixup *insns, uint32_t *fixupcontext) 121 { 122 /* Fix up the specified bootloader fragment and write it into 123 * guest memory using rom_add_blob_fixed(). fixupcontext is 124 * an array giving the values to write in for the fixup types 125 * which write a value into the code array. 126 */ 127 int i, len; 128 uint32_t *code; 129 130 len = 0; 131 while (insns[len].fixup != FIXUP_TERMINATOR) { 132 len++; 133 } 134 135 code = g_new0(uint32_t, len); 136 137 for (i = 0; i < len; i++) { 138 uint32_t insn = insns[i].insn; 139 FixupType fixup = insns[i].fixup; 140 141 switch (fixup) { 142 case FIXUP_NONE: 143 break; 144 case FIXUP_BOARDID: 145 case FIXUP_BOARD_SETUP: 146 case FIXUP_ARGPTR: 147 case FIXUP_ENTRYPOINT: 148 case FIXUP_GIC_CPU_IF: 149 case FIXUP_BOOTREG: 150 case FIXUP_DSB: 151 insn = fixupcontext[fixup]; 152 break; 153 default: 154 abort(); 155 } 156 code[i] = tswap32(insn); 157 } 158 159 rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr); 160 161 g_free(code); 162 } 163 164 static void default_write_secondary(ARMCPU *cpu, 165 const struct arm_boot_info *info) 166 { 167 uint32_t fixupcontext[FIXUP_MAX]; 168 169 fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr; 170 fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr; 171 if (arm_feature(&cpu->env, ARM_FEATURE_V7)) { 172 fixupcontext[FIXUP_DSB] = DSB_INSN; 173 } else { 174 fixupcontext[FIXUP_DSB] = CP15_DSB_INSN; 175 } 176 177 write_bootloader("smpboot", info->smp_loader_start, 178 smpboot, fixupcontext); 179 } 180 181 static void default_reset_secondary(ARMCPU *cpu, 182 const struct arm_boot_info *info) 183 { 184 CPUState *cs = CPU(cpu); 185 186 address_space_stl_notdirty(&address_space_memory, info->smp_bootreg_addr, 187 0, MEMTXATTRS_UNSPECIFIED, NULL); 188 cpu_set_pc(cs, info->smp_loader_start); 189 } 190 191 static inline bool have_dtb(const struct arm_boot_info *info) 192 { 193 return info->dtb_filename || info->get_dtb; 194 } 195 196 #define WRITE_WORD(p, value) do { \ 197 address_space_stl_notdirty(&address_space_memory, p, value, \ 198 MEMTXATTRS_UNSPECIFIED, NULL); \ 199 p += 4; \ 200 } while (0) 201 202 static void set_kernel_args(const struct arm_boot_info *info) 203 { 204 int initrd_size = info->initrd_size; 205 hwaddr base = info->loader_start; 206 hwaddr p; 207 208 p = base + KERNEL_ARGS_ADDR; 209 /* ATAG_CORE */ 210 WRITE_WORD(p, 5); 211 WRITE_WORD(p, 0x54410001); 212 WRITE_WORD(p, 1); 213 WRITE_WORD(p, 0x1000); 214 WRITE_WORD(p, 0); 215 /* ATAG_MEM */ 216 /* TODO: handle multiple chips on one ATAG list */ 217 WRITE_WORD(p, 4); 218 WRITE_WORD(p, 0x54410002); 219 WRITE_WORD(p, info->ram_size); 220 WRITE_WORD(p, info->loader_start); 221 if (initrd_size) { 222 /* ATAG_INITRD2 */ 223 WRITE_WORD(p, 4); 224 WRITE_WORD(p, 0x54420005); 225 WRITE_WORD(p, info->initrd_start); 226 WRITE_WORD(p, initrd_size); 227 } 228 if (info->kernel_cmdline && *info->kernel_cmdline) { 229 /* ATAG_CMDLINE */ 230 int cmdline_size; 231 232 cmdline_size = strlen(info->kernel_cmdline); 233 cpu_physical_memory_write(p + 8, info->kernel_cmdline, 234 cmdline_size + 1); 235 cmdline_size = (cmdline_size >> 2) + 1; 236 WRITE_WORD(p, cmdline_size + 2); 237 WRITE_WORD(p, 0x54410009); 238 p += cmdline_size * 4; 239 } 240 if (info->atag_board) { 241 /* ATAG_BOARD */ 242 int atag_board_len; 243 uint8_t atag_board_buf[0x1000]; 244 245 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3; 246 WRITE_WORD(p, (atag_board_len + 8) >> 2); 247 WRITE_WORD(p, 0x414f4d50); 248 cpu_physical_memory_write(p, atag_board_buf, atag_board_len); 249 p += atag_board_len; 250 } 251 /* ATAG_END */ 252 WRITE_WORD(p, 0); 253 WRITE_WORD(p, 0); 254 } 255 256 static void set_kernel_args_old(const struct arm_boot_info *info) 257 { 258 hwaddr p; 259 const char *s; 260 int initrd_size = info->initrd_size; 261 hwaddr base = info->loader_start; 262 263 /* see linux/include/asm-arm/setup.h */ 264 p = base + KERNEL_ARGS_ADDR; 265 /* page_size */ 266 WRITE_WORD(p, 4096); 267 /* nr_pages */ 268 WRITE_WORD(p, info->ram_size / 4096); 269 /* ramdisk_size */ 270 WRITE_WORD(p, 0); 271 #define FLAG_READONLY 1 272 #define FLAG_RDLOAD 4 273 #define FLAG_RDPROMPT 8 274 /* flags */ 275 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT); 276 /* rootdev */ 277 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */ 278 /* video_num_cols */ 279 WRITE_WORD(p, 0); 280 /* video_num_rows */ 281 WRITE_WORD(p, 0); 282 /* video_x */ 283 WRITE_WORD(p, 0); 284 /* video_y */ 285 WRITE_WORD(p, 0); 286 /* memc_control_reg */ 287 WRITE_WORD(p, 0); 288 /* unsigned char sounddefault */ 289 /* unsigned char adfsdrives */ 290 /* unsigned char bytes_per_char_h */ 291 /* unsigned char bytes_per_char_v */ 292 WRITE_WORD(p, 0); 293 /* pages_in_bank[4] */ 294 WRITE_WORD(p, 0); 295 WRITE_WORD(p, 0); 296 WRITE_WORD(p, 0); 297 WRITE_WORD(p, 0); 298 /* pages_in_vram */ 299 WRITE_WORD(p, 0); 300 /* initrd_start */ 301 if (initrd_size) { 302 WRITE_WORD(p, info->initrd_start); 303 } else { 304 WRITE_WORD(p, 0); 305 } 306 /* initrd_size */ 307 WRITE_WORD(p, initrd_size); 308 /* rd_start */ 309 WRITE_WORD(p, 0); 310 /* system_rev */ 311 WRITE_WORD(p, 0); 312 /* system_serial_low */ 313 WRITE_WORD(p, 0); 314 /* system_serial_high */ 315 WRITE_WORD(p, 0); 316 /* mem_fclk_21285 */ 317 WRITE_WORD(p, 0); 318 /* zero unused fields */ 319 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) { 320 WRITE_WORD(p, 0); 321 } 322 s = info->kernel_cmdline; 323 if (s) { 324 cpu_physical_memory_write(p, s, strlen(s) + 1); 325 } else { 326 WRITE_WORD(p, 0); 327 } 328 } 329 330 /** 331 * load_dtb() - load a device tree binary image into memory 332 * @addr: the address to load the image at 333 * @binfo: struct describing the boot environment 334 * @addr_limit: upper limit of the available memory area at @addr 335 * 336 * Load a device tree supplied by the machine or by the user with the 337 * '-dtb' command line option, and put it at offset @addr in target 338 * memory. 339 * 340 * If @addr_limit contains a meaningful value (i.e., it is strictly greater 341 * than @addr), the device tree is only loaded if its size does not exceed 342 * the limit. 343 * 344 * Returns: the size of the device tree image on success, 345 * 0 if the image size exceeds the limit, 346 * -1 on errors. 347 * 348 * Note: Must not be called unless have_dtb(binfo) is true. 349 */ 350 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo, 351 hwaddr addr_limit) 352 { 353 void *fdt = NULL; 354 int size, rc; 355 uint32_t acells, scells; 356 357 if (binfo->dtb_filename) { 358 char *filename; 359 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename); 360 if (!filename) { 361 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename); 362 goto fail; 363 } 364 365 fdt = load_device_tree(filename, &size); 366 if (!fdt) { 367 fprintf(stderr, "Couldn't open dtb file %s\n", filename); 368 g_free(filename); 369 goto fail; 370 } 371 g_free(filename); 372 } else { 373 fdt = binfo->get_dtb(binfo, &size); 374 if (!fdt) { 375 fprintf(stderr, "Board was unable to create a dtb blob\n"); 376 goto fail; 377 } 378 } 379 380 if (addr_limit > addr && size > (addr_limit - addr)) { 381 /* Installing the device tree blob at addr would exceed addr_limit. 382 * Whether this constitutes failure is up to the caller to decide, 383 * so just return 0 as size, i.e., no error. 384 */ 385 g_free(fdt); 386 return 0; 387 } 388 389 acells = qemu_fdt_getprop_cell(fdt, "/", "#address-cells"); 390 scells = qemu_fdt_getprop_cell(fdt, "/", "#size-cells"); 391 if (acells == 0 || scells == 0) { 392 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n"); 393 goto fail; 394 } 395 396 if (scells < 2 && binfo->ram_size >= (1ULL << 32)) { 397 /* This is user error so deserves a friendlier error message 398 * than the failure of setprop_sized_cells would provide 399 */ 400 fprintf(stderr, "qemu: dtb file not compatible with " 401 "RAM size > 4GB\n"); 402 goto fail; 403 } 404 405 rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg", 406 acells, binfo->loader_start, 407 scells, binfo->ram_size); 408 if (rc < 0) { 409 fprintf(stderr, "couldn't set /memory/reg\n"); 410 goto fail; 411 } 412 413 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) { 414 rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", 415 binfo->kernel_cmdline); 416 if (rc < 0) { 417 fprintf(stderr, "couldn't set /chosen/bootargs\n"); 418 goto fail; 419 } 420 } 421 422 if (binfo->initrd_size) { 423 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", 424 binfo->initrd_start); 425 if (rc < 0) { 426 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); 427 goto fail; 428 } 429 430 rc = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", 431 binfo->initrd_start + binfo->initrd_size); 432 if (rc < 0) { 433 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); 434 goto fail; 435 } 436 } 437 438 if (binfo->modify_dtb) { 439 binfo->modify_dtb(binfo, fdt); 440 } 441 442 qemu_fdt_dumpdtb(fdt, size); 443 444 /* Put the DTB into the memory map as a ROM image: this will ensure 445 * the DTB is copied again upon reset, even if addr points into RAM. 446 */ 447 rom_add_blob_fixed("dtb", fdt, size, addr); 448 449 g_free(fdt); 450 451 return size; 452 453 fail: 454 g_free(fdt); 455 return -1; 456 } 457 458 static void do_cpu_reset(void *opaque) 459 { 460 ARMCPU *cpu = opaque; 461 CPUState *cs = CPU(cpu); 462 CPUARMState *env = &cpu->env; 463 const struct arm_boot_info *info = env->boot_info; 464 465 cpu_reset(cs); 466 if (info) { 467 if (!info->is_linux) { 468 /* Jump to the entry point. */ 469 uint64_t entry = info->entry; 470 471 if (!env->aarch64) { 472 env->thumb = info->entry & 1; 473 entry &= 0xfffffffe; 474 } 475 cpu_set_pc(cs, entry); 476 } else { 477 /* If we are booting Linux then we need to check whether we are 478 * booting into secure or non-secure state and adjust the state 479 * accordingly. Out of reset, ARM is defined to be in secure state 480 * (SCR.NS = 0), we change that here if non-secure boot has been 481 * requested. 482 */ 483 if (arm_feature(env, ARM_FEATURE_EL3)) { 484 /* AArch64 is defined to come out of reset into EL3 if enabled. 485 * If we are booting Linux then we need to adjust our EL as 486 * Linux expects us to be in EL2 or EL1. AArch32 resets into 487 * SVC, which Linux expects, so no privilege/exception level to 488 * adjust. 489 */ 490 if (env->aarch64) { 491 env->cp15.scr_el3 |= SCR_RW; 492 if (arm_feature(env, ARM_FEATURE_EL2)) { 493 env->cp15.hcr_el2 |= HCR_RW; 494 env->pstate = PSTATE_MODE_EL2h; 495 } else { 496 env->pstate = PSTATE_MODE_EL1h; 497 } 498 } 499 500 /* Set to non-secure if not a secure boot */ 501 if (!info->secure_boot && 502 (cs != first_cpu || !info->secure_board_setup)) { 503 /* Linux expects non-secure state */ 504 env->cp15.scr_el3 |= SCR_NS; 505 } 506 } 507 508 if (cs == first_cpu) { 509 cpu_set_pc(cs, info->loader_start); 510 511 if (!have_dtb(info)) { 512 if (old_param) { 513 set_kernel_args_old(info); 514 } else { 515 set_kernel_args(info); 516 } 517 } 518 } else { 519 info->secondary_cpu_reset_hook(cpu, info); 520 } 521 } 522 } 523 } 524 525 /** 526 * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified 527 * by key. 528 * @fw_cfg: The firmware config instance to store the data in. 529 * @size_key: The firmware config key to store the size of the loaded 530 * data under, with fw_cfg_add_i32(). 531 * @data_key: The firmware config key to store the loaded data under, 532 * with fw_cfg_add_bytes(). 533 * @image_name: The name of the image file to load. If it is NULL, the 534 * function returns without doing anything. 535 * @try_decompress: Whether the image should be decompressed (gunzipped) before 536 * adding it to fw_cfg. If decompression fails, the image is 537 * loaded as-is. 538 * 539 * In case of failure, the function prints an error message to stderr and the 540 * process exits with status 1. 541 */ 542 static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key, 543 uint16_t data_key, const char *image_name, 544 bool try_decompress) 545 { 546 size_t size = -1; 547 uint8_t *data; 548 549 if (image_name == NULL) { 550 return; 551 } 552 553 if (try_decompress) { 554 size = load_image_gzipped_buffer(image_name, 555 LOAD_IMAGE_MAX_GUNZIP_BYTES, &data); 556 } 557 558 if (size == (size_t)-1) { 559 gchar *contents; 560 gsize length; 561 562 if (!g_file_get_contents(image_name, &contents, &length, NULL)) { 563 fprintf(stderr, "failed to load \"%s\"\n", image_name); 564 exit(1); 565 } 566 size = length; 567 data = (uint8_t *)contents; 568 } 569 570 fw_cfg_add_i32(fw_cfg, size_key, size); 571 fw_cfg_add_bytes(fw_cfg, data_key, data, size); 572 } 573 574 static int do_arm_linux_init(Object *obj, void *opaque) 575 { 576 if (object_dynamic_cast(obj, TYPE_ARM_LINUX_BOOT_IF)) { 577 ARMLinuxBootIf *albif = ARM_LINUX_BOOT_IF(obj); 578 ARMLinuxBootIfClass *albifc = ARM_LINUX_BOOT_IF_GET_CLASS(obj); 579 struct arm_boot_info *info = opaque; 580 581 if (albifc->arm_linux_init) { 582 albifc->arm_linux_init(albif, info->secure_boot); 583 } 584 } 585 return 0; 586 } 587 588 static void arm_load_kernel_notify(Notifier *notifier, void *data) 589 { 590 CPUState *cs; 591 int kernel_size; 592 int initrd_size; 593 int is_linux = 0; 594 uint64_t elf_entry, elf_low_addr, elf_high_addr; 595 int elf_machine; 596 hwaddr entry, kernel_load_offset; 597 int big_endian; 598 static const ARMInsnFixup *primary_loader; 599 ArmLoadKernelNotifier *n = DO_UPCAST(ArmLoadKernelNotifier, 600 notifier, notifier); 601 ARMCPU *cpu = n->cpu; 602 struct arm_boot_info *info = 603 container_of(n, struct arm_boot_info, load_kernel_notifier); 604 605 /* The board code is not supposed to set secure_board_setup unless 606 * running its code in secure mode is actually possible, and KVM 607 * doesn't support secure. 608 */ 609 assert(!(info->secure_board_setup && kvm_enabled())); 610 611 /* Load the kernel. */ 612 if (!info->kernel_filename || info->firmware_loaded) { 613 614 if (have_dtb(info)) { 615 /* If we have a device tree blob, but no kernel to supply it to (or 616 * the kernel is supposed to be loaded by the bootloader), copy the 617 * DTB to the base of RAM for the bootloader to pick up. 618 */ 619 if (load_dtb(info->loader_start, info, 0) < 0) { 620 exit(1); 621 } 622 } 623 624 if (info->kernel_filename) { 625 FWCfgState *fw_cfg; 626 bool try_decompressing_kernel; 627 628 fw_cfg = fw_cfg_find(); 629 try_decompressing_kernel = arm_feature(&cpu->env, 630 ARM_FEATURE_AARCH64); 631 632 /* Expose the kernel, the command line, and the initrd in fw_cfg. 633 * We don't process them here at all, it's all left to the 634 * firmware. 635 */ 636 load_image_to_fw_cfg(fw_cfg, 637 FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA, 638 info->kernel_filename, 639 try_decompressing_kernel); 640 load_image_to_fw_cfg(fw_cfg, 641 FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA, 642 info->initrd_filename, false); 643 644 if (info->kernel_cmdline) { 645 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 646 strlen(info->kernel_cmdline) + 1); 647 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, 648 info->kernel_cmdline); 649 } 650 } 651 652 /* We will start from address 0 (typically a boot ROM image) in the 653 * same way as hardware. 654 */ 655 return; 656 } 657 658 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { 659 primary_loader = bootloader_aarch64; 660 kernel_load_offset = KERNEL64_LOAD_ADDR; 661 elf_machine = EM_AARCH64; 662 } else { 663 primary_loader = bootloader; 664 if (!info->write_board_setup) { 665 primary_loader += BOOTLOADER_NO_BOARD_SETUP_OFFSET; 666 } 667 kernel_load_offset = KERNEL_LOAD_ADDR; 668 elf_machine = EM_ARM; 669 } 670 671 info->dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb"); 672 673 if (!info->secondary_cpu_reset_hook) { 674 info->secondary_cpu_reset_hook = default_reset_secondary; 675 } 676 if (!info->write_secondary_boot) { 677 info->write_secondary_boot = default_write_secondary; 678 } 679 680 if (info->nb_cpus == 0) 681 info->nb_cpus = 1; 682 683 #ifdef TARGET_WORDS_BIGENDIAN 684 big_endian = 1; 685 #else 686 big_endian = 0; 687 #endif 688 689 /* We want to put the initrd far enough into RAM that when the 690 * kernel is uncompressed it will not clobber the initrd. However 691 * on boards without much RAM we must ensure that we still leave 692 * enough room for a decent sized initrd, and on boards with large 693 * amounts of RAM we must avoid the initrd being so far up in RAM 694 * that it is outside lowmem and inaccessible to the kernel. 695 * So for boards with less than 256MB of RAM we put the initrd 696 * halfway into RAM, and for boards with 256MB of RAM or more we put 697 * the initrd at 128MB. 698 */ 699 info->initrd_start = info->loader_start + 700 MIN(info->ram_size / 2, 128 * 1024 * 1024); 701 702 /* Assume that raw images are linux kernels, and ELF images are not. */ 703 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry, 704 &elf_low_addr, &elf_high_addr, big_endian, 705 elf_machine, 1); 706 if (kernel_size > 0 && have_dtb(info)) { 707 /* If there is still some room left at the base of RAM, try and put 708 * the DTB there like we do for images loaded with -bios or -pflash. 709 */ 710 if (elf_low_addr > info->loader_start 711 || elf_high_addr < info->loader_start) { 712 /* Pass elf_low_addr as address limit to load_dtb if it may be 713 * pointing into RAM, otherwise pass '0' (no limit) 714 */ 715 if (elf_low_addr < info->loader_start) { 716 elf_low_addr = 0; 717 } 718 if (load_dtb(info->loader_start, info, elf_low_addr) < 0) { 719 exit(1); 720 } 721 } 722 } 723 entry = elf_entry; 724 if (kernel_size < 0) { 725 kernel_size = load_uimage(info->kernel_filename, &entry, NULL, 726 &is_linux, NULL, NULL); 727 } 728 /* On aarch64, it's the bootloader's job to uncompress the kernel. */ 729 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) { 730 entry = info->loader_start + kernel_load_offset; 731 kernel_size = load_image_gzipped(info->kernel_filename, entry, 732 info->ram_size - kernel_load_offset); 733 is_linux = 1; 734 } 735 if (kernel_size < 0) { 736 entry = info->loader_start + kernel_load_offset; 737 kernel_size = load_image_targphys(info->kernel_filename, entry, 738 info->ram_size - kernel_load_offset); 739 is_linux = 1; 740 } 741 if (kernel_size < 0) { 742 fprintf(stderr, "qemu: could not load kernel '%s'\n", 743 info->kernel_filename); 744 exit(1); 745 } 746 info->entry = entry; 747 if (is_linux) { 748 uint32_t fixupcontext[FIXUP_MAX]; 749 750 if (info->initrd_filename) { 751 initrd_size = load_ramdisk(info->initrd_filename, 752 info->initrd_start, 753 info->ram_size - 754 info->initrd_start); 755 if (initrd_size < 0) { 756 initrd_size = load_image_targphys(info->initrd_filename, 757 info->initrd_start, 758 info->ram_size - 759 info->initrd_start); 760 } 761 if (initrd_size < 0) { 762 fprintf(stderr, "qemu: could not load initrd '%s'\n", 763 info->initrd_filename); 764 exit(1); 765 } 766 } else { 767 initrd_size = 0; 768 } 769 info->initrd_size = initrd_size; 770 771 fixupcontext[FIXUP_BOARDID] = info->board_id; 772 fixupcontext[FIXUP_BOARD_SETUP] = info->board_setup_addr; 773 774 /* for device tree boot, we pass the DTB directly in r2. Otherwise 775 * we point to the kernel args. 776 */ 777 if (have_dtb(info)) { 778 hwaddr align; 779 hwaddr dtb_start; 780 781 if (elf_machine == EM_AARCH64) { 782 /* 783 * Some AArch64 kernels on early bootup map the fdt region as 784 * 785 * [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ] 786 * 787 * Let's play safe and prealign it to 2MB to give us some space. 788 */ 789 align = 2 * 1024 * 1024; 790 } else { 791 /* 792 * Some 32bit kernels will trash anything in the 4K page the 793 * initrd ends in, so make sure the DTB isn't caught up in that. 794 */ 795 align = 4096; 796 } 797 798 /* Place the DTB after the initrd in memory with alignment. */ 799 dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size, align); 800 if (load_dtb(dtb_start, info, 0) < 0) { 801 exit(1); 802 } 803 fixupcontext[FIXUP_ARGPTR] = dtb_start; 804 } else { 805 fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR; 806 if (info->ram_size >= (1ULL << 32)) { 807 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot" 808 " Linux kernel using ATAGS (try passing a device tree" 809 " using -dtb)\n"); 810 exit(1); 811 } 812 } 813 fixupcontext[FIXUP_ENTRYPOINT] = entry; 814 815 write_bootloader("bootloader", info->loader_start, 816 primary_loader, fixupcontext); 817 818 if (info->nb_cpus > 1) { 819 info->write_secondary_boot(cpu, info); 820 } 821 if (info->write_board_setup) { 822 info->write_board_setup(cpu, info); 823 } 824 825 /* Notify devices which need to fake up firmware initialization 826 * that we're doing a direct kernel boot. 827 */ 828 object_child_foreach_recursive(object_get_root(), 829 do_arm_linux_init, info); 830 } 831 info->is_linux = is_linux; 832 833 for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) { 834 ARM_CPU(cs)->env.boot_info = info; 835 } 836 } 837 838 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info) 839 { 840 CPUState *cs; 841 842 info->load_kernel_notifier.cpu = cpu; 843 info->load_kernel_notifier.notifier.notify = arm_load_kernel_notify; 844 qemu_add_machine_init_done_notifier(&info->load_kernel_notifier.notifier); 845 846 /* CPU objects (unlike devices) are not automatically reset on system 847 * reset, so we must always register a handler to do so. If we're 848 * actually loading a kernel, the handler is also responsible for 849 * arranging that we start it correctly. 850 */ 851 for (cs = CPU(cpu); cs; cs = CPU_NEXT(cs)) { 852 qemu_register_reset(do_cpu_reset, ARM_CPU(cs)); 853 } 854 } 855 856 static const TypeInfo arm_linux_boot_if_info = { 857 .name = TYPE_ARM_LINUX_BOOT_IF, 858 .parent = TYPE_INTERFACE, 859 .class_size = sizeof(ARMLinuxBootIfClass), 860 }; 861 862 static void arm_linux_boot_register_types(void) 863 { 864 type_register_static(&arm_linux_boot_if_info); 865 } 866 867 type_init(arm_linux_boot_register_types) 868