1 /* 2 * OpenPOWER Palmetto BMC 3 * 4 * Andrew Jeffery <andrew@aj.id.au> 5 * 6 * Copyright 2016 IBM Corp. 7 * 8 * This code is licensed under the GPL version 2 or later. See 9 * the COPYING file in the top-level directory. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qapi/error.h" 14 #include "qemu-common.h" 15 #include "cpu.h" 16 #include "exec/address-spaces.h" 17 #include "hw/arm/arm.h" 18 #include "hw/arm/aspeed_soc.h" 19 #include "hw/boards.h" 20 #include "qemu/log.h" 21 #include "sysemu/block-backend.h" 22 #include "sysemu/blockdev.h" 23 #include "hw/loader.h" 24 #include "qemu/error-report.h" 25 26 static struct arm_boot_info aspeed_board_binfo = { 27 .board_id = -1, /* device-tree-only board */ 28 .nb_cpus = 1, 29 }; 30 31 typedef struct AspeedBoardState { 32 AspeedSoCState soc; 33 MemoryRegion ram; 34 } AspeedBoardState; 35 36 typedef struct AspeedBoardConfig { 37 const char *soc_name; 38 uint32_t hw_strap1; 39 const char *fmc_model; 40 const char *spi_model; 41 uint32_t num_cs; 42 void (*i2c_init)(AspeedBoardState *bmc); 43 } AspeedBoardConfig; 44 45 enum { 46 PALMETTO_BMC, 47 AST2500_EVB, 48 ROMULUS_BMC, 49 }; 50 51 /* Palmetto hardware value: 0x120CE416 */ 52 #define PALMETTO_BMC_HW_STRAP1 ( \ 53 SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ 54 SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ 55 SCU_AST2400_HW_STRAP_ACPI_DIS | \ 56 SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ 57 SCU_HW_STRAP_VGA_CLASS_CODE | \ 58 SCU_HW_STRAP_LPC_RESET_PIN | \ 59 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ 60 SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ 61 SCU_HW_STRAP_SPI_WIDTH | \ 62 SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ 63 SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) 64 65 /* AST2500 evb hardware value: 0xF100C2E6 */ 66 #define AST2500_EVB_HW_STRAP1 (( \ 67 AST2500_HW_STRAP1_DEFAULTS | \ 68 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ 69 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ 70 SCU_AST2500_HW_STRAP_UART_DEBUG | \ 71 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ 72 SCU_HW_STRAP_MAC1_RGMII | \ 73 SCU_HW_STRAP_MAC0_RGMII) & \ 74 ~SCU_HW_STRAP_2ND_BOOT_WDT) 75 76 /* Romulus hardware value: 0xF10AD206 */ 77 #define ROMULUS_BMC_HW_STRAP1 ( \ 78 AST2500_HW_STRAP1_DEFAULTS | \ 79 SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ 80 SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ 81 SCU_AST2500_HW_STRAP_UART_DEBUG | \ 82 SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ 83 SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ 84 SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) 85 86 static void palmetto_bmc_i2c_init(AspeedBoardState *bmc); 87 static void ast2500_evb_i2c_init(AspeedBoardState *bmc); 88 89 static const AspeedBoardConfig aspeed_boards[] = { 90 [PALMETTO_BMC] = { 91 .soc_name = "ast2400-a1", 92 .hw_strap1 = PALMETTO_BMC_HW_STRAP1, 93 .fmc_model = "n25q256a", 94 .spi_model = "mx25l25635e", 95 .num_cs = 1, 96 .i2c_init = palmetto_bmc_i2c_init, 97 }, 98 [AST2500_EVB] = { 99 .soc_name = "ast2500-a1", 100 .hw_strap1 = AST2500_EVB_HW_STRAP1, 101 .fmc_model = "n25q256a", 102 .spi_model = "mx25l25635e", 103 .num_cs = 1, 104 .i2c_init = ast2500_evb_i2c_init, 105 }, 106 [ROMULUS_BMC] = { 107 .soc_name = "ast2500-a1", 108 .hw_strap1 = ROMULUS_BMC_HW_STRAP1, 109 .fmc_model = "n25q256a", 110 .spi_model = "mx66l1g45g", 111 .num_cs = 2, 112 }, 113 }; 114 115 #define FIRMWARE_ADDR 0x0 116 117 static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size, 118 Error **errp) 119 { 120 BlockBackend *blk = blk_by_legacy_dinfo(dinfo); 121 uint8_t *storage; 122 int64_t size; 123 124 /* The block backend size should have already been 'validated' by 125 * the creation of the m25p80 object. 126 */ 127 size = blk_getlength(blk); 128 if (size <= 0) { 129 error_setg(errp, "failed to get flash size"); 130 return; 131 } 132 133 if (rom_size > size) { 134 rom_size = size; 135 } 136 137 storage = g_new0(uint8_t, rom_size); 138 if (blk_pread(blk, 0, storage, rom_size) < 0) { 139 error_setg(errp, "failed to read the initial flash content"); 140 return; 141 } 142 143 rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); 144 g_free(storage); 145 } 146 147 static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, 148 Error **errp) 149 { 150 int i ; 151 152 for (i = 0; i < s->num_cs; ++i) { 153 AspeedSMCFlash *fl = &s->flashes[i]; 154 DriveInfo *dinfo = drive_get_next(IF_MTD); 155 qemu_irq cs_line; 156 157 fl->flash = ssi_create_slave_no_init(s->spi, flashtype); 158 if (dinfo) { 159 qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), 160 errp); 161 } 162 qdev_init_nofail(fl->flash); 163 164 cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); 165 sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); 166 } 167 } 168 169 static void aspeed_board_init(MachineState *machine, 170 const AspeedBoardConfig *cfg) 171 { 172 AspeedBoardState *bmc; 173 AspeedSoCClass *sc; 174 DriveInfo *drive0 = drive_get(IF_MTD, 0, 0); 175 176 bmc = g_new0(AspeedBoardState, 1); 177 object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name); 178 object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc), 179 &error_abort); 180 181 sc = ASPEED_SOC_GET_CLASS(&bmc->soc); 182 183 object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size", 184 &error_abort); 185 object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1", 186 &error_abort); 187 object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs", 188 &error_abort); 189 object_property_set_bool(OBJECT(&bmc->soc), true, "realized", 190 &error_abort); 191 192 /* 193 * Allocate RAM after the memory controller has checked the size 194 * was valid. If not, a default value is used. 195 */ 196 ram_size = object_property_get_int(OBJECT(&bmc->soc), "ram-size", 197 &error_abort); 198 199 memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); 200 memory_region_add_subregion(get_system_memory(), sc->info->sdram_base, 201 &bmc->ram); 202 object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), 203 &error_abort); 204 205 aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort); 206 aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort); 207 208 /* Install first FMC flash content as a boot rom. */ 209 if (drive0) { 210 AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0]; 211 MemoryRegion *boot_rom = g_new(MemoryRegion, 1); 212 213 /* 214 * create a ROM region using the default mapping window size of 215 * the flash module. The window size is 64MB for the AST2400 216 * SoC and 128MB for the AST2500 SoC, which is twice as big as 217 * needed by the flash modules of the Aspeed machines. 218 */ 219 memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", 220 fl->size, &error_abort); 221 memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR, 222 boot_rom); 223 write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort); 224 } 225 226 aspeed_board_binfo.kernel_filename = machine->kernel_filename; 227 aspeed_board_binfo.initrd_filename = machine->initrd_filename; 228 aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline; 229 aspeed_board_binfo.ram_size = ram_size; 230 aspeed_board_binfo.loader_start = sc->info->sdram_base; 231 232 if (cfg->i2c_init) { 233 cfg->i2c_init(bmc); 234 } 235 236 arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo); 237 } 238 239 static void palmetto_bmc_i2c_init(AspeedBoardState *bmc) 240 { 241 AspeedSoCState *soc = &bmc->soc; 242 243 /* The palmetto platform expects a ds3231 RTC but a ds1338 is 244 * enough to provide basic RTC features. Alarms will be missing */ 245 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68); 246 } 247 248 static void palmetto_bmc_init(MachineState *machine) 249 { 250 aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]); 251 } 252 253 static void palmetto_bmc_class_init(ObjectClass *oc, void *data) 254 { 255 MachineClass *mc = MACHINE_CLASS(oc); 256 257 mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; 258 mc->init = palmetto_bmc_init; 259 mc->max_cpus = 1; 260 mc->no_sdcard = 1; 261 mc->no_floppy = 1; 262 mc->no_cdrom = 1; 263 mc->no_parallel = 1; 264 } 265 266 static const TypeInfo palmetto_bmc_type = { 267 .name = MACHINE_TYPE_NAME("palmetto-bmc"), 268 .parent = TYPE_MACHINE, 269 .class_init = palmetto_bmc_class_init, 270 }; 271 272 static void ast2500_evb_i2c_init(AspeedBoardState *bmc) 273 { 274 AspeedSoCState *soc = &bmc->soc; 275 276 /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ 277 i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d); 278 } 279 280 static void ast2500_evb_init(MachineState *machine) 281 { 282 aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]); 283 } 284 285 static void ast2500_evb_class_init(ObjectClass *oc, void *data) 286 { 287 MachineClass *mc = MACHINE_CLASS(oc); 288 289 mc->desc = "Aspeed AST2500 EVB (ARM1176)"; 290 mc->init = ast2500_evb_init; 291 mc->max_cpus = 1; 292 mc->no_sdcard = 1; 293 mc->no_floppy = 1; 294 mc->no_cdrom = 1; 295 mc->no_parallel = 1; 296 } 297 298 static const TypeInfo ast2500_evb_type = { 299 .name = MACHINE_TYPE_NAME("ast2500-evb"), 300 .parent = TYPE_MACHINE, 301 .class_init = ast2500_evb_class_init, 302 }; 303 304 static void romulus_bmc_init(MachineState *machine) 305 { 306 aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]); 307 } 308 309 static void romulus_bmc_class_init(ObjectClass *oc, void *data) 310 { 311 MachineClass *mc = MACHINE_CLASS(oc); 312 313 mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; 314 mc->init = romulus_bmc_init; 315 mc->max_cpus = 1; 316 mc->no_sdcard = 1; 317 mc->no_floppy = 1; 318 mc->no_cdrom = 1; 319 mc->no_parallel = 1; 320 } 321 322 static const TypeInfo romulus_bmc_type = { 323 .name = MACHINE_TYPE_NAME("romulus-bmc"), 324 .parent = TYPE_MACHINE, 325 .class_init = romulus_bmc_class_init, 326 }; 327 328 static void aspeed_machine_init(void) 329 { 330 type_register_static(&palmetto_bmc_type); 331 type_register_static(&ast2500_evb_type); 332 type_register_static(&romulus_bmc_type); 333 } 334 335 type_init(aspeed_machine_init) 336