1 #include "qemu/osdep.h" 2 #include "migration/vmstate.h" 3 #include "hw/acpi/cpu.h" 4 #include "qapi/error.h" 5 #include "qapi/qapi-events-acpi.h" 6 #include "trace.h" 7 #include "sysemu/numa.h" 8 9 #define ACPI_CPU_HOTPLUG_REG_LEN 12 10 #define ACPI_CPU_SELECTOR_OFFSET_WR 0 11 #define ACPI_CPU_FLAGS_OFFSET_RW 4 12 #define ACPI_CPU_CMD_OFFSET_WR 5 13 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8 14 #define ACPI_CPU_CMD_DATA2_OFFSET_R 0 15 16 #define OVMF_CPUHP_SMI_CMD 4 17 18 enum { 19 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0, 20 CPHP_OST_EVENT_CMD = 1, 21 CPHP_OST_STATUS_CMD = 2, 22 CPHP_GET_CPU_ID_CMD = 3, 23 CPHP_CMD_MAX 24 }; 25 26 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev) 27 { 28 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1); 29 30 info->slot_type = ACPI_SLOT_TYPE_CPU; 31 info->slot = g_strdup_printf("%d", idx); 32 info->source = cdev->ost_event; 33 info->status = cdev->ost_status; 34 if (cdev->cpu) { 35 DeviceState *dev = DEVICE(cdev->cpu); 36 if (dev->id) { 37 info->device = g_strdup(dev->id); 38 } 39 } 40 return info; 41 } 42 43 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list) 44 { 45 ACPIOSTInfoList ***tail = list; 46 int i; 47 48 for (i = 0; i < cpu_st->dev_count; i++) { 49 QAPI_LIST_APPEND(*tail, acpi_cpu_device_status(i, &cpu_st->devs[i])); 50 } 51 } 52 53 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size) 54 { 55 uint64_t val = 0; 56 CPUHotplugState *cpu_st = opaque; 57 AcpiCpuStatus *cdev; 58 59 if (cpu_st->selector >= cpu_st->dev_count) { 60 return val; 61 } 62 63 cdev = &cpu_st->devs[cpu_st->selector]; 64 switch (addr) { 65 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */ 66 val |= cdev->cpu ? 1 : 0; 67 val |= cdev->is_inserting ? 2 : 0; 68 val |= cdev->is_removing ? 4 : 0; 69 val |= cdev->fw_remove ? 16 : 0; 70 trace_cpuhp_acpi_read_flags(cpu_st->selector, val); 71 break; 72 case ACPI_CPU_CMD_DATA_OFFSET_RW: 73 switch (cpu_st->command) { 74 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 75 val = cpu_st->selector; 76 break; 77 case CPHP_GET_CPU_ID_CMD: 78 val = cdev->arch_id & 0xFFFFFFFF; 79 break; 80 default: 81 break; 82 } 83 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val); 84 break; 85 case ACPI_CPU_CMD_DATA2_OFFSET_R: 86 switch (cpu_st->command) { 87 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD: 88 val = 0; 89 break; 90 case CPHP_GET_CPU_ID_CMD: 91 val = cdev->arch_id >> 32; 92 break; 93 default: 94 break; 95 } 96 trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val); 97 break; 98 default: 99 break; 100 } 101 return val; 102 } 103 104 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data, 105 unsigned int size) 106 { 107 CPUHotplugState *cpu_st = opaque; 108 AcpiCpuStatus *cdev; 109 ACPIOSTInfo *info; 110 111 assert(cpu_st->dev_count); 112 113 if (addr) { 114 if (cpu_st->selector >= cpu_st->dev_count) { 115 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector); 116 return; 117 } 118 } 119 120 switch (addr) { 121 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */ 122 cpu_st->selector = data; 123 trace_cpuhp_acpi_write_idx(cpu_st->selector); 124 break; 125 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */ 126 cdev = &cpu_st->devs[cpu_st->selector]; 127 if (data & 2) { /* clear insert event */ 128 cdev->is_inserting = false; 129 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector); 130 } else if (data & 4) { /* clear remove event */ 131 cdev->is_removing = false; 132 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector); 133 } else if (data & 8) { 134 DeviceState *dev = NULL; 135 HotplugHandler *hotplug_ctrl = NULL; 136 137 if (!cdev->cpu || cdev->cpu == first_cpu) { 138 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector); 139 break; 140 } 141 142 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector); 143 dev = DEVICE(cdev->cpu); 144 hotplug_ctrl = qdev_get_hotplug_handler(dev); 145 hotplug_handler_unplug(hotplug_ctrl, dev, NULL); 146 object_unparent(OBJECT(dev)); 147 cdev->fw_remove = false; 148 } else if (data & 16) { 149 if (!cdev->cpu || cdev->cpu == first_cpu) { 150 trace_cpuhp_acpi_fw_remove_invalid_cpu(cpu_st->selector); 151 break; 152 } 153 trace_cpuhp_acpi_fw_remove_cpu(cpu_st->selector); 154 cdev->fw_remove = true; 155 } 156 break; 157 case ACPI_CPU_CMD_OFFSET_WR: 158 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data); 159 if (data < CPHP_CMD_MAX) { 160 cpu_st->command = data; 161 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) { 162 uint32_t iter = cpu_st->selector; 163 164 do { 165 cdev = &cpu_st->devs[iter]; 166 if (cdev->is_inserting || cdev->is_removing || 167 cdev->fw_remove) { 168 cpu_st->selector = iter; 169 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector, 170 cdev->is_inserting, cdev->is_removing); 171 break; 172 } 173 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0; 174 } while (iter != cpu_st->selector); 175 } 176 } 177 break; 178 case ACPI_CPU_CMD_DATA_OFFSET_RW: 179 switch (cpu_st->command) { 180 case CPHP_OST_EVENT_CMD: { 181 cdev = &cpu_st->devs[cpu_st->selector]; 182 cdev->ost_event = data; 183 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event); 184 break; 185 } 186 case CPHP_OST_STATUS_CMD: { 187 cdev = &cpu_st->devs[cpu_st->selector]; 188 cdev->ost_status = data; 189 info = acpi_cpu_device_status(cpu_st->selector, cdev); 190 qapi_event_send_acpi_device_ost(info); 191 qapi_free_ACPIOSTInfo(info); 192 trace_cpuhp_acpi_write_ost_status(cpu_st->selector, 193 cdev->ost_status); 194 break; 195 } 196 default: 197 break; 198 } 199 break; 200 default: 201 break; 202 } 203 } 204 205 static const MemoryRegionOps cpu_hotplug_ops = { 206 .read = cpu_hotplug_rd, 207 .write = cpu_hotplug_wr, 208 .endianness = DEVICE_LITTLE_ENDIAN, 209 .valid = { 210 .min_access_size = 1, 211 .max_access_size = 4, 212 }, 213 }; 214 215 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, 216 CPUHotplugState *state, hwaddr base_addr) 217 { 218 MachineState *machine = MACHINE(qdev_get_machine()); 219 MachineClass *mc = MACHINE_GET_CLASS(machine); 220 const CPUArchIdList *id_list; 221 int i; 222 223 assert(mc->possible_cpu_arch_ids); 224 id_list = mc->possible_cpu_arch_ids(machine); 225 state->dev_count = id_list->len; 226 state->devs = g_new0(typeof(*state->devs), state->dev_count); 227 for (i = 0; i < id_list->len; i++) { 228 state->devs[i].cpu = CPU(id_list->cpus[i].cpu); 229 state->devs[i].arch_id = id_list->cpus[i].arch_id; 230 } 231 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, 232 "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); 233 memory_region_add_subregion(as, base_addr, &state->ctrl_reg); 234 } 235 236 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev) 237 { 238 CPUClass *k = CPU_GET_CLASS(dev); 239 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev)); 240 int i; 241 242 for (i = 0; i < cpu_st->dev_count; i++) { 243 if (cpu_arch_id == cpu_st->devs[i].arch_id) { 244 return &cpu_st->devs[i]; 245 } 246 } 247 return NULL; 248 } 249 250 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, 251 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) 252 { 253 AcpiCpuStatus *cdev; 254 255 cdev = get_cpu_status(cpu_st, dev); 256 if (!cdev) { 257 return; 258 } 259 260 cdev->cpu = CPU(dev); 261 if (dev->hotplugged) { 262 cdev->is_inserting = true; 263 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 264 } 265 } 266 267 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 268 CPUHotplugState *cpu_st, 269 DeviceState *dev, Error **errp) 270 { 271 AcpiCpuStatus *cdev; 272 273 cdev = get_cpu_status(cpu_st, dev); 274 if (!cdev) { 275 return; 276 } 277 278 cdev->is_removing = true; 279 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); 280 } 281 282 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, 283 DeviceState *dev, Error **errp) 284 { 285 AcpiCpuStatus *cdev; 286 287 cdev = get_cpu_status(cpu_st, dev); 288 if (!cdev) { 289 return; 290 } 291 292 cdev->cpu = NULL; 293 } 294 295 static const VMStateDescription vmstate_cpuhp_sts = { 296 .name = "CPU hotplug device state", 297 .version_id = 1, 298 .minimum_version_id = 1, 299 .fields = (VMStateField[]) { 300 VMSTATE_BOOL(is_inserting, AcpiCpuStatus), 301 VMSTATE_BOOL(is_removing, AcpiCpuStatus), 302 VMSTATE_UINT32(ost_event, AcpiCpuStatus), 303 VMSTATE_UINT32(ost_status, AcpiCpuStatus), 304 VMSTATE_END_OF_LIST() 305 } 306 }; 307 308 const VMStateDescription vmstate_cpu_hotplug = { 309 .name = "CPU hotplug state", 310 .version_id = 1, 311 .minimum_version_id = 1, 312 .fields = (VMStateField[]) { 313 VMSTATE_UINT32(selector, CPUHotplugState), 314 VMSTATE_UINT8(command, CPUHotplugState), 315 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count, 316 vmstate_cpuhp_sts, AcpiCpuStatus), 317 VMSTATE_END_OF_LIST() 318 } 319 }; 320 321 #define CPU_NAME_FMT "C%.03X" 322 #define CPUHP_RES_DEVICE "PRES" 323 #define CPU_LOCK "CPLK" 324 #define CPU_STS_METHOD "CSTA" 325 #define CPU_SCAN_METHOD "CSCN" 326 #define CPU_NOTIFY_METHOD "CTFY" 327 #define CPU_EJECT_METHOD "CEJ0" 328 #define CPU_OST_METHOD "COST" 329 #define CPU_ADDED_LIST "CNEW" 330 331 #define CPU_ENABLED "CPEN" 332 #define CPU_SELECTOR "CSEL" 333 #define CPU_COMMAND "CCMD" 334 #define CPU_DATA "CDAT" 335 #define CPU_INSERT_EVENT "CINS" 336 #define CPU_REMOVE_EVENT "CRMV" 337 #define CPU_EJECT_EVENT "CEJ0" 338 #define CPU_FW_EJECT_EVENT "CEJF" 339 340 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, 341 build_madt_cpu_fn build_madt_cpu, hwaddr io_base, 342 const char *res_root, 343 const char *event_handler_method) 344 { 345 Aml *ifctx; 346 Aml *field; 347 Aml *method; 348 Aml *cpu_ctrl_dev; 349 Aml *cpus_dev; 350 Aml *zero = aml_int(0); 351 Aml *one = aml_int(1); 352 Aml *sb_scope = aml_scope("_SB"); 353 MachineClass *mc = MACHINE_GET_CLASS(machine); 354 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); 355 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); 356 357 cpu_ctrl_dev = aml_device("%s", cphp_res_path); 358 { 359 Aml *crs; 360 361 aml_append(cpu_ctrl_dev, 362 aml_name_decl("_HID", aml_eisaid("PNP0A06"))); 363 aml_append(cpu_ctrl_dev, 364 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); 365 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); 366 367 crs = aml_resource_template(); 368 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, 369 ACPI_CPU_HOTPLUG_REG_LEN)); 370 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); 371 372 /* declare CPU hotplug MMIO region with related access fields */ 373 aml_append(cpu_ctrl_dev, 374 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), 375 ACPI_CPU_HOTPLUG_REG_LEN)); 376 377 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, 378 AML_WRITE_AS_ZEROS); 379 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); 380 /* 1 if enabled, read only */ 381 aml_append(field, aml_named_field(CPU_ENABLED, 1)); 382 /* (read) 1 if has a insert event. (write) 1 to clear event */ 383 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); 384 /* (read) 1 if has a remove event. (write) 1 to clear event */ 385 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); 386 /* initiates device eject, write only */ 387 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); 388 /* tell firmware to do device eject, write only */ 389 aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1)); 390 aml_append(field, aml_reserved_field(3)); 391 aml_append(field, aml_named_field(CPU_COMMAND, 8)); 392 aml_append(cpu_ctrl_dev, field); 393 394 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); 395 /* CPU selector, write only */ 396 aml_append(field, aml_named_field(CPU_SELECTOR, 32)); 397 /* flags + cmd + 2byte align */ 398 aml_append(field, aml_reserved_field(4 * 8)); 399 aml_append(field, aml_named_field(CPU_DATA, 32)); 400 aml_append(cpu_ctrl_dev, field); 401 402 if (opts.has_legacy_cphp) { 403 method = aml_method("_INI", 0, AML_SERIALIZED); 404 /* switch off legacy CPU hotplug HW and use new one, 405 * on reboot system is in new mode and writing 0 406 * in CPU_SELECTOR selects BSP, which is NOP at 407 * the time _INI is called */ 408 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); 409 aml_append(cpu_ctrl_dev, method); 410 } 411 } 412 aml_append(sb_scope, cpu_ctrl_dev); 413 414 cpus_dev = aml_device("\\_SB.CPUS"); 415 { 416 int i; 417 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); 418 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); 419 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); 420 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); 421 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); 422 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); 423 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); 424 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); 425 Aml *fw_ej_evt = aml_name("%s.%s", cphp_res_path, CPU_FW_EJECT_EVENT); 426 427 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); 428 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); 429 430 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); 431 for (i = 0; i < arch_ids->len; i++) { 432 Aml *cpu = aml_name(CPU_NAME_FMT, i); 433 Aml *uid = aml_arg(0); 434 Aml *event = aml_arg(1); 435 436 ifctx = aml_if(aml_equal(uid, aml_int(i))); 437 { 438 aml_append(ifctx, aml_notify(cpu, event)); 439 } 440 aml_append(method, ifctx); 441 } 442 aml_append(cpus_dev, method); 443 444 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); 445 { 446 Aml *idx = aml_arg(0); 447 Aml *sta = aml_local(0); 448 449 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 450 aml_append(method, aml_store(idx, cpu_selector)); 451 aml_append(method, aml_store(zero, sta)); 452 ifctx = aml_if(aml_equal(is_enabled, one)); 453 { 454 aml_append(ifctx, aml_store(aml_int(0xF), sta)); 455 } 456 aml_append(method, ifctx); 457 aml_append(method, aml_release(ctrl_lock)); 458 aml_append(method, aml_return(sta)); 459 } 460 aml_append(cpus_dev, method); 461 462 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); 463 { 464 Aml *idx = aml_arg(0); 465 466 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 467 aml_append(method, aml_store(idx, cpu_selector)); 468 if (opts.fw_unplugs_cpu) { 469 aml_append(method, aml_store(one, fw_ej_evt)); 470 aml_append(method, aml_store(aml_int(OVMF_CPUHP_SMI_CMD), 471 aml_name("%s", opts.smi_path))); 472 } else { 473 aml_append(method, aml_store(one, ej_evt)); 474 } 475 aml_append(method, aml_release(ctrl_lock)); 476 } 477 aml_append(cpus_dev, method); 478 479 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); 480 { 481 const uint8_t max_cpus_per_pass = 255; 482 Aml *else_ctx; 483 Aml *while_ctx, *while_ctx2; 484 Aml *has_event = aml_local(0); 485 Aml *dev_chk = aml_int(1); 486 Aml *eject_req = aml_int(3); 487 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); 488 Aml *num_added_cpus = aml_local(1); 489 Aml *cpu_idx = aml_local(2); 490 Aml *uid = aml_local(3); 491 Aml *has_job = aml_local(4); 492 Aml *new_cpus = aml_name(CPU_ADDED_LIST); 493 494 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 495 496 /* 497 * Windows versions newer than XP (including Windows 10/Windows 498 * Server 2019), do support* VarPackageOp but, it is cripled to hold 499 * the same elements number as old PackageOp. 500 * For compatibility with Windows XP (so it won't crash) use ACPI1.0 501 * PackageOp which can hold max 255 elements. 502 * 503 * use named package as old Windows don't support it in local var 504 */ 505 aml_append(method, aml_name_decl(CPU_ADDED_LIST, 506 aml_package(max_cpus_per_pass))); 507 508 aml_append(method, aml_store(zero, uid)); 509 aml_append(method, aml_store(one, has_job)); 510 /* 511 * CPU_ADDED_LIST can hold limited number of elements, outer loop 512 * allows to process CPUs in batches which let us to handle more 513 * CPUs than CPU_ADDED_LIST can hold. 514 */ 515 while_ctx2 = aml_while(aml_equal(has_job, one)); 516 { 517 aml_append(while_ctx2, aml_store(zero, has_job)); 518 519 aml_append(while_ctx2, aml_store(one, has_event)); 520 aml_append(while_ctx2, aml_store(zero, num_added_cpus)); 521 522 /* 523 * Scan CPUs, till there are CPUs with events or 524 * CPU_ADDED_LIST capacity is exhausted 525 */ 526 while_ctx = aml_while(aml_land(aml_equal(has_event, one), 527 aml_lless(uid, aml_int(arch_ids->len)))); 528 { 529 /* 530 * clear loop exit condition, ins_evt/rm_evt checks will 531 * set it to 1 while next_cpu_cmd returns a CPU with events 532 */ 533 aml_append(while_ctx, aml_store(zero, has_event)); 534 535 aml_append(while_ctx, aml_store(uid, cpu_selector)); 536 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); 537 538 /* 539 * wrap around case, scan is complete, exit loop. 540 * It happens since events are not cleared in scan loop, 541 * so next_cpu_cmd continues to find already processed CPUs 542 */ 543 ifctx = aml_if(aml_lless(cpu_data, uid)); 544 { 545 aml_append(ifctx, aml_break()); 546 } 547 aml_append(while_ctx, ifctx); 548 549 /* 550 * if CPU_ADDED_LIST is full, exit inner loop and process 551 * collected CPUs 552 */ 553 ifctx = aml_if( 554 aml_equal(num_added_cpus, aml_int(max_cpus_per_pass))); 555 { 556 aml_append(ifctx, aml_store(one, has_job)); 557 aml_append(ifctx, aml_break()); 558 } 559 aml_append(while_ctx, ifctx); 560 561 aml_append(while_ctx, aml_store(cpu_data, uid)); 562 ifctx = aml_if(aml_equal(ins_evt, one)); 563 { 564 /* cache added CPUs to Notify/Wakeup later */ 565 aml_append(ifctx, aml_store(uid, 566 aml_index(new_cpus, num_added_cpus))); 567 aml_append(ifctx, aml_increment(num_added_cpus)); 568 aml_append(ifctx, aml_store(one, has_event)); 569 } 570 aml_append(while_ctx, ifctx); 571 else_ctx = aml_else(); 572 ifctx = aml_if(aml_equal(rm_evt, one)); 573 { 574 aml_append(ifctx, 575 aml_call2(CPU_NOTIFY_METHOD, uid, eject_req)); 576 aml_append(ifctx, aml_store(one, rm_evt)); 577 aml_append(ifctx, aml_store(one, has_event)); 578 } 579 aml_append(else_ctx, ifctx); 580 aml_append(while_ctx, else_ctx); 581 aml_append(while_ctx, aml_increment(uid)); 582 } 583 aml_append(while_ctx2, while_ctx); 584 585 /* 586 * in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT, 587 * make upcall to FW, so it can pull in new CPUs before 588 * OS is notified and wakes them up 589 */ 590 if (opts.smi_path) { 591 ifctx = aml_if(aml_lgreater(num_added_cpus, zero)); 592 { 593 aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD), 594 aml_name("%s", opts.smi_path))); 595 } 596 aml_append(while_ctx2, ifctx); 597 } 598 599 /* Notify OSPM about new CPUs and clear insert events */ 600 aml_append(while_ctx2, aml_store(zero, cpu_idx)); 601 while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus)); 602 { 603 aml_append(while_ctx, 604 aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)), 605 uid)); 606 aml_append(while_ctx, 607 aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk)); 608 aml_append(while_ctx, aml_store(uid, aml_debug())); 609 aml_append(while_ctx, aml_store(uid, cpu_selector)); 610 aml_append(while_ctx, aml_store(one, ins_evt)); 611 aml_append(while_ctx, aml_increment(cpu_idx)); 612 } 613 aml_append(while_ctx2, while_ctx); 614 /* 615 * If another batch is needed, then it will resume scanning 616 * exactly at -- and not after -- the last CPU that's currently 617 * in CPU_ADDED_LIST. In other words, the last CPU in 618 * CPU_ADDED_LIST is going to be re-checked. That's OK: we've 619 * just cleared the insert event for *all* CPUs in 620 * CPU_ADDED_LIST, including the last one. So the scan will 621 * simply seek past it. 622 */ 623 } 624 aml_append(method, while_ctx2); 625 aml_append(method, aml_release(ctrl_lock)); 626 } 627 aml_append(cpus_dev, method); 628 629 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); 630 { 631 Aml *uid = aml_arg(0); 632 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); 633 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); 634 635 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); 636 aml_append(method, aml_store(uid, cpu_selector)); 637 aml_append(method, aml_store(ev_cmd, cpu_cmd)); 638 aml_append(method, aml_store(aml_arg(1), cpu_data)); 639 aml_append(method, aml_store(st_cmd, cpu_cmd)); 640 aml_append(method, aml_store(aml_arg(2), cpu_data)); 641 aml_append(method, aml_release(ctrl_lock)); 642 } 643 aml_append(cpus_dev, method); 644 645 /* build Processor object for each processor */ 646 for (i = 0; i < arch_ids->len; i++) { 647 Aml *dev; 648 Aml *uid = aml_int(i); 649 GArray *madt_buf = g_array_new(0, 1, 1); 650 int arch_id = arch_ids->cpus[i].arch_id; 651 652 if (opts.acpi_1_compatible && arch_id < 255) { 653 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); 654 } else { 655 dev = aml_device(CPU_NAME_FMT, i); 656 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); 657 aml_append(dev, aml_name_decl("_UID", uid)); 658 } 659 660 method = aml_method("_STA", 0, AML_SERIALIZED); 661 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); 662 aml_append(dev, method); 663 664 /* build _MAT object */ 665 build_madt_cpu(i, arch_ids, madt_buf, true); /* set enabled flag */ 666 aml_append(dev, aml_name_decl("_MAT", 667 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); 668 g_array_free(madt_buf, true); 669 670 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { 671 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); 672 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); 673 aml_append(dev, method); 674 } 675 676 method = aml_method("_OST", 3, AML_SERIALIZED); 677 aml_append(method, 678 aml_call4(CPU_OST_METHOD, uid, aml_arg(0), 679 aml_arg(1), aml_arg(2)) 680 ); 681 aml_append(dev, method); 682 683 /* Linux guests discard SRAT info for non-present CPUs 684 * as a result _PXM is required for all CPUs which might 685 * be hot-plugged. For simplicity, add it for all CPUs. 686 */ 687 if (arch_ids->cpus[i].props.has_node_id) { 688 aml_append(dev, aml_name_decl("_PXM", 689 aml_int(arch_ids->cpus[i].props.node_id))); 690 } 691 692 aml_append(cpus_dev, dev); 693 } 694 } 695 aml_append(sb_scope, cpus_dev); 696 aml_append(table, sb_scope); 697 698 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); 699 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); 700 aml_append(table, method); 701 702 g_free(cphp_res_path); 703 } 704