1*4d583093SPeter Maydell==================== 2*4d583093SPeter MaydellQEMU PCI test device 3*4d583093SPeter Maydell==================== 4*4d583093SPeter Maydell 5*4d583093SPeter Maydell``pci-testdev`` is a device used for testing low level IO. 6*4d583093SPeter Maydell 7*4d583093SPeter MaydellThe device implements up to three BARs: BAR0, BAR1 and BAR2. 8*4d583093SPeter MaydellEach of BAR 0+1 can be memory or IO. Guests must detect 9*4d583093SPeter MaydellBAR types and act accordingly. 10*4d583093SPeter Maydell 11*4d583093SPeter MaydellBAR 0+1 size is up to 4K bytes each. 12*4d583093SPeter MaydellBAR 0+1 starts with the following header: 13*4d583093SPeter Maydell 14*4d583093SPeter Maydell.. code-block:: c 15*4d583093SPeter Maydell 16*4d583093SPeter Maydell typedef struct PCITestDevHdr { 17*4d583093SPeter Maydell uint8_t test; /* write-only, starts a given test number */ 18*4d583093SPeter Maydell uint8_t width_type; /* 19*4d583093SPeter Maydell * read-only, type and width of access for a given test. 20*4d583093SPeter Maydell * 1,2,4 for byte,word or long write. 21*4d583093SPeter Maydell * any other value if test not supported on this BAR 22*4d583093SPeter Maydell */ 23*4d583093SPeter Maydell uint8_t pad0[2]; 24*4d583093SPeter Maydell uint32_t offset; /* read-only, offset in this BAR for a given test */ 25*4d583093SPeter Maydell uint32_t data; /* read-only, data to use for a given test */ 26*4d583093SPeter Maydell uint32_t count; /* for debugging. number of writes detected. */ 27*4d583093SPeter Maydell uint8_t name[]; /* for debugging. 0-terminated ASCII string. */ 28*4d583093SPeter Maydell } PCITestDevHdr; 29*4d583093SPeter Maydell 30*4d583093SPeter MaydellAll registers are little endian. 31*4d583093SPeter Maydell 32*4d583093SPeter MaydellThe device is expected to always implement tests 0 to N on each BAR, and to add new 33*4d583093SPeter Maydelltests with higher numbers. In this way a guest can scan test numbers until it 34*4d583093SPeter Maydelldetects an access type that it does not support on this BAR, then stop. 35*4d583093SPeter Maydell 36*4d583093SPeter MaydellBAR2 is a 64bit memory BAR, without backing storage. It is disabled 37*4d583093SPeter Maydellby default and can be enabled using the ``membar=<size>`` property. This 38*4d583093SPeter Maydellcan be used to test whether guests handle PCI BARs of a specific 39*4d583093SPeter Maydell(possibly quite large) size correctly. 40