1*5ab179dbSJamin Lin=========================== 2*5ab179dbSJamin LinASPEED Interrupt Controller 3*5ab179dbSJamin Lin=========================== 4*5ab179dbSJamin Lin 5*5ab179dbSJamin LinAST2700 6*5ab179dbSJamin Lin------- 7*5ab179dbSJamin LinThere are a total of 480 interrupt sources in AST2700. Due to the limitation of 8*5ab179dbSJamin Lininterrupt numbers of processors, the interrupts are merged every 32 sources for 9*5ab179dbSJamin Lininterrupt numbers greater than 127. 10*5ab179dbSJamin Lin 11*5ab179dbSJamin LinThere are two levels of interrupt controllers, INTC (CPU Die) and INTCIO 12*5ab179dbSJamin Lin(I/O Die). 13*5ab179dbSJamin Lin 14*5ab179dbSJamin LinInterrupt Mapping 15*5ab179dbSJamin Lin----------------- 16*5ab179dbSJamin Lin- INTC: Handles interrupt sources 0 - 127 and integrates signals from INTCIO. 17*5ab179dbSJamin Lin- INTCIO: Handles interrupt sources 128 - 319 independently. 18*5ab179dbSJamin Lin 19*5ab179dbSJamin LinQEMU Support 20*5ab179dbSJamin Lin------------ 21*5ab179dbSJamin LinCurrently, only GIC 192 to 201 are supported, and their source interrupts are 22*5ab179dbSJamin Linfrom INTCIO and connected to INTC at input pin 0 and output pins 0 to 9 for 23*5ab179dbSJamin LinGIC 192-201. 24*5ab179dbSJamin Lin 25*5ab179dbSJamin LinDesign for GICINT 196 26*5ab179dbSJamin Lin--------------------- 27*5ab179dbSJamin LinThe orgate has interrupt sources ranging from 0 to 31, with its output pin 28*5ab179dbSJamin Linconnected to INTCIO "T0 GICINT_196". The output pin is then connected to INTC 29*5ab179dbSJamin Lin"GIC_192_201" at bit 4, and its bit 4 output pin is connected to GIC 196. 30*5ab179dbSJamin Lin 31*5ab179dbSJamin LinINTC GIC_192_201 Output Pin Mapping 32*5ab179dbSJamin Lin----------------------------------- 33*5ab179dbSJamin LinThe design of INTC GIC_192_201 have 10 output pins, mapped as following: 34*5ab179dbSJamin Lin 35*5ab179dbSJamin Lin==== ==== 36*5ab179dbSJamin LinBit GIC 37*5ab179dbSJamin Lin==== ==== 38*5ab179dbSJamin Lin0 192 39*5ab179dbSJamin Lin1 193 40*5ab179dbSJamin Lin2 194 41*5ab179dbSJamin Lin3 195 42*5ab179dbSJamin Lin4 196 43*5ab179dbSJamin Lin5 197 44*5ab179dbSJamin Lin6 198 45*5ab179dbSJamin Lin7 199 46*5ab179dbSJamin Lin8 200 47*5ab179dbSJamin Lin9 201 48*5ab179dbSJamin Lin==== ==== 49*5ab179dbSJamin Lin 50*5ab179dbSJamin LinAST2700 A0 51*5ab179dbSJamin Lin---------- 52*5ab179dbSJamin LinIt has only one INTC controller, and currently, only GIC 128-136 is supported. 53*5ab179dbSJamin LinTo support both AST2700 A1 and AST2700 A0, there are 10 OR gates in the INTC, 54*5ab179dbSJamin Linwith gates 1 to 9 supporting GIC 128-136. 55*5ab179dbSJamin Lin 56*5ab179dbSJamin LinDesign for GICINT 132 57*5ab179dbSJamin Lin--------------------- 58*5ab179dbSJamin LinThe orgate has interrupt sources ranging from 0 to 31, with its output pin 59*5ab179dbSJamin Linconnected to INTC. The output pin is then connected to GIC 132. 60*5ab179dbSJamin Lin 61*5ab179dbSJamin LinBlock Diagram of GICINT 196 for AST2700 A1 and GICINT 132 for AST2700 A0 62*5ab179dbSJamin Lin------------------------------------------------------------------------ 63*5ab179dbSJamin Lin 64*5ab179dbSJamin Lin.. code-block:: 65*5ab179dbSJamin Lin 66*5ab179dbSJamin Lin |-------------------------------------------------------------------------------------------------------| 67*5ab179dbSJamin Lin | AST2700 A1 Design | 68*5ab179dbSJamin Lin | To GICINT196 | 69*5ab179dbSJamin Lin | | 70*5ab179dbSJamin Lin | ETH1 |-----------| |--------------------------| |--------------| | 71*5ab179dbSJamin Lin | -------->|0 | | INTCIO | | orgates[0] | | 72*5ab179dbSJamin Lin | ETH2 | 4| orgates[0]------>|inpin[0]-------->outpin[0]|------->| 0 | | 73*5ab179dbSJamin Lin | -------->|1 5| orgates[1]------>|inpin[1]-------->outpin[1]|------->| 1 | | 74*5ab179dbSJamin Lin | ETH3 | 6| orgates[2]------>|inpin[2]-------->outpin[2]|------->| 2 | | 75*5ab179dbSJamin Lin | -------->|2 19| orgates[3]------>|inpin[3]-------->outpin[3]|------->| 3 OR[0:9] |-----| | 76*5ab179dbSJamin Lin | UART0 | 20|-->orgates[4]------>|inpin[4]-------->outpin[4]|------->| 4 | | | 77*5ab179dbSJamin Lin | -------->|7 21| orgates[5]------>|inpin[5]-------->outpin[5]|------->| 5 | | | 78*5ab179dbSJamin Lin | UART1 | 22| orgates[6]------>|inpin[6]-------->outpin[6]|------->| 6 | | | 79*5ab179dbSJamin Lin | -------->|8 23| orgates[7]------>|inpin[7]-------->outpin[7]|------->| 7 | | | 80*5ab179dbSJamin Lin | UART2 | 24| orgates[8]------>|inpin[8]-------->outpin[8]|------->| 8 | | | 81*5ab179dbSJamin Lin | -------->|9 25| orgates[9]------>|inpin[9]-------->outpin[9]|------->| 9 | | | 82*5ab179dbSJamin Lin | UART3 | 26| |--------------------------| |--------------| | | 83*5ab179dbSJamin Lin | ---------|10 27| | | 84*5ab179dbSJamin Lin | UART5 | 28| | | 85*5ab179dbSJamin Lin | -------->|11 29| | | 86*5ab179dbSJamin Lin | UART6 | | | | 87*5ab179dbSJamin Lin | -------->|12 30| |-----------------------------------------------------------------------| | 88*5ab179dbSJamin Lin | UART7 | 31| | | 89*5ab179dbSJamin Lin | -------->|13 | | | 90*5ab179dbSJamin Lin | UART8 | OR[0:31] | | |------------------------------| |----------| | 91*5ab179dbSJamin Lin | -------->|14 | | | INTC | | GIC | | 92*5ab179dbSJamin Lin | UART9 | | | |inpin[0:0]--------->outpin[0] |---------->|192 | | 93*5ab179dbSJamin Lin | -------->|15 | | |inpin[0:1]--------->outpin[1] |---------->|193 | | 94*5ab179dbSJamin Lin | UART10 | | | |inpin[0:2]--------->outpin[2] |---------->|194 | | 95*5ab179dbSJamin Lin | -------->|16 | | |inpin[0:3]--------->outpin[3] |---------->|195 | | 96*5ab179dbSJamin Lin | UART11 | | |--------------> |inpin[0:4]--------->outpin[4] |---------->|196 | | 97*5ab179dbSJamin Lin | -------->|17 | |inpin[0:5]--------->outpin[5] |---------->|197 | | 98*5ab179dbSJamin Lin | UART12 | | |inpin[0:6]--------->outpin[6] |---------->|198 | | 99*5ab179dbSJamin Lin | -------->|18 | |inpin[0:7]--------->outpin[7] |---------->|199 | | 100*5ab179dbSJamin Lin | |-----------| |inpin[0:8]--------->outpin[8] |---------->|200 | | 101*5ab179dbSJamin Lin | |inpin[0:9]--------->outpin[9] |---------->|201 | | 102*5ab179dbSJamin Lin |-------------------------------------------------------------------------------------------------------| 103*5ab179dbSJamin Lin |-------------------------------------------------------------------------------------------------------| 104*5ab179dbSJamin Lin | ETH1 |-----------| orgates[1]------->|inpin[1]----------->outpin[10]|---------->|128 | | 105*5ab179dbSJamin Lin | -------->|0 | orgates[2]------->|inpin[2]----------->outpin[11]|---------->|129 | | 106*5ab179dbSJamin Lin | ETH2 | 4| orgates[3]------->|inpin[3]----------->outpin[12]|---------->|130 | | 107*5ab179dbSJamin Lin | -------->|1 5| orgates[4]------->|inpin[4]----------->outpin[13]|---------->|131 | | 108*5ab179dbSJamin Lin | ETH3 | 6|---->orgates[5]------->|inpin[5]----------->outpin[14]|---------->|132 | | 109*5ab179dbSJamin Lin | -------->|2 19| orgates[6]------->|inpin[6]----------->outpin[15]|---------->|133 | | 110*5ab179dbSJamin Lin | UART0 | 20| orgates[7]------->|inpin[7]----------->outpin[16]|---------->|134 | | 111*5ab179dbSJamin Lin | -------->|7 21| orgates[8]------->|inpin[8]----------->outpin[17]|---------->|135 | | 112*5ab179dbSJamin Lin | UART1 | 22| orgates[9]------->|inpin[9]----------->outpin[18]|---------->|136 | | 113*5ab179dbSJamin Lin | -------->|8 23| |------------------------------| |----------| | 114*5ab179dbSJamin Lin | UART2 | 24| | 115*5ab179dbSJamin Lin | -------->|9 25| AST2700 A0 Design | 116*5ab179dbSJamin Lin | UART3 | 26| | 117*5ab179dbSJamin Lin | -------->|10 27| | 118*5ab179dbSJamin Lin | UART5 | 28| | 119*5ab179dbSJamin Lin | -------->|11 29| GICINT132 | 120*5ab179dbSJamin Lin | UART6 | | | 121*5ab179dbSJamin Lin | -------->|12 30| | 122*5ab179dbSJamin Lin | UART7 | 31| | 123*5ab179dbSJamin Lin | -------->|13 | | 124*5ab179dbSJamin Lin | UART8 | OR[0:31] | | 125*5ab179dbSJamin Lin | -------->|14 | | 126*5ab179dbSJamin Lin | UART9 | | | 127*5ab179dbSJamin Lin | -------->|15 | | 128*5ab179dbSJamin Lin | UART10 | | | 129*5ab179dbSJamin Lin | -------->|16 | | 130*5ab179dbSJamin Lin | UART11 | | | 131*5ab179dbSJamin Lin | -------->|17 | | 132*5ab179dbSJamin Lin | UART12 | | | 133*5ab179dbSJamin Lin | -------->|18 | | 134*5ab179dbSJamin Lin | |-----------| | 135*5ab179dbSJamin Lin | | 136*5ab179dbSJamin Lin |-------------------------------------------------------------------------------------------------------| 137