xref: /openbmc/qemu/bsd-user/arm/target.h (revision 647afdf1836548146b77c6ca68e93c7acfe35738)
1*647afdf1SWarner Losh /*
2*647afdf1SWarner Losh  * Intel general target stuff that's common to all i386 details
3*647afdf1SWarner Losh  *
4*647afdf1SWarner Losh  * Copyright (c) 2022 M. Warner Losh <imp@bsdimp.com>
5*647afdf1SWarner Losh  *
6*647afdf1SWarner Losh  * SPDX-License-Identifier: GPL-2.0-or-later
7*647afdf1SWarner Losh  */
8*647afdf1SWarner Losh 
9*647afdf1SWarner Losh #ifndef TARGET_H
10*647afdf1SWarner Losh #define TARGET_H
11*647afdf1SWarner Losh 
12*647afdf1SWarner Losh /*
13*647afdf1SWarner Losh  * arm EABI 'lumps' the registers for 64-bit args.
14*647afdf1SWarner Losh  */
15*647afdf1SWarner Losh static inline bool regpairs_aligned(void *cpu_env)
16*647afdf1SWarner Losh {
17*647afdf1SWarner Losh     return true;
18*647afdf1SWarner Losh }
19*647afdf1SWarner Losh 
20*647afdf1SWarner Losh #endif /* ! TARGET_H */
21*647afdf1SWarner Losh 
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