1647afdf1SWarner Losh /* 2647afdf1SWarner Losh * Intel general target stuff that's common to all i386 details 3647afdf1SWarner Losh * 4647afdf1SWarner Losh * Copyright (c) 2022 M. Warner Losh <imp@bsdimp.com> 5647afdf1SWarner Losh * 6647afdf1SWarner Losh * SPDX-License-Identifier: GPL-2.0-or-later 7647afdf1SWarner Losh */ 8647afdf1SWarner Losh 9647afdf1SWarner Losh #ifndef TARGET_H 10647afdf1SWarner Losh #define TARGET_H 11647afdf1SWarner Losh 12647afdf1SWarner Losh /* 13647afdf1SWarner Losh * arm EABI 'lumps' the registers for 64-bit args. 14647afdf1SWarner Losh */ regpairs_aligned(void * cpu_env)15647afdf1SWarner Loshstatic inline bool regpairs_aligned(void *cpu_env) 16647afdf1SWarner Losh { 17647afdf1SWarner Losh return true; 18647afdf1SWarner Losh } 19647afdf1SWarner Losh 20*ea9cea93SMarkus Armbruster #endif /* TARGET_H */ 21647afdf1SWarner Losh 22