1*ec018b76SWarner Losh /* 2*ec018b76SWarner Losh * Aarch64 general target stuff that's common to all aarch details 3*ec018b76SWarner Losh * 4*ec018b76SWarner Losh * Copyright (c) 2022 M. Warner Losh <imp@bsdimp.com> 5*ec018b76SWarner Losh * 6*ec018b76SWarner Losh * SPDX-License-Identifier: GPL-2.0-or-later 7*ec018b76SWarner Losh */ 8*ec018b76SWarner Losh 9*ec018b76SWarner Losh #ifndef TARGET_H 10*ec018b76SWarner Losh #define TARGET_H 11*ec018b76SWarner Losh 12*ec018b76SWarner Losh /* 13*ec018b76SWarner Losh * aaarch64 ABI does not 'lump' the registers for 64-bit args. 14*ec018b76SWarner Losh */ regpairs_aligned(void * cpu_env)15*ec018b76SWarner Loshstatic inline bool regpairs_aligned(void *cpu_env) 16*ec018b76SWarner Losh { 17*ec018b76SWarner Losh return false; 18*ec018b76SWarner Losh } 19*ec018b76SWarner Losh 20*ec018b76SWarner Losh #endif /* TARGET_H */ 21