193115d32SThomas Richter /* SPDX-License-Identifier: GPL-2.0 */ 293115d32SThomas Richter /* 393115d32SThomas Richter * Support for s390 CPU measurement counter set diagnostic facility 493115d32SThomas Richter * 593115d32SThomas Richter * Copyright IBM Corp. 2019 693115d32SThomas Richter Author(s): Hendrik Brueckner <brueckner@linux.ibm.com> 793115d32SThomas Richter * Thomas Richter <tmricht@linux.ibm.com> 893115d32SThomas Richter */ 993115d32SThomas Richter #ifndef S390_CPUMCF_KERNEL_H 1093115d32SThomas Richter #define S390_CPUMCF_KERNEL_H 1193115d32SThomas Richter 1293115d32SThomas Richter #define S390_CPUMCF_DIAG_DEF 0xfeef /* Counter diagnostic entry ID */ 1393115d32SThomas Richter #define PERF_EVENT_CPUM_CF_DIAG 0xBC000 /* Event: Counter sets */ 14*113fcb46SAdrian Hunter #define PERF_EVENT_CPUM_SF_DIAG 0xBD000 /* Event: Combined-sampling */ 1593115d32SThomas Richter 1693115d32SThomas Richter struct cf_ctrset_entry { /* CPU-M CF counter set entry (8 byte) */ 1793115d32SThomas Richter unsigned int def:16; /* 0-15 Data Entry Format */ 1893115d32SThomas Richter unsigned int set:16; /* 16-23 Counter set identifier */ 1993115d32SThomas Richter unsigned int ctr:16; /* 24-39 Number of stored counters */ 2093115d32SThomas Richter unsigned int res1:16; /* 40-63 Reserved */ 2193115d32SThomas Richter }; 2293115d32SThomas Richter 2393115d32SThomas Richter struct cf_trailer_entry { /* CPU-M CF trailer for raw traces (64 byte) */ 2493115d32SThomas Richter /* 0 - 7 */ 2593115d32SThomas Richter union { 2693115d32SThomas Richter struct { 2793115d32SThomas Richter unsigned int clock_base:1; /* TOD clock base */ 2893115d32SThomas Richter unsigned int speed:1; /* CPU speed */ 2993115d32SThomas Richter /* Measurement alerts */ 3093115d32SThomas Richter unsigned int mtda:1; /* Loss of MT ctr. data alert */ 3193115d32SThomas Richter unsigned int caca:1; /* Counter auth. change alert */ 3293115d32SThomas Richter unsigned int lcda:1; /* Loss of counter data alert */ 3393115d32SThomas Richter }; 3493115d32SThomas Richter unsigned long flags; /* 0-63 All indicators */ 3593115d32SThomas Richter }; 3693115d32SThomas Richter /* 8 - 15 */ 3793115d32SThomas Richter unsigned int cfvn:16; /* 64-79 Ctr First Version */ 3893115d32SThomas Richter unsigned int csvn:16; /* 80-95 Ctr Second Version */ 3993115d32SThomas Richter unsigned int cpu_speed:32; /* 96-127 CPU speed */ 4093115d32SThomas Richter /* 16 - 23 */ 4193115d32SThomas Richter unsigned long timestamp; /* 128-191 Timestamp (TOD) */ 4293115d32SThomas Richter /* 24 - 55 */ 4393115d32SThomas Richter union { 4493115d32SThomas Richter struct { 4593115d32SThomas Richter unsigned long progusage1; 4693115d32SThomas Richter unsigned long progusage2; 4793115d32SThomas Richter unsigned long progusage3; 4893115d32SThomas Richter unsigned long tod_base; 4993115d32SThomas Richter }; 5093115d32SThomas Richter unsigned long progusage[4]; 5193115d32SThomas Richter }; 5293115d32SThomas Richter /* 56 - 63 */ 5393115d32SThomas Richter unsigned int mach_type:16; /* Machine type */ 5493115d32SThomas Richter unsigned int res1:16; /* Reserved */ 5593115d32SThomas Richter unsigned int res2:32; /* Reserved */ 5693115d32SThomas Richter }; 5793115d32SThomas Richter 5893115d32SThomas Richter #define CPUMF_CTR_SET_BASIC 0 /* Basic Counter Set */ 5993115d32SThomas Richter #define CPUMF_CTR_SET_USER 1 /* Problem-State Counter Set */ 6093115d32SThomas Richter #define CPUMF_CTR_SET_CRYPTO 2 /* Crypto-Activity Counter Set */ 6193115d32SThomas Richter #define CPUMF_CTR_SET_EXT 3 /* Extended Counter Set */ 6293115d32SThomas Richter #define CPUMF_CTR_SET_MT_DIAG 4 /* MT-diagnostic Counter Set */ 6393115d32SThomas Richter #endif 64