xref: /openbmc/linux/tools/perf/pmu-events/empty-pmu-events.c (revision 2519db2a9dc4f7ca5c1ad8309c51262e5b8ef89f)
100facc76SIan Rogers // SPDX-License-Identifier: GPL-2.0
200facc76SIan Rogers /*
300facc76SIan Rogers  * An empty pmu-events.c file used when there is no architecture json files in
400facc76SIan Rogers  * arch or when the jevents.py script cannot be run.
500facc76SIan Rogers  *
600facc76SIan Rogers  * The test cpu/soc is provided for testing.
700facc76SIan Rogers  */
800facc76SIan Rogers #include "pmu-events/pmu-events.h"
9*2519db2aSIan Rogers #include <string.h>
10*2519db2aSIan Rogers #include <stddef.h>
1100facc76SIan Rogers 
1200facc76SIan Rogers static const struct pmu_event pme_test_soc_cpu[] = {
1300facc76SIan Rogers 	{
1400facc76SIan Rogers 		.name = "l3_cache_rd",
1500facc76SIan Rogers 		.event = "event=0x40",
1600facc76SIan Rogers 		.desc = "L3 cache access, read",
1700facc76SIan Rogers 		.topic = "cache",
1800facc76SIan Rogers 		.long_desc = "Attributable Level 3 cache access, read",
1900facc76SIan Rogers 	},
2000facc76SIan Rogers 	{
2100facc76SIan Rogers 		.name = "segment_reg_loads.any",
2200facc76SIan Rogers 		.event = "event=0x6,period=200000,umask=0x80",
2300facc76SIan Rogers 		.desc = "Number of segment register loads",
2400facc76SIan Rogers 		.topic = "other",
2500facc76SIan Rogers 	},
2600facc76SIan Rogers 	{
2700facc76SIan Rogers 		.name = "dispatch_blocked.any",
2800facc76SIan Rogers 		.event = "event=0x9,period=200000,umask=0x20",
2900facc76SIan Rogers 		.desc = "Memory cluster signals to block micro-op dispatch for any reason",
3000facc76SIan Rogers 		.topic = "other",
3100facc76SIan Rogers 	},
3200facc76SIan Rogers 	{
3300facc76SIan Rogers 		.name = "eist_trans",
3400facc76SIan Rogers 		.event = "event=0x3a,period=200000,umask=0x0",
3500facc76SIan Rogers 		.desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions",
3600facc76SIan Rogers 		.topic = "other",
3700facc76SIan Rogers 	},
3800facc76SIan Rogers 	{
3900facc76SIan Rogers 		.name = "uncore_hisi_ddrc.flux_wcmd",
4000facc76SIan Rogers 		.event = "event=0x2",
4100facc76SIan Rogers 		.desc = "DDRC write commands. Unit: hisi_sccl,ddrc ",
4200facc76SIan Rogers 		.topic = "uncore",
4300facc76SIan Rogers 		.long_desc = "DDRC write commands",
4400facc76SIan Rogers 		.pmu = "hisi_sccl,ddrc",
4500facc76SIan Rogers 	},
4600facc76SIan Rogers 	{
4700facc76SIan Rogers 		.name = "unc_cbo_xsnp_response.miss_eviction",
4800facc76SIan Rogers 		.event = "event=0x22,umask=0x81",
4900facc76SIan Rogers 		.desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core. Unit: uncore_cbox ",
5000facc76SIan Rogers 		.topic = "uncore",
5100facc76SIan Rogers 		.long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core",
5200facc76SIan Rogers 		.pmu = "uncore_cbox",
5300facc76SIan Rogers 	},
5400facc76SIan Rogers 	{
5500facc76SIan Rogers 		.name = "event-hyphen",
5600facc76SIan Rogers 		.event = "event=0xe0,umask=0x00",
5700facc76SIan Rogers 		.desc = "UNC_CBO_HYPHEN. Unit: uncore_cbox ",
5800facc76SIan Rogers 		.topic = "uncore",
5900facc76SIan Rogers 		.long_desc = "UNC_CBO_HYPHEN",
6000facc76SIan Rogers 		.pmu = "uncore_cbox",
6100facc76SIan Rogers 	},
6200facc76SIan Rogers 	{
6300facc76SIan Rogers 		.name = "event-two-hyph",
6400facc76SIan Rogers 		.event = "event=0xc0,umask=0x00",
6500facc76SIan Rogers 		.desc = "UNC_CBO_TWO_HYPH. Unit: uncore_cbox ",
6600facc76SIan Rogers 		.topic = "uncore",
6700facc76SIan Rogers 		.long_desc = "UNC_CBO_TWO_HYPH",
6800facc76SIan Rogers 		.pmu = "uncore_cbox",
6900facc76SIan Rogers 	},
7000facc76SIan Rogers 	{
7100facc76SIan Rogers 		.name = "uncore_hisi_l3c.rd_hit_cpipe",
7200facc76SIan Rogers 		.event = "event=0x7",
7300facc76SIan Rogers 		.desc = "Total read hits. Unit: hisi_sccl,l3c ",
7400facc76SIan Rogers 		.topic = "uncore",
7500facc76SIan Rogers 		.long_desc = "Total read hits",
7600facc76SIan Rogers 		.pmu = "hisi_sccl,l3c",
7700facc76SIan Rogers 	},
7800facc76SIan Rogers 	{
7900facc76SIan Rogers 		.name = "uncore_imc_free_running.cache_miss",
8000facc76SIan Rogers 		.event = "event=0x12",
8100facc76SIan Rogers 		.desc = "Total cache misses. Unit: uncore_imc_free_running ",
8200facc76SIan Rogers 		.topic = "uncore",
8300facc76SIan Rogers 		.long_desc = "Total cache misses",
8400facc76SIan Rogers 		.pmu = "uncore_imc_free_running",
8500facc76SIan Rogers 	},
8600facc76SIan Rogers 	{
8700facc76SIan Rogers 		.name = "uncore_imc.cache_hits",
8800facc76SIan Rogers 		.event = "event=0x34",
8900facc76SIan Rogers 		.desc = "Total cache hits. Unit: uncore_imc ",
9000facc76SIan Rogers 		.topic = "uncore",
9100facc76SIan Rogers 		.long_desc = "Total cache hits",
9200facc76SIan Rogers 		.pmu = "uncore_imc",
9300facc76SIan Rogers 	},
9400facc76SIan Rogers 	{
9500facc76SIan Rogers 		.name = "bp_l1_btb_correct",
9600facc76SIan Rogers 		.event = "event=0x8a",
9700facc76SIan Rogers 		.desc = "L1 BTB Correction",
9800facc76SIan Rogers 		.topic = "branch",
9900facc76SIan Rogers 	},
10000facc76SIan Rogers 	{
10100facc76SIan Rogers 		.name = "bp_l2_btb_correct",
10200facc76SIan Rogers 		.event = "event=0x8b",
10300facc76SIan Rogers 		.desc = "L2 BTB Correction",
10400facc76SIan Rogers 		.topic = "branch",
10500facc76SIan Rogers 	},
10600facc76SIan Rogers 	{
10700facc76SIan Rogers 		.name = 0,
10800facc76SIan Rogers 		.event = 0,
10900facc76SIan Rogers 		.desc = 0,
11000facc76SIan Rogers 	},
11100facc76SIan Rogers };
11200facc76SIan Rogers 
11300facc76SIan Rogers const struct pmu_events_map pmu_events_map[] = {
11400facc76SIan Rogers 	{
115099b157cSIan Rogers 		.arch = "testarch",
11600facc76SIan Rogers 		.cpuid = "testcpu",
11700facc76SIan Rogers 		.table = pme_test_soc_cpu,
11800facc76SIan Rogers 	},
11900facc76SIan Rogers 	{
120099b157cSIan Rogers 		.arch = 0,
12100facc76SIan Rogers 		.cpuid = 0,
12200facc76SIan Rogers 		.table = 0,
12300facc76SIan Rogers 	},
12400facc76SIan Rogers };
12500facc76SIan Rogers 
12600facc76SIan Rogers static const struct pmu_event pme_test_soc_sys[] = {
12700facc76SIan Rogers 	{
12800facc76SIan Rogers 		.name = "sys_ddr_pmu.write_cycles",
12900facc76SIan Rogers 		.event = "event=0x2b",
13000facc76SIan Rogers 		.desc = "ddr write-cycles event. Unit: uncore_sys_ddr_pmu ",
13100facc76SIan Rogers 		.compat = "v8",
13200facc76SIan Rogers 		.topic = "uncore",
13300facc76SIan Rogers 		.pmu = "uncore_sys_ddr_pmu",
13400facc76SIan Rogers 	},
13500facc76SIan Rogers 	{
13600facc76SIan Rogers 		.name = "sys_ccn_pmu.read_cycles",
13700facc76SIan Rogers 		.event = "config=0x2c",
13800facc76SIan Rogers 		.desc = "ccn read-cycles event. Unit: uncore_sys_ccn_pmu ",
13900facc76SIan Rogers 		.compat = "0x01",
14000facc76SIan Rogers 		.topic = "uncore",
14100facc76SIan Rogers 		.pmu = "uncore_sys_ccn_pmu",
14200facc76SIan Rogers 	},
14300facc76SIan Rogers 	{
14400facc76SIan Rogers 		.name = 0,
14500facc76SIan Rogers 		.event = 0,
14600facc76SIan Rogers 		.desc = 0,
14700facc76SIan Rogers 	},
14800facc76SIan Rogers };
14900facc76SIan Rogers 
150*2519db2aSIan Rogers struct pmu_sys_events {
151*2519db2aSIan Rogers 	const char *name;
152*2519db2aSIan Rogers 	const struct pmu_event *table;
153*2519db2aSIan Rogers };
154*2519db2aSIan Rogers 
155*2519db2aSIan Rogers static const struct pmu_sys_events pmu_sys_event_tables[] = {
15600facc76SIan Rogers 	{
15700facc76SIan Rogers 		.table = pme_test_soc_sys,
15800facc76SIan Rogers 		.name = "pme_test_soc_sys",
15900facc76SIan Rogers 	},
16000facc76SIan Rogers 	{
16100facc76SIan Rogers 		.table = 0
16200facc76SIan Rogers 	},
16300facc76SIan Rogers };
164*2519db2aSIan Rogers 
165*2519db2aSIan Rogers const struct pmu_event *find_sys_events_table(const char *name)
166*2519db2aSIan Rogers {
167*2519db2aSIan Rogers 	for (const struct pmu_sys_events *tables = &pmu_sys_event_tables[0];
168*2519db2aSIan Rogers 	     tables->name;
169*2519db2aSIan Rogers 	     tables++) {
170*2519db2aSIan Rogers 		if (!strcmp(tables->name, name))
171*2519db2aSIan Rogers 			return tables->table;
172*2519db2aSIan Rogers 	}
173*2519db2aSIan Rogers 	return NULL;
174*2519db2aSIan Rogers }
175*2519db2aSIan Rogers 
176*2519db2aSIan Rogers int pmu_for_each_sys_event(pmu_event_iter_fn fn, void *data)
177*2519db2aSIan Rogers {
178*2519db2aSIan Rogers 	for (const struct pmu_sys_events *tables = &pmu_sys_event_tables[0];
179*2519db2aSIan Rogers 	     tables->name;
180*2519db2aSIan Rogers 	     tables++) {
181*2519db2aSIan Rogers 		for (const struct pmu_event *pe = &tables->table[0];
182*2519db2aSIan Rogers 		     pe->name || pe->metric_group || pe->metric_name;
183*2519db2aSIan Rogers 		     pe++) {
184*2519db2aSIan Rogers 			int ret = fn(pe, data);
185*2519db2aSIan Rogers 
186*2519db2aSIan Rogers 			if (ret)
187*2519db2aSIan Rogers 				return ret;
188*2519db2aSIan Rogers 		}
189*2519db2aSIan Rogers 	}
190*2519db2aSIan Rogers 	return 0;
191*2519db2aSIan Rogers }
192