1ea8d0ed6SKan Liang // SPDX-License-Identifier: GPL-2.0 2ea8d0ed6SKan Liang #include <stdio.h> 3eb39bf32SRavi Bangoria #include <stdlib.h> 4ea8d0ed6SKan Liang #include "util/evsel.h" 5eb39bf32SRavi Bangoria #include "util/env.h" 6d98079c0SIan Rogers #include "util/pmu.h" 7eb39bf32SRavi Bangoria #include "linux/string.h" 8ea8d0ed6SKan Liang 9ea8d0ed6SKan Liang void arch_evsel__set_sample_weight(struct evsel *evsel) 10ea8d0ed6SKan Liang { 11ea8d0ed6SKan Liang evsel__set_sample_bit(evsel, WEIGHT_STRUCT); 12ea8d0ed6SKan Liang } 13eb39bf32SRavi Bangoria 14eb39bf32SRavi Bangoria void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr) 15eb39bf32SRavi Bangoria { 16eb39bf32SRavi Bangoria struct perf_env env = { .total_mem = 0, } ; 17eb39bf32SRavi Bangoria 18eb39bf32SRavi Bangoria if (!perf_env__cpuid(&env)) 19eb39bf32SRavi Bangoria return; 20eb39bf32SRavi Bangoria 21eb39bf32SRavi Bangoria /* 22eb39bf32SRavi Bangoria * On AMD, precise cycles event sampling internally uses IBS pmu. 23eb39bf32SRavi Bangoria * But IBS does not have filtering capabilities and perf by default 24eb39bf32SRavi Bangoria * sets exclude_guest = 1. This makes IBS pmu event init fail and 25eb39bf32SRavi Bangoria * thus perf ends up doing non-precise sampling. Avoid it by clearing 26eb39bf32SRavi Bangoria * exclude_guest. 27eb39bf32SRavi Bangoria */ 28eb39bf32SRavi Bangoria if (env.cpuid && strstarts(env.cpuid, "AuthenticAMD")) 29eb39bf32SRavi Bangoria attr->exclude_guest = 0; 30eb39bf32SRavi Bangoria 31eb39bf32SRavi Bangoria free(env.cpuid); 32eb39bf32SRavi Bangoria } 33d98079c0SIan Rogers 3439d5f412SKan Liang /* Check whether the evsel's PMU supports the perf metrics */ 3539d5f412SKan Liang static bool evsel__sys_has_perf_metrics(const struct evsel *evsel) 3639d5f412SKan Liang { 3739d5f412SKan Liang const char *pmu_name = evsel->pmu_name ? evsel->pmu_name : "cpu"; 3839d5f412SKan Liang 3939d5f412SKan Liang /* 4039d5f412SKan Liang * The PERF_TYPE_RAW type is the core PMU type, e.g., "cpu" PMU 4139d5f412SKan Liang * on a non-hybrid machine, "cpu_core" PMU on a hybrid machine. 4239d5f412SKan Liang * The slots event is only available for the core PMU, which 4339d5f412SKan Liang * supports the perf metrics feature. 4439d5f412SKan Liang * Checking both the PERF_TYPE_RAW type and the slots event 4539d5f412SKan Liang * should be good enough to detect the perf metrics feature. 4639d5f412SKan Liang */ 4739d5f412SKan Liang if ((evsel->core.attr.type == PERF_TYPE_RAW) && 4839d5f412SKan Liang pmu_have_event(pmu_name, "slots")) 4939d5f412SKan Liang return true; 5039d5f412SKan Liang 5139d5f412SKan Liang return false; 5239d5f412SKan Liang } 5339d5f412SKan Liang 54d98079c0SIan Rogers bool arch_evsel__must_be_in_group(const struct evsel *evsel) 55d98079c0SIan Rogers { 5639d5f412SKan Liang if (!evsel__sys_has_perf_metrics(evsel)) 57d98079c0SIan Rogers return false; 58d98079c0SIan Rogers 59d98079c0SIan Rogers return evsel->name && 60*e69a5c01SZhengjun Xing (strcasestr(evsel->name, "slots") || 61d98079c0SIan Rogers strcasestr(evsel->name, "topdown")); 62d98079c0SIan Rogers } 63