15dab11d8SJerome Anand /* 25dab11d8SJerome Anand * Copyright (C) 2016 Intel Corporation 35dab11d8SJerome Anand * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com> 45dab11d8SJerome Anand * Ramesh Babu K V <ramesh.babu@intel.com> 55dab11d8SJerome Anand * Vaibhav Agarwal <vaibhav.agarwal@intel.com> 65dab11d8SJerome Anand * Jerome Anand <jerome.anand@intel.com> 75dab11d8SJerome Anand * 85dab11d8SJerome Anand * Permission is hereby granted, free of charge, to any person obtaining 95dab11d8SJerome Anand * a copy of this software and associated documentation files 105dab11d8SJerome Anand * (the "Software"), to deal in the Software without restriction, 115dab11d8SJerome Anand * including without limitation the rights to use, copy, modify, merge, 125dab11d8SJerome Anand * publish, distribute, sublicense, and/or sell copies of the Software, 135dab11d8SJerome Anand * and to permit persons to whom the Software is furnished to do so, 145dab11d8SJerome Anand * subject to the following conditions: 155dab11d8SJerome Anand * 165dab11d8SJerome Anand * The above copyright notice and this permission notice (including the 175dab11d8SJerome Anand * next paragraph) shall be included in all copies or substantial 185dab11d8SJerome Anand * portions of the Software. 195dab11d8SJerome Anand * 205dab11d8SJerome Anand * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 215dab11d8SJerome Anand * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 225dab11d8SJerome Anand * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 235dab11d8SJerome Anand * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 245dab11d8SJerome Anand * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 255dab11d8SJerome Anand * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 265dab11d8SJerome Anand * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 275dab11d8SJerome Anand * SOFTWARE. 285dab11d8SJerome Anand */ 295dab11d8SJerome Anand 305dab11d8SJerome Anand #ifndef _INTEL_HDMI_AUDIO_H_ 315dab11d8SJerome Anand #define _INTEL_HDMI_AUDIO_H_ 325dab11d8SJerome Anand 335dab11d8SJerome Anand #include "intel_hdmi_lpe_audio.h" 345dab11d8SJerome Anand 355dab11d8SJerome Anand #define PCM_INDEX 0 365dab11d8SJerome Anand #define MAX_PB_STREAMS 1 375dab11d8SJerome Anand #define MAX_CAP_STREAMS 0 385dab11d8SJerome Anand #define BYTES_PER_WORD 0x4 3977531beeSTakashi Iwai #define INTEL_HAD "HdmiLpeAudio" 405dab11d8SJerome Anand 4177531beeSTakashi Iwai /* 4277531beeSTakashi Iwai * CEA speaker placement: 4377531beeSTakashi Iwai * 4477531beeSTakashi Iwai * FL FLC FC FRC FR 4577531beeSTakashi Iwai * 4677531beeSTakashi Iwai * LFE 4777531beeSTakashi Iwai * 4877531beeSTakashi Iwai * RL RLC RC RRC RR 4977531beeSTakashi Iwai * 5077531beeSTakashi Iwai * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M 5177531beeSTakashi Iwai * corresponds to CEA RL/RR; The SMPTE channel _assignment_ C/LFE is 5277531beeSTakashi Iwai * swapped to CEA LFE/FC. 5377531beeSTakashi Iwai */ 5477531beeSTakashi Iwai enum cea_speaker_placement { 5577531beeSTakashi Iwai FL = (1 << 0), /* Front Left */ 5677531beeSTakashi Iwai FC = (1 << 1), /* Front Center */ 5777531beeSTakashi Iwai FR = (1 << 2), /* Front Right */ 5877531beeSTakashi Iwai FLC = (1 << 3), /* Front Left Center */ 5977531beeSTakashi Iwai FRC = (1 << 4), /* Front Right Center */ 6077531beeSTakashi Iwai RL = (1 << 5), /* Rear Left */ 6177531beeSTakashi Iwai RC = (1 << 6), /* Rear Center */ 6277531beeSTakashi Iwai RR = (1 << 7), /* Rear Right */ 6377531beeSTakashi Iwai RLC = (1 << 8), /* Rear Left Center */ 6477531beeSTakashi Iwai RRC = (1 << 9), /* Rear Right Center */ 6577531beeSTakashi Iwai LFE = (1 << 10), /* Low Frequency Effect */ 6677531beeSTakashi Iwai }; 675dab11d8SJerome Anand 6877531beeSTakashi Iwai struct cea_channel_speaker_allocation { 6977531beeSTakashi Iwai int ca_index; 7077531beeSTakashi Iwai int speakers[8]; 7177531beeSTakashi Iwai 7277531beeSTakashi Iwai /* derived values, just for convenience */ 7377531beeSTakashi Iwai int channels; 7477531beeSTakashi Iwai int spk_mask; 7577531beeSTakashi Iwai }; 7677531beeSTakashi Iwai 7777531beeSTakashi Iwai struct channel_map_table { 7877531beeSTakashi Iwai unsigned char map; /* ALSA API channel map position */ 7977531beeSTakashi Iwai unsigned char cea_slot; /* CEA slot value */ 8077531beeSTakashi Iwai int spk_mask; /* speaker position bit mask */ 8177531beeSTakashi Iwai }; 825dab11d8SJerome Anand 835dab11d8SJerome Anand struct pcm_stream_info { 84313d9f28STakashi Iwai struct snd_pcm_substream *substream; 85313d9f28STakashi Iwai int substream_refcount; 86f69bd104STakashi Iwai bool running; 875dab11d8SJerome Anand }; 885dab11d8SJerome Anand 8903c34377STakashi Iwai /* 905dab11d8SJerome Anand * struct snd_intelhad - intelhad driver structure 915dab11d8SJerome Anand * 925dab11d8SJerome Anand * @card: ptr to hold card details 9391b0cb0cSTakashi Iwai * @connected: the monitor connection status 945dab11d8SJerome Anand * @stream_info: stream information 95da864809STakashi Iwai * @eld: holds ELD info 965dab11d8SJerome Anand * @curr_buf: pointer to hold current active ring buf 975dab11d8SJerome Anand * @valid_buf_cnt: ring buffer count for stream 985dab11d8SJerome Anand * @had_spinlock: driver lock 995dab11d8SJerome Anand * @aes_bits: IEC958 status bits 1005dab11d8SJerome Anand * @buff_done: id of current buffer done intr 1015dab11d8SJerome Anand * @dev: platoform device handle 1025dab11d8SJerome Anand * @chmap: holds channel map info 1035dab11d8SJerome Anand */ 1045dab11d8SJerome Anand struct snd_intelhad { 1055dab11d8SJerome Anand struct snd_card *card; 10691b0cb0cSTakashi Iwai bool connected; 1075dab11d8SJerome Anand struct pcm_stream_info stream_info; 108df0435dbSTakashi Iwai unsigned char eld[HDMI_MAX_ELD_BYTES]; 109964ca808SPierre-Louis Bossart bool dp_output; 1105dab11d8SJerome Anand unsigned int aes_bits; 1115dab11d8SJerome Anand spinlock_t had_spinlock; 1125dab11d8SJerome Anand struct device *dev; 1135dab11d8SJerome Anand struct snd_pcm_chmap *chmap; 114da864809STakashi Iwai int tmds_clock_speed; 115da864809STakashi Iwai int link_rate; 116da864809STakashi Iwai 117e1b239f3STakashi Iwai /* ring buffer (BD) position index */ 118e1b239f3STakashi Iwai unsigned int bd_head; 119e1b239f3STakashi Iwai /* PCM buffer position indices */ 120e1b239f3STakashi Iwai unsigned int pcmbuf_head; /* being processed */ 121e1b239f3STakashi Iwai unsigned int pcmbuf_filled; /* to be filled */ 122e1b239f3STakashi Iwai 123e1b239f3STakashi Iwai unsigned int num_bds; /* number of BDs */ 124e1b239f3STakashi Iwai unsigned int period_bytes; /* PCM period size in bytes */ 125e1b239f3STakashi Iwai 126da864809STakashi Iwai /* internal stuff */ 127da864809STakashi Iwai int irq; 128da864809STakashi Iwai void __iomem *mmio_start; 129da864809STakashi Iwai unsigned int had_config_offset; 130*40ce4b5dSTakashi Iwai union aud_cfg aud_config; /* AUD_CONFIG reg value cache */ 131da864809STakashi Iwai struct work_struct hdmi_audio_wq; 1320e9c67d7STakashi Iwai struct mutex mutex; /* for protecting chmap and eld */ 1335dab11d8SJerome Anand }; 1345dab11d8SJerome Anand 1355dab11d8SJerome Anand #endif /* _INTEL_HDMI_AUDIO_ */ 136