xref: /openbmc/linux/sound/soc/ux500/ux500_msp_dai.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
23592b7f6SOla Lilja /*
33592b7f6SOla Lilja  * Copyright (C) ST-Ericsson SA 2012
43592b7f6SOla Lilja  *
53592b7f6SOla Lilja  * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
63592b7f6SOla Lilja  *         Roger Nilsson <roger.xr.nilsson@stericsson.com>
73592b7f6SOla Lilja  *         for ST-Ericsson.
83592b7f6SOla Lilja  */
93592b7f6SOla Lilja 
103592b7f6SOla Lilja #include <linux/module.h>
113592b7f6SOla Lilja #include <linux/slab.h>
123592b7f6SOla Lilja #include <linux/bitops.h>
133592b7f6SOla Lilja #include <linux/platform_device.h>
143592b7f6SOla Lilja #include <linux/clk.h>
15f382acbeSLee Jones #include <linux/of.h>
163592b7f6SOla Lilja #include <linux/regulator/consumer.h>
173592b7f6SOla Lilja #include <linux/mfd/dbx500-prcmu.h>
183592b7f6SOla Lilja 
193592b7f6SOla Lilja #include <sound/soc.h>
203592b7f6SOla Lilja #include <sound/soc-dai.h>
21f382acbeSLee Jones #include <sound/dmaengine_pcm.h>
223592b7f6SOla Lilja 
233592b7f6SOla Lilja #include "ux500_msp_i2s.h"
243592b7f6SOla Lilja #include "ux500_msp_dai.h"
251428c20fSLee Jones #include "ux500_pcm.h"
263592b7f6SOla Lilja 
setup_pcm_multichan(struct snd_soc_dai * dai,struct ux500_msp_config * msp_config)273592b7f6SOla Lilja static int setup_pcm_multichan(struct snd_soc_dai *dai,
283592b7f6SOla Lilja 			struct ux500_msp_config *msp_config)
293592b7f6SOla Lilja {
303592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
313592b7f6SOla Lilja 	struct msp_multichannel_config *multi =
323592b7f6SOla Lilja 					&msp_config->multichannel_config;
333592b7f6SOla Lilja 
343592b7f6SOla Lilja 	if (drvdata->slots > 1) {
353592b7f6SOla Lilja 		msp_config->multichannel_configured = 1;
363592b7f6SOla Lilja 
373592b7f6SOla Lilja 		multi->tx_multichannel_enable = true;
383592b7f6SOla Lilja 		multi->rx_multichannel_enable = true;
393592b7f6SOla Lilja 		multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
403592b7f6SOla Lilja 
413592b7f6SOla Lilja 		multi->tx_channel_0_enable = drvdata->tx_mask;
423592b7f6SOla Lilja 		multi->tx_channel_1_enable = 0;
433592b7f6SOla Lilja 		multi->tx_channel_2_enable = 0;
443592b7f6SOla Lilja 		multi->tx_channel_3_enable = 0;
453592b7f6SOla Lilja 
463592b7f6SOla Lilja 		multi->rx_channel_0_enable = drvdata->rx_mask;
473592b7f6SOla Lilja 		multi->rx_channel_1_enable = 0;
483592b7f6SOla Lilja 		multi->rx_channel_2_enable = 0;
493592b7f6SOla Lilja 		multi->rx_channel_3_enable = 0;
503592b7f6SOla Lilja 
513592b7f6SOla Lilja 		dev_dbg(dai->dev,
523592b7f6SOla Lilja 			"%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
533592b7f6SOla Lilja 			__func__, drvdata->slots, multi->tx_channel_0_enable,
543592b7f6SOla Lilja 			multi->rx_channel_0_enable);
553592b7f6SOla Lilja 	}
563592b7f6SOla Lilja 
573592b7f6SOla Lilja 	return 0;
583592b7f6SOla Lilja }
593592b7f6SOla Lilja 
setup_frameper(struct snd_soc_dai * dai,unsigned int rate,struct msp_protdesc * prot_desc)603592b7f6SOla Lilja static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
613592b7f6SOla Lilja 			struct msp_protdesc *prot_desc)
623592b7f6SOla Lilja {
633592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
643592b7f6SOla Lilja 
653592b7f6SOla Lilja 	switch (drvdata->slots) {
663592b7f6SOla Lilja 	case 1:
673592b7f6SOla Lilja 		switch (rate) {
683592b7f6SOla Lilja 		case 8000:
693592b7f6SOla Lilja 			prot_desc->frame_period =
703592b7f6SOla Lilja 				FRAME_PER_SINGLE_SLOT_8_KHZ;
713592b7f6SOla Lilja 			break;
723592b7f6SOla Lilja 
733592b7f6SOla Lilja 		case 16000:
743592b7f6SOla Lilja 			prot_desc->frame_period =
753592b7f6SOla Lilja 				FRAME_PER_SINGLE_SLOT_16_KHZ;
763592b7f6SOla Lilja 			break;
773592b7f6SOla Lilja 
783592b7f6SOla Lilja 		case 44100:
793592b7f6SOla Lilja 			prot_desc->frame_period =
803592b7f6SOla Lilja 				FRAME_PER_SINGLE_SLOT_44_1_KHZ;
813592b7f6SOla Lilja 			break;
823592b7f6SOla Lilja 
833592b7f6SOla Lilja 		case 48000:
843592b7f6SOla Lilja 			prot_desc->frame_period =
853592b7f6SOla Lilja 				FRAME_PER_SINGLE_SLOT_48_KHZ;
863592b7f6SOla Lilja 			break;
873592b7f6SOla Lilja 
883592b7f6SOla Lilja 		default:
893592b7f6SOla Lilja 			dev_err(dai->dev,
903592b7f6SOla Lilja 				"%s: Error: Unsupported sample-rate (freq = %d)!\n",
913592b7f6SOla Lilja 				__func__, rate);
923592b7f6SOla Lilja 			return -EINVAL;
933592b7f6SOla Lilja 		}
943592b7f6SOla Lilja 		break;
953592b7f6SOla Lilja 
963592b7f6SOla Lilja 	case 2:
973592b7f6SOla Lilja 		prot_desc->frame_period = FRAME_PER_2_SLOTS;
983592b7f6SOla Lilja 		break;
993592b7f6SOla Lilja 
1003592b7f6SOla Lilja 	case 8:
1013592b7f6SOla Lilja 		prot_desc->frame_period = FRAME_PER_8_SLOTS;
1023592b7f6SOla Lilja 		break;
1033592b7f6SOla Lilja 
1043592b7f6SOla Lilja 	case 16:
1053592b7f6SOla Lilja 		prot_desc->frame_period = FRAME_PER_16_SLOTS;
1063592b7f6SOla Lilja 		break;
1073592b7f6SOla Lilja 	default:
1083592b7f6SOla Lilja 		dev_err(dai->dev,
1093592b7f6SOla Lilja 			"%s: Error: Unsupported slot-count (slots = %d)!\n",
1103592b7f6SOla Lilja 			__func__, drvdata->slots);
1113592b7f6SOla Lilja 		return -EINVAL;
1123592b7f6SOla Lilja 	}
1133592b7f6SOla Lilja 
1143592b7f6SOla Lilja 	prot_desc->clocks_per_frame =
1153592b7f6SOla Lilja 			prot_desc->frame_period+1;
1163592b7f6SOla Lilja 
1173592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
1183592b7f6SOla Lilja 		__func__,
1193592b7f6SOla Lilja 		prot_desc->clocks_per_frame);
1203592b7f6SOla Lilja 
1213592b7f6SOla Lilja 	return 0;
1223592b7f6SOla Lilja }
1233592b7f6SOla Lilja 
setup_pcm_framing(struct snd_soc_dai * dai,unsigned int rate,struct msp_protdesc * prot_desc)1243592b7f6SOla Lilja static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
1253592b7f6SOla Lilja 			struct msp_protdesc *prot_desc)
1263592b7f6SOla Lilja {
1273592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
1283592b7f6SOla Lilja 
1293592b7f6SOla Lilja 	u32 frame_length = MSP_FRAME_LEN_1;
130fe3a980cSCodrut Grosu 
1313592b7f6SOla Lilja 	prot_desc->frame_width = 0;
1323592b7f6SOla Lilja 
1333592b7f6SOla Lilja 	switch (drvdata->slots) {
1343592b7f6SOla Lilja 	case 1:
1353592b7f6SOla Lilja 		frame_length = MSP_FRAME_LEN_1;
1363592b7f6SOla Lilja 		break;
1373592b7f6SOla Lilja 
1383592b7f6SOla Lilja 	case 2:
1393592b7f6SOla Lilja 		frame_length = MSP_FRAME_LEN_2;
1403592b7f6SOla Lilja 		break;
1413592b7f6SOla Lilja 
1423592b7f6SOla Lilja 	case 8:
1433592b7f6SOla Lilja 		frame_length = MSP_FRAME_LEN_8;
1443592b7f6SOla Lilja 		break;
1453592b7f6SOla Lilja 
1463592b7f6SOla Lilja 	case 16:
1473592b7f6SOla Lilja 		frame_length = MSP_FRAME_LEN_16;
1483592b7f6SOla Lilja 		break;
1493592b7f6SOla Lilja 	default:
1503592b7f6SOla Lilja 		dev_err(dai->dev,
1513592b7f6SOla Lilja 			"%s: Error: Unsupported slot-count (slots = %d)!\n",
1523592b7f6SOla Lilja 			__func__, drvdata->slots);
1533592b7f6SOla Lilja 		return -EINVAL;
1543592b7f6SOla Lilja 	}
1553592b7f6SOla Lilja 
1563592b7f6SOla Lilja 	prot_desc->tx_frame_len_1 = frame_length;
1573592b7f6SOla Lilja 	prot_desc->rx_frame_len_1 = frame_length;
1583592b7f6SOla Lilja 	prot_desc->tx_frame_len_2 = frame_length;
1593592b7f6SOla Lilja 	prot_desc->rx_frame_len_2 = frame_length;
1603592b7f6SOla Lilja 
1613592b7f6SOla Lilja 	prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
1623592b7f6SOla Lilja 	prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
1633592b7f6SOla Lilja 	prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
1643592b7f6SOla Lilja 	prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
1653592b7f6SOla Lilja 
1663592b7f6SOla Lilja 	return setup_frameper(dai, rate, prot_desc);
1673592b7f6SOla Lilja }
1683592b7f6SOla Lilja 
setup_clocking(struct snd_soc_dai * dai,unsigned int fmt,struct ux500_msp_config * msp_config)1693592b7f6SOla Lilja static int setup_clocking(struct snd_soc_dai *dai,
1703592b7f6SOla Lilja 			unsigned int fmt,
1713592b7f6SOla Lilja 			struct ux500_msp_config *msp_config)
1723592b7f6SOla Lilja {
1733592b7f6SOla Lilja 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1743592b7f6SOla Lilja 	case SND_SOC_DAIFMT_NB_NF:
1753592b7f6SOla Lilja 		break;
1763592b7f6SOla Lilja 
1773592b7f6SOla Lilja 	case SND_SOC_DAIFMT_NB_IF:
1783592b7f6SOla Lilja 		msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
1793592b7f6SOla Lilja 		msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
1803592b7f6SOla Lilja 
1813592b7f6SOla Lilja 		break;
1823592b7f6SOla Lilja 
1833592b7f6SOla Lilja 	default:
1843592b7f6SOla Lilja 		dev_err(dai->dev,
185c3d7abcaSColin Ian King 			"%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
1863592b7f6SOla Lilja 			__func__, fmt);
1873592b7f6SOla Lilja 
1883592b7f6SOla Lilja 		return -EINVAL;
1893592b7f6SOla Lilja 	}
1903592b7f6SOla Lilja 
191ce3467c7SCharles Keepax 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
192ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_BC_FC:
1933592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
1943592b7f6SOla Lilja 
1953592b7f6SOla Lilja 		msp_config->iodelay = 0x20;
1963592b7f6SOla Lilja 		msp_config->rx_fsync_sel = 0;
1973592b7f6SOla Lilja 		msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
1983592b7f6SOla Lilja 		msp_config->tx_clk_sel = 0;
1993592b7f6SOla Lilja 		msp_config->rx_clk_sel = 0;
2003592b7f6SOla Lilja 		msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
2013592b7f6SOla Lilja 
2023592b7f6SOla Lilja 		break;
2033592b7f6SOla Lilja 
204ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_BP_FP:
2053592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
2063592b7f6SOla Lilja 
2073592b7f6SOla Lilja 		msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
2083592b7f6SOla Lilja 		msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
2093592b7f6SOla Lilja 		msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
2103592b7f6SOla Lilja 		msp_config->rx_fsync_sel = RX_SYNC_SRG;
2113592b7f6SOla Lilja 		msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
2123592b7f6SOla Lilja 
2133592b7f6SOla Lilja 		break;
2143592b7f6SOla Lilja 
2153592b7f6SOla Lilja 	default:
216c3d7abcaSColin Ian King 		dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
2173592b7f6SOla Lilja 			__func__, fmt);
2183592b7f6SOla Lilja 
2193592b7f6SOla Lilja 		return -EINVAL;
2203592b7f6SOla Lilja 	}
2213592b7f6SOla Lilja 
2223592b7f6SOla Lilja 	return 0;
2233592b7f6SOla Lilja }
2243592b7f6SOla Lilja 
setup_pcm_protdesc(struct snd_soc_dai * dai,unsigned int fmt,struct msp_protdesc * prot_desc)2253592b7f6SOla Lilja static int setup_pcm_protdesc(struct snd_soc_dai *dai,
2263592b7f6SOla Lilja 				unsigned int fmt,
2273592b7f6SOla Lilja 				struct msp_protdesc *prot_desc)
2283592b7f6SOla Lilja {
2293592b7f6SOla Lilja 	prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
2303592b7f6SOla Lilja 	prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
2313592b7f6SOla Lilja 	prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
2323592b7f6SOla Lilja 	prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
2333592b7f6SOla Lilja 	prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
2343592b7f6SOla Lilja 	prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
2353592b7f6SOla Lilja 	prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
2363592b7f6SOla Lilja 	prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
2373592b7f6SOla Lilja 
2383592b7f6SOla Lilja 	if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
2393592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
2403592b7f6SOla Lilja 		prot_desc->rx_clk_pol = MSP_RISING_EDGE;
2413592b7f6SOla Lilja 		prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
2423592b7f6SOla Lilja 
2433592b7f6SOla Lilja 		prot_desc->rx_data_delay = MSP_DELAY_1;
2443592b7f6SOla Lilja 		prot_desc->tx_data_delay = MSP_DELAY_1;
2453592b7f6SOla Lilja 	} else {
2463592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
2473592b7f6SOla Lilja 		prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
2483592b7f6SOla Lilja 		prot_desc->tx_clk_pol = MSP_RISING_EDGE;
2493592b7f6SOla Lilja 
2503592b7f6SOla Lilja 		prot_desc->rx_data_delay = MSP_DELAY_0;
2513592b7f6SOla Lilja 		prot_desc->tx_data_delay = MSP_DELAY_0;
2523592b7f6SOla Lilja 	}
2533592b7f6SOla Lilja 
2543592b7f6SOla Lilja 	prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
2553592b7f6SOla Lilja 	prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
2563592b7f6SOla Lilja 	prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
2573592b7f6SOla Lilja 	prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
2583592b7f6SOla Lilja 	prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
2593592b7f6SOla Lilja 
2603592b7f6SOla Lilja 	return 0;
2613592b7f6SOla Lilja }
2623592b7f6SOla Lilja 
setup_i2s_protdesc(struct msp_protdesc * prot_desc)2633592b7f6SOla Lilja static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
2643592b7f6SOla Lilja {
2653592b7f6SOla Lilja 	prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
2663592b7f6SOla Lilja 	prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
2673592b7f6SOla Lilja 	prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
2683592b7f6SOla Lilja 	prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
2693592b7f6SOla Lilja 	prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
2703592b7f6SOla Lilja 	prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
2713592b7f6SOla Lilja 	prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
2723592b7f6SOla Lilja 	prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
2733592b7f6SOla Lilja 
2743592b7f6SOla Lilja 	prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
2753592b7f6SOla Lilja 	prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
2763592b7f6SOla Lilja 	prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
2773592b7f6SOla Lilja 	prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
2783592b7f6SOla Lilja 	prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
2793592b7f6SOla Lilja 	prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
2803592b7f6SOla Lilja 	prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
2813592b7f6SOla Lilja 	prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
2823592b7f6SOla Lilja 
2833592b7f6SOla Lilja 	prot_desc->rx_clk_pol = MSP_RISING_EDGE;
2843592b7f6SOla Lilja 	prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
2853592b7f6SOla Lilja 
2863592b7f6SOla Lilja 	prot_desc->rx_data_delay = MSP_DELAY_0;
2873592b7f6SOla Lilja 	prot_desc->tx_data_delay = MSP_DELAY_0;
2883592b7f6SOla Lilja 
2893592b7f6SOla Lilja 	prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
2903592b7f6SOla Lilja 	prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
2913592b7f6SOla Lilja 	prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
2923592b7f6SOla Lilja 	prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
2933592b7f6SOla Lilja 	prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
2943592b7f6SOla Lilja 
2953592b7f6SOla Lilja 	return 0;
2963592b7f6SOla Lilja }
2973592b7f6SOla Lilja 
setup_msp_config(struct snd_pcm_substream * substream,struct snd_soc_dai * dai,struct ux500_msp_config * msp_config)2983592b7f6SOla Lilja static int setup_msp_config(struct snd_pcm_substream *substream,
2993592b7f6SOla Lilja 			struct snd_soc_dai *dai,
3003592b7f6SOla Lilja 			struct ux500_msp_config *msp_config)
3013592b7f6SOla Lilja {
3023592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
3033592b7f6SOla Lilja 	struct msp_protdesc *prot_desc = &msp_config->protdesc;
3043592b7f6SOla Lilja 	struct snd_pcm_runtime *runtime = substream->runtime;
3053592b7f6SOla Lilja 	unsigned int fmt = drvdata->fmt;
3063592b7f6SOla Lilja 	int ret;
3073592b7f6SOla Lilja 
3083592b7f6SOla Lilja 	memset(msp_config, 0, sizeof(*msp_config));
3093592b7f6SOla Lilja 
3103592b7f6SOla Lilja 	msp_config->f_inputclk = drvdata->master_clk;
3113592b7f6SOla Lilja 
3123592b7f6SOla Lilja 	msp_config->tx_fifo_config = TX_FIFO_ENABLE;
3133592b7f6SOla Lilja 	msp_config->rx_fifo_config = RX_FIFO_ENABLE;
3143592b7f6SOla Lilja 	msp_config->def_elem_len = 1;
3153592b7f6SOla Lilja 	msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
3163592b7f6SOla Lilja 				MSP_DIR_TX : MSP_DIR_RX;
3173592b7f6SOla Lilja 	msp_config->data_size = MSP_DATA_BITS_32;
3183592b7f6SOla Lilja 	msp_config->frame_freq = runtime->rate;
3193592b7f6SOla Lilja 
3203592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
3213592b7f6SOla Lilja 	       __func__, msp_config->f_inputclk, msp_config->frame_freq);
3223592b7f6SOla Lilja 	/* To avoid division by zero */
3233592b7f6SOla Lilja 	prot_desc->clocks_per_frame = 1;
3243592b7f6SOla Lilja 
3253592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
3263592b7f6SOla Lilja 		runtime->rate, runtime->channels);
3273592b7f6SOla Lilja 	switch (fmt &
328ce3467c7SCharles Keepax 		(SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
329ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
3303592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
3313592b7f6SOla Lilja 
3323592b7f6SOla Lilja 		msp_config->default_protdesc = 1;
3333592b7f6SOla Lilja 		msp_config->protocol = MSP_I2S_PROTOCOL;
3343592b7f6SOla Lilja 		break;
3353592b7f6SOla Lilja 
336ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
3373592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
3383592b7f6SOla Lilja 
3393592b7f6SOla Lilja 		msp_config->data_size = MSP_DATA_BITS_16;
3403592b7f6SOla Lilja 		msp_config->protocol = MSP_I2S_PROTOCOL;
3413592b7f6SOla Lilja 
3423592b7f6SOla Lilja 		ret = setup_i2s_protdesc(prot_desc);
3433592b7f6SOla Lilja 		if (ret < 0)
3443592b7f6SOla Lilja 			return ret;
3453592b7f6SOla Lilja 
3463592b7f6SOla Lilja 		break;
3473592b7f6SOla Lilja 
348ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
349ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
350ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
351ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
3523592b7f6SOla Lilja 		dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
3533592b7f6SOla Lilja 
3543592b7f6SOla Lilja 		msp_config->data_size = MSP_DATA_BITS_16;
3553592b7f6SOla Lilja 		msp_config->protocol = MSP_PCM_PROTOCOL;
3563592b7f6SOla Lilja 
3573592b7f6SOla Lilja 		ret = setup_pcm_protdesc(dai, fmt, prot_desc);
3583592b7f6SOla Lilja 		if (ret < 0)
3593592b7f6SOla Lilja 			return ret;
3603592b7f6SOla Lilja 
3613592b7f6SOla Lilja 		ret = setup_pcm_multichan(dai, msp_config);
3623592b7f6SOla Lilja 		if (ret < 0)
3633592b7f6SOla Lilja 			return ret;
3643592b7f6SOla Lilja 
3653592b7f6SOla Lilja 		ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
3663592b7f6SOla Lilja 		if (ret < 0)
3673592b7f6SOla Lilja 			return ret;
3683592b7f6SOla Lilja 
3693592b7f6SOla Lilja 		break;
3703592b7f6SOla Lilja 
3713592b7f6SOla Lilja 	default:
372c3d7abcaSColin Ian King 		dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
3733592b7f6SOla Lilja 			__func__, fmt);
3743592b7f6SOla Lilja 		return -EINVAL;
3753592b7f6SOla Lilja 	}
3763592b7f6SOla Lilja 
3773592b7f6SOla Lilja 	return setup_clocking(dai, fmt, msp_config);
3783592b7f6SOla Lilja }
3793592b7f6SOla Lilja 
ux500_msp_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)3803592b7f6SOla Lilja static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
3813592b7f6SOla Lilja 				struct snd_soc_dai *dai)
3823592b7f6SOla Lilja {
3833592b7f6SOla Lilja 	int ret = 0;
3843592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
3853592b7f6SOla Lilja 
3863592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
3873592b7f6SOla Lilja 		snd_pcm_stream_str(substream));
3883592b7f6SOla Lilja 
3893592b7f6SOla Lilja 	/* Enable regulator */
3903592b7f6SOla Lilja 	ret = regulator_enable(drvdata->reg_vape);
3913592b7f6SOla Lilja 	if (ret != 0) {
3923592b7f6SOla Lilja 		dev_err(drvdata->msp->dev,
3933592b7f6SOla Lilja 			"%s: Failed to enable regulator!\n", __func__);
3943592b7f6SOla Lilja 		return ret;
3953592b7f6SOla Lilja 	}
3963592b7f6SOla Lilja 
397f61ab093SUlf Hansson 	/* Prepare and enable clocks */
398f61ab093SUlf Hansson 	dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
399f61ab093SUlf Hansson 	ret = clk_prepare_enable(drvdata->pclk);
400f61ab093SUlf Hansson 	if (ret) {
401f61ab093SUlf Hansson 		dev_err(drvdata->msp->dev,
402f61ab093SUlf Hansson 			"%s: Failed to prepare/enable pclk!\n", __func__);
403f61ab093SUlf Hansson 		goto err_pclk;
404f61ab093SUlf Hansson 	}
4053592b7f6SOla Lilja 
406f61ab093SUlf Hansson 	ret = clk_prepare_enable(drvdata->clk);
407f61ab093SUlf Hansson 	if (ret) {
408f61ab093SUlf Hansson 		dev_err(drvdata->msp->dev,
409f61ab093SUlf Hansson 			"%s: Failed to prepare/enable clk!\n", __func__);
410f61ab093SUlf Hansson 		goto err_clk;
411f61ab093SUlf Hansson 	}
412f61ab093SUlf Hansson 
413f61ab093SUlf Hansson 	return ret;
414f61ab093SUlf Hansson err_clk:
415f61ab093SUlf Hansson 	clk_disable_unprepare(drvdata->pclk);
416f61ab093SUlf Hansson err_pclk:
417f61ab093SUlf Hansson 	regulator_disable(drvdata->reg_vape);
418fe36a0b2SUlf Hansson 	return ret;
4193592b7f6SOla Lilja }
4203592b7f6SOla Lilja 
ux500_msp_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)4213592b7f6SOla Lilja static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
4223592b7f6SOla Lilja 				struct snd_soc_dai *dai)
4233592b7f6SOla Lilja {
4243592b7f6SOla Lilja 	int ret;
4253592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
4263592b7f6SOla Lilja 	bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
4273592b7f6SOla Lilja 
4283592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
4293592b7f6SOla Lilja 		snd_pcm_stream_str(substream));
4303592b7f6SOla Lilja 
4313592b7f6SOla Lilja 	if (drvdata->vape_opp_constraint == 1) {
4323592b7f6SOla Lilja 		prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
4333592b7f6SOla Lilja 					"ux500_msp_i2s", 50);
4343592b7f6SOla Lilja 		drvdata->vape_opp_constraint = 0;
4353592b7f6SOla Lilja 	}
4363592b7f6SOla Lilja 
4373592b7f6SOla Lilja 	if (ux500_msp_i2s_close(drvdata->msp,
4383592b7f6SOla Lilja 				is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
4393592b7f6SOla Lilja 		dev_err(dai->dev,
4403592b7f6SOla Lilja 			"%s: Error: MSP %d (%s): Unable to close i2s.\n",
4413592b7f6SOla Lilja 			__func__, dai->id, snd_pcm_stream_str(substream));
4423592b7f6SOla Lilja 	}
4433592b7f6SOla Lilja 
444f61ab093SUlf Hansson 	/* Disable and unprepare clocks */
445fe36a0b2SUlf Hansson 	clk_disable_unprepare(drvdata->clk);
446f61ab093SUlf Hansson 	clk_disable_unprepare(drvdata->pclk);
4473592b7f6SOla Lilja 
4483592b7f6SOla Lilja 	/* Disable regulator */
4493592b7f6SOla Lilja 	ret = regulator_disable(drvdata->reg_vape);
4503592b7f6SOla Lilja 	if (ret < 0)
4513592b7f6SOla Lilja 		dev_err(dai->dev,
4523592b7f6SOla Lilja 			"%s: ERROR: Failed to disable regulator (%d)!\n",
4533592b7f6SOla Lilja 			__func__, ret);
4543592b7f6SOla Lilja }
4553592b7f6SOla Lilja 
ux500_msp_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)4563592b7f6SOla Lilja static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
4573592b7f6SOla Lilja 				struct snd_soc_dai *dai)
4583592b7f6SOla Lilja {
4593592b7f6SOla Lilja 	int ret = 0;
4603592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
4613592b7f6SOla Lilja 	struct snd_pcm_runtime *runtime = substream->runtime;
4623592b7f6SOla Lilja 	struct ux500_msp_config msp_config;
4633592b7f6SOla Lilja 
4643592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
4653592b7f6SOla Lilja 		dai->id, snd_pcm_stream_str(substream), runtime->rate);
4663592b7f6SOla Lilja 
4673592b7f6SOla Lilja 	setup_msp_config(substream, dai, &msp_config);
4683592b7f6SOla Lilja 
4693592b7f6SOla Lilja 	ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
4703592b7f6SOla Lilja 	if (ret < 0) {
4713592b7f6SOla Lilja 		dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
4723592b7f6SOla Lilja 			__func__, ret);
4733592b7f6SOla Lilja 		return ret;
4743592b7f6SOla Lilja 	}
4753592b7f6SOla Lilja 
4763592b7f6SOla Lilja 	/* Set OPP-level */
477ce3467c7SCharles Keepax 	if ((drvdata->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) &&
4783592b7f6SOla Lilja 		(drvdata->msp->f_bitclk > 19200000)) {
4793592b7f6SOla Lilja 		/* If the bit-clock is higher than 19.2MHz, Vape should be
4808fcf1e5eSCodrut Grosu 		 * run in 100% OPP. Only when bit-clock is used (MSP master)
4818fcf1e5eSCodrut Grosu 		 */
4823592b7f6SOla Lilja 		prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
4833592b7f6SOla Lilja 					"ux500-msp-i2s", 100);
4843592b7f6SOla Lilja 		drvdata->vape_opp_constraint = 1;
4853592b7f6SOla Lilja 	} else {
4863592b7f6SOla Lilja 		prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
4873592b7f6SOla Lilja 					"ux500-msp-i2s", 50);
4883592b7f6SOla Lilja 		drvdata->vape_opp_constraint = 0;
4893592b7f6SOla Lilja 	}
4903592b7f6SOla Lilja 
4913592b7f6SOla Lilja 	return ret;
4923592b7f6SOla Lilja }
4933592b7f6SOla Lilja 
ux500_msp_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)4943592b7f6SOla Lilja static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
4953592b7f6SOla Lilja 				struct snd_pcm_hw_params *params,
4963592b7f6SOla Lilja 				struct snd_soc_dai *dai)
4973592b7f6SOla Lilja {
4983592b7f6SOla Lilja 	unsigned int mask, slots_active;
4993592b7f6SOla Lilja 	struct snd_pcm_runtime *runtime = substream->runtime;
5003592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
5013592b7f6SOla Lilja 
5023592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
5033592b7f6SOla Lilja 			__func__, dai->id, snd_pcm_stream_str(substream));
5043592b7f6SOla Lilja 
5053592b7f6SOla Lilja 	switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
5063592b7f6SOla Lilja 	case SND_SOC_DAIFMT_I2S:
5073592b7f6SOla Lilja 		snd_pcm_hw_constraint_minmax(runtime,
5083592b7f6SOla Lilja 				SNDRV_PCM_HW_PARAM_CHANNELS,
5093592b7f6SOla Lilja 				1, 2);
5103592b7f6SOla Lilja 		break;
5113592b7f6SOla Lilja 
5123592b7f6SOla Lilja 	case SND_SOC_DAIFMT_DSP_B:
5133592b7f6SOla Lilja 	case SND_SOC_DAIFMT_DSP_A:
5143592b7f6SOla Lilja 		mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
5153592b7f6SOla Lilja 			drvdata->tx_mask :
5163592b7f6SOla Lilja 			drvdata->rx_mask;
5173592b7f6SOla Lilja 
5183592b7f6SOla Lilja 		slots_active = hweight32(mask);
5193592b7f6SOla Lilja 		dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
5203592b7f6SOla Lilja 
5211bf2d35bSLars-Peter Clausen 		snd_pcm_hw_constraint_single(runtime,
5223592b7f6SOla Lilja 				SNDRV_PCM_HW_PARAM_CHANNELS,
5231bf2d35bSLars-Peter Clausen 				slots_active);
5243592b7f6SOla Lilja 		break;
5253592b7f6SOla Lilja 
5263592b7f6SOla Lilja 	default:
5273592b7f6SOla Lilja 		dev_err(dai->dev,
5283592b7f6SOla Lilja 			"%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
5293592b7f6SOla Lilja 			__func__, drvdata->fmt);
5303592b7f6SOla Lilja 		return -EINVAL;
5313592b7f6SOla Lilja 	}
5323592b7f6SOla Lilja 
5333592b7f6SOla Lilja 	return 0;
5343592b7f6SOla Lilja }
5353592b7f6SOla Lilja 
ux500_msp_dai_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)5363592b7f6SOla Lilja static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
5373592b7f6SOla Lilja 				unsigned int fmt)
5383592b7f6SOla Lilja {
5393592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
5403592b7f6SOla Lilja 
5413592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
5423592b7f6SOla Lilja 
5433592b7f6SOla Lilja 	switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
544ce3467c7SCharles Keepax 		SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
545ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
546ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
547ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
548ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
549ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
550ce3467c7SCharles Keepax 	case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
5513592b7f6SOla Lilja 		break;
5523592b7f6SOla Lilja 
5533592b7f6SOla Lilja 	default:
5543592b7f6SOla Lilja 		dev_err(dai->dev,
5553592b7f6SOla Lilja 			"%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
5563592b7f6SOla Lilja 			__func__, drvdata->fmt);
5573592b7f6SOla Lilja 		return -EINVAL;
5583592b7f6SOla Lilja 	}
5593592b7f6SOla Lilja 
5603592b7f6SOla Lilja 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
5613592b7f6SOla Lilja 	case SND_SOC_DAIFMT_NB_NF:
5623592b7f6SOla Lilja 	case SND_SOC_DAIFMT_NB_IF:
5633592b7f6SOla Lilja 	case SND_SOC_DAIFMT_IB_IF:
5643592b7f6SOla Lilja 		break;
5653592b7f6SOla Lilja 
5663592b7f6SOla Lilja 	default:
5673592b7f6SOla Lilja 		dev_err(dai->dev,
5683592b7f6SOla Lilja 			"%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
5693592b7f6SOla Lilja 			__func__, drvdata->fmt);
5703592b7f6SOla Lilja 		return -EINVAL;
5713592b7f6SOla Lilja 	}
5723592b7f6SOla Lilja 
5733592b7f6SOla Lilja 	drvdata->fmt = fmt;
5743592b7f6SOla Lilja 	return 0;
5753592b7f6SOla Lilja }
5763592b7f6SOla Lilja 
ux500_msp_dai_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)5773592b7f6SOla Lilja static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
5783592b7f6SOla Lilja 				unsigned int tx_mask,
5793592b7f6SOla Lilja 				unsigned int rx_mask,
5803592b7f6SOla Lilja 				int slots, int slot_width)
5813592b7f6SOla Lilja {
5823592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
5833592b7f6SOla Lilja 	unsigned int cap;
5843592b7f6SOla Lilja 
5853592b7f6SOla Lilja 	switch (slots) {
5863592b7f6SOla Lilja 	case 1:
5873592b7f6SOla Lilja 		cap = 0x01;
5883592b7f6SOla Lilja 		break;
5893592b7f6SOla Lilja 	case 2:
5903592b7f6SOla Lilja 		cap = 0x03;
5913592b7f6SOla Lilja 		break;
5923592b7f6SOla Lilja 	case 8:
5933592b7f6SOla Lilja 		cap = 0xFF;
5943592b7f6SOla Lilja 		break;
5953592b7f6SOla Lilja 	case 16:
5963592b7f6SOla Lilja 		cap = 0xFFFF;
5973592b7f6SOla Lilja 		break;
5983592b7f6SOla Lilja 	default:
5993592b7f6SOla Lilja 		dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
6003592b7f6SOla Lilja 			__func__, slots);
6013592b7f6SOla Lilja 		return -EINVAL;
6023592b7f6SOla Lilja 	}
6033592b7f6SOla Lilja 	drvdata->slots = slots;
6043592b7f6SOla Lilja 
6053592b7f6SOla Lilja 	if (!(slot_width == 16)) {
6063592b7f6SOla Lilja 		dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
6073592b7f6SOla Lilja 			__func__, slot_width);
6083592b7f6SOla Lilja 		return -EINVAL;
6093592b7f6SOla Lilja 	}
6103592b7f6SOla Lilja 	drvdata->slot_width = slot_width;
6113592b7f6SOla Lilja 
6123592b7f6SOla Lilja 	drvdata->tx_mask = tx_mask & cap;
6133592b7f6SOla Lilja 	drvdata->rx_mask = rx_mask & cap;
6143592b7f6SOla Lilja 
6153592b7f6SOla Lilja 	return 0;
6163592b7f6SOla Lilja }
6173592b7f6SOla Lilja 
ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)6183592b7f6SOla Lilja static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
6193592b7f6SOla Lilja 					int clk_id, unsigned int freq, int dir)
6203592b7f6SOla Lilja {
6213592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
6223592b7f6SOla Lilja 
6233592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
6243592b7f6SOla Lilja 		__func__, dai->id, clk_id, freq);
6253592b7f6SOla Lilja 
6263592b7f6SOla Lilja 	switch (clk_id) {
6273592b7f6SOla Lilja 	case UX500_MSP_MASTER_CLOCK:
6283592b7f6SOla Lilja 		drvdata->master_clk = freq;
6293592b7f6SOla Lilja 		break;
6303592b7f6SOla Lilja 
6313592b7f6SOla Lilja 	default:
6323592b7f6SOla Lilja 		dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
6333592b7f6SOla Lilja 			__func__, dai->id, clk_id);
6343592b7f6SOla Lilja 		return -EINVAL;
6353592b7f6SOla Lilja 	}
6363592b7f6SOla Lilja 
6373592b7f6SOla Lilja 	return 0;
6383592b7f6SOla Lilja }
6393592b7f6SOla Lilja 
ux500_msp_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)6403592b7f6SOla Lilja static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
6413592b7f6SOla Lilja 				int cmd, struct snd_soc_dai *dai)
6423592b7f6SOla Lilja {
6433592b7f6SOla Lilja 	int ret = 0;
6443592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
6453592b7f6SOla Lilja 
6463592b7f6SOla Lilja 	dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
6473592b7f6SOla Lilja 		__func__, dai->id, snd_pcm_stream_str(substream),
6483592b7f6SOla Lilja 		(int)drvdata->msp->id, cmd);
6493592b7f6SOla Lilja 
6503592b7f6SOla Lilja 	ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
6513592b7f6SOla Lilja 
6523592b7f6SOla Lilja 	return ret;
6533592b7f6SOla Lilja }
6543592b7f6SOla Lilja 
ux500_msp_dai_of_probe(struct snd_soc_dai * dai)655f382acbeSLee Jones static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
656f382acbeSLee Jones {
657f382acbeSLee Jones 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
658f382acbeSLee Jones 	struct snd_dmaengine_dai_dma_data *playback_dma_data;
659f382acbeSLee Jones 	struct snd_dmaengine_dai_dma_data *capture_dma_data;
660f382acbeSLee Jones 
661f382acbeSLee Jones 	playback_dma_data = devm_kzalloc(dai->dev,
662f382acbeSLee Jones 					 sizeof(*playback_dma_data),
663f382acbeSLee Jones 					 GFP_KERNEL);
664f382acbeSLee Jones 	if (!playback_dma_data)
665f382acbeSLee Jones 		return -ENOMEM;
666f382acbeSLee Jones 
667f382acbeSLee Jones 	capture_dma_data = devm_kzalloc(dai->dev,
668f382acbeSLee Jones 					sizeof(*capture_dma_data),
669f382acbeSLee Jones 					GFP_KERNEL);
670f382acbeSLee Jones 	if (!capture_dma_data)
671f382acbeSLee Jones 		return -ENOMEM;
672f382acbeSLee Jones 
673aafe9375SArnd Bergmann 	playback_dma_data->addr = drvdata->msp->tx_rx_addr;
674aafe9375SArnd Bergmann 	capture_dma_data->addr = drvdata->msp->tx_rx_addr;
675f382acbeSLee Jones 
676f382acbeSLee Jones 	playback_dma_data->maxburst = 4;
677f382acbeSLee Jones 	capture_dma_data->maxburst = 4;
678f382acbeSLee Jones 
679f382acbeSLee Jones 	snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
680f382acbeSLee Jones 
681f382acbeSLee Jones 	return 0;
682f382acbeSLee Jones }
683f382acbeSLee Jones 
684ab566fd5SArvind Yadav static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
6853592b7f6SOla Lilja 	{
686*ce11656cSKuninori Morimoto 		.probe = ux500_msp_dai_of_probe,
6873592b7f6SOla Lilja 		.set_sysclk = ux500_msp_dai_set_dai_sysclk,
6883592b7f6SOla Lilja 		.set_fmt = ux500_msp_dai_set_dai_fmt,
6893592b7f6SOla Lilja 		.set_tdm_slot = ux500_msp_dai_set_tdm_slot,
6903592b7f6SOla Lilja 		.startup = ux500_msp_dai_startup,
6913592b7f6SOla Lilja 		.shutdown = ux500_msp_dai_shutdown,
6923592b7f6SOla Lilja 		.prepare = ux500_msp_dai_prepare,
6933592b7f6SOla Lilja 		.trigger = ux500_msp_dai_trigger,
6943592b7f6SOla Lilja 		.hw_params = ux500_msp_dai_hw_params,
6953592b7f6SOla Lilja 	}
6963592b7f6SOla Lilja };
6973592b7f6SOla Lilja 
69833899b19SLee Jones static struct snd_soc_dai_driver ux500_msp_dai_drv = {
69933899b19SLee Jones 	.playback.channels_min = UX500_MSP_MIN_CHANNELS,
70033899b19SLee Jones 	.playback.channels_max = UX500_MSP_MAX_CHANNELS,
70133899b19SLee Jones 	.playback.rates        = UX500_I2S_RATES,
70233899b19SLee Jones 	.playback.formats      = UX500_I2S_FORMATS,
70333899b19SLee Jones 	.capture.channels_min  = UX500_MSP_MIN_CHANNELS,
70433899b19SLee Jones 	.capture.channels_max  = UX500_MSP_MAX_CHANNELS,
70533899b19SLee Jones 	.capture.rates         = UX500_I2S_RATES,
70633899b19SLee Jones 	.capture.formats       = UX500_I2S_FORMATS,
7073592b7f6SOla Lilja 	.ops                   = ux500_msp_dai_ops,
7083592b7f6SOla Lilja };
7093592b7f6SOla Lilja 
71042277bddSKuninori Morimoto static const struct snd_soc_component_driver ux500_msp_component = {
71142277bddSKuninori Morimoto 	.name			= "ux500-msp",
712768be0d6SCharles Keepax 	.legacy_dai_naming	= 1,
71342277bddSKuninori Morimoto };
71442277bddSKuninori Morimoto 
71542277bddSKuninori Morimoto 
ux500_msp_drv_probe(struct platform_device * pdev)716da794876SBill Pemberton static int ux500_msp_drv_probe(struct platform_device *pdev)
7173592b7f6SOla Lilja {
7183592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata;
7193592b7f6SOla Lilja 	int ret = 0;
7203592b7f6SOla Lilja 
7213592b7f6SOla Lilja 	drvdata = devm_kzalloc(&pdev->dev,
7223592b7f6SOla Lilja 				sizeof(struct ux500_msp_i2s_drvdata),
7233592b7f6SOla Lilja 				GFP_KERNEL);
7240dcd4742SLee Jones 	if (!drvdata)
7250dcd4742SLee Jones 		return -ENOMEM;
7260dcd4742SLee Jones 
7273592b7f6SOla Lilja 	drvdata->fmt = 0;
7283592b7f6SOla Lilja 	drvdata->slots = 1;
7293592b7f6SOla Lilja 	drvdata->tx_mask = 0x01;
7303592b7f6SOla Lilja 	drvdata->rx_mask = 0x01;
7313592b7f6SOla Lilja 	drvdata->slot_width = 16;
7323592b7f6SOla Lilja 	drvdata->master_clk = MSP_INPUT_FREQ_APB;
7333592b7f6SOla Lilja 
7343592b7f6SOla Lilja 	drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
7353592b7f6SOla Lilja 	if (IS_ERR(drvdata->reg_vape)) {
7363592b7f6SOla Lilja 		ret = (int)PTR_ERR(drvdata->reg_vape);
7373592b7f6SOla Lilja 		dev_err(&pdev->dev,
7383592b7f6SOla Lilja 			"%s: ERROR: Failed to get Vape supply (%d)!\n",
7393592b7f6SOla Lilja 			__func__, ret);
7403592b7f6SOla Lilja 		return ret;
7413592b7f6SOla Lilja 	}
7423592b7f6SOla Lilja 	prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
7433592b7f6SOla Lilja 
7444313489cSJulia Lawall 	drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
745f61ab093SUlf Hansson 	if (IS_ERR(drvdata->pclk)) {
746f61ab093SUlf Hansson 		ret = (int)PTR_ERR(drvdata->pclk);
7474313489cSJulia Lawall 		dev_err(&pdev->dev,
7484313489cSJulia Lawall 			"%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
749f61ab093SUlf Hansson 			__func__, ret);
7504313489cSJulia Lawall 		return ret;
751f61ab093SUlf Hansson 	}
752f61ab093SUlf Hansson 
7534313489cSJulia Lawall 	drvdata->clk = devm_clk_get(&pdev->dev, NULL);
7543592b7f6SOla Lilja 	if (IS_ERR(drvdata->clk)) {
7553592b7f6SOla Lilja 		ret = (int)PTR_ERR(drvdata->clk);
7564313489cSJulia Lawall 		dev_err(&pdev->dev,
7574313489cSJulia Lawall 			"%s: ERROR: devm_clk_get failed (%d)!\n",
7583592b7f6SOla Lilja 			__func__, ret);
7594313489cSJulia Lawall 		return ret;
7603592b7f6SOla Lilja 	}
7613592b7f6SOla Lilja 
7621766ac52SArnd Bergmann 	ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp);
7633592b7f6SOla Lilja 	if (!drvdata->msp) {
7643592b7f6SOla Lilja 		dev_err(&pdev->dev,
7653592b7f6SOla Lilja 			"%s: ERROR: Failed to init MSP-struct (%d)!",
7663592b7f6SOla Lilja 			__func__, ret);
7674313489cSJulia Lawall 		return ret;
7683592b7f6SOla Lilja 	}
7693592b7f6SOla Lilja 	dev_set_drvdata(&pdev->dev, drvdata);
7703592b7f6SOla Lilja 
77142277bddSKuninori Morimoto 	ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
77233899b19SLee Jones 					 &ux500_msp_dai_drv, 1);
7733592b7f6SOla Lilja 	if (ret < 0) {
7743592b7f6SOla Lilja 		dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
7753592b7f6SOla Lilja 			__func__, drvdata->msp->id);
7764313489cSJulia Lawall 		return ret;
7773592b7f6SOla Lilja 	}
7783592b7f6SOla Lilja 
7791428c20fSLee Jones 	ret = ux500_pcm_register_platform(pdev);
7801428c20fSLee Jones 	if (ret < 0) {
7811428c20fSLee Jones 		dev_err(&pdev->dev,
7821428c20fSLee Jones 			"Error: %s: Failed to register PCM platform device!\n",
7831428c20fSLee Jones 			__func__);
7841428c20fSLee Jones 		goto err_reg_plat;
7851428c20fSLee Jones 	}
7861428c20fSLee Jones 
7873592b7f6SOla Lilja 	return 0;
7883592b7f6SOla Lilja 
7891428c20fSLee Jones err_reg_plat:
79042277bddSKuninori Morimoto 	snd_soc_unregister_component(&pdev->dev);
7913592b7f6SOla Lilja 	return ret;
7923592b7f6SOla Lilja }
7933592b7f6SOla Lilja 
ux500_msp_drv_remove(struct platform_device * pdev)794316a6bbfSUwe Kleine-König static void ux500_msp_drv_remove(struct platform_device *pdev)
7953592b7f6SOla Lilja {
7963592b7f6SOla Lilja 	struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
7973592b7f6SOla Lilja 
7981428c20fSLee Jones 	ux500_pcm_unregister_platform(pdev);
7991428c20fSLee Jones 
80042277bddSKuninori Morimoto 	snd_soc_unregister_component(&pdev->dev);
8013592b7f6SOla Lilja 
8023592b7f6SOla Lilja 	prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
8033592b7f6SOla Lilja 
8043592b7f6SOla Lilja 	ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
8053592b7f6SOla Lilja }
8063592b7f6SOla Lilja 
80749731c23SLee Jones static const struct of_device_id ux500_msp_i2s_match[] = {
80849731c23SLee Jones 	{ .compatible = "stericsson,ux500-msp-i2s", },
80949731c23SLee Jones 	{},
81049731c23SLee Jones };
811c81740e0SLuis de Bethencourt MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
81249731c23SLee Jones 
8133592b7f6SOla Lilja static struct platform_driver msp_i2s_driver = {
8143592b7f6SOla Lilja 	.driver = {
8153592b7f6SOla Lilja 		.name = "ux500-msp-i2s",
81649731c23SLee Jones 		.of_match_table = ux500_msp_i2s_match,
8173592b7f6SOla Lilja 	},
8183592b7f6SOla Lilja 	.probe = ux500_msp_drv_probe,
819316a6bbfSUwe Kleine-König 	.remove_new = ux500_msp_drv_remove,
8203592b7f6SOla Lilja };
8213592b7f6SOla Lilja module_platform_driver(msp_i2s_driver);
8223592b7f6SOla Lilja 
8233592b7f6SOla Lilja MODULE_LICENSE("GPL v2");
824