1*6bdadbeeSPeter Ujfalusi /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2*6bdadbeeSPeter Ujfalusi /* 3*6bdadbeeSPeter Ujfalusi * This file is provided under a dual BSD/GPLv2 license. When using or 4*6bdadbeeSPeter Ujfalusi * redistributing this file, you may do so under either license. 5*6bdadbeeSPeter Ujfalusi * 6*6bdadbeeSPeter Ujfalusi * Copyright(c) 2024 Intel Corporation. All rights reserved. 7*6bdadbeeSPeter Ujfalusi */ 8*6bdadbeeSPeter Ujfalusi 9*6bdadbeeSPeter Ujfalusi #ifndef __SOF_INTEL_LNL_H 10*6bdadbeeSPeter Ujfalusi #define __SOF_INTEL_LNL_H 11*6bdadbeeSPeter Ujfalusi 12*6bdadbeeSPeter Ujfalusi #define LNL_DSP_REG_HFDSC 0x160200 /* DSP core0 status */ 13*6bdadbeeSPeter Ujfalusi #define LNL_DSP_REG_HFDEC 0x160204 /* DSP core0 error */ 14*6bdadbeeSPeter Ujfalusi 15*6bdadbeeSPeter Ujfalusi #endif /* __SOF_INTEL_LNL_H */ 16