1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // Copyright(c) 2023 Intel Corporation. All rights reserved. 4 5 /* 6 * Hardware interface for audio DSP on LunarLake. 7 */ 8 9 #include <linux/firmware.h> 10 #include <sound/hda_register.h> 11 #include <sound/sof/ipc4/header.h> 12 #include <trace/events/sof_intel.h> 13 #include "../ipc4-priv.h" 14 #include "../ops.h" 15 #include "hda.h" 16 #include "hda-ipc.h" 17 #include "../sof-audio.h" 18 #include "mtl.h" 19 #include "hda.h" 20 #include <sound/hda-mlink.h> 21 22 /* LunarLake ops */ 23 struct snd_sof_dsp_ops sof_lnl_ops; 24 EXPORT_SYMBOL_NS(sof_lnl_ops, SND_SOC_SOF_INTEL_HDA_COMMON); 25 26 static const struct snd_sof_debugfs_map lnl_dsp_debugfs[] = { 27 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000, SOF_DEBUGFS_ACCESS_ALWAYS}, 28 {"pp", HDA_DSP_PP_BAR, 0, 0x1000, SOF_DEBUGFS_ACCESS_ALWAYS}, 29 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS}, 30 }; 31 32 int sof_lnl_ops_init(struct snd_sof_dev *sdev) 33 { 34 struct sof_ipc4_fw_data *ipc4_data; 35 36 /* common defaults */ 37 memcpy(&sof_lnl_ops, &sof_hda_common_ops, sizeof(struct snd_sof_dsp_ops)); 38 39 /* shutdown */ 40 sof_lnl_ops.shutdown = hda_dsp_shutdown; 41 42 /* doorbell */ 43 sof_lnl_ops.irq_thread = mtl_ipc_irq_thread; 44 45 /* ipc */ 46 sof_lnl_ops.send_msg = mtl_ipc_send_msg; 47 sof_lnl_ops.get_mailbox_offset = mtl_dsp_ipc_get_mailbox_offset; 48 sof_lnl_ops.get_window_offset = mtl_dsp_ipc_get_window_offset; 49 50 /* debug */ 51 sof_lnl_ops.debug_map = lnl_dsp_debugfs; 52 sof_lnl_ops.debug_map_count = ARRAY_SIZE(lnl_dsp_debugfs); 53 sof_lnl_ops.dbg_dump = mtl_dsp_dump; 54 sof_lnl_ops.ipc_dump = mtl_ipc_dump; 55 56 /* pre/post fw run */ 57 sof_lnl_ops.pre_fw_run = mtl_dsp_pre_fw_run; 58 sof_lnl_ops.post_fw_run = mtl_dsp_post_fw_run; 59 60 /* parse platform specific extended manifest */ 61 sof_lnl_ops.parse_platform_ext_manifest = NULL; 62 63 /* dsp core get/put */ 64 /* TODO: add core_get and core_put */ 65 66 sof_lnl_ops.get_stream_position = mtl_dsp_get_stream_hda_link_position; 67 68 sdev->private = devm_kzalloc(sdev->dev, sizeof(struct sof_ipc4_fw_data), GFP_KERNEL); 69 if (!sdev->private) 70 return -ENOMEM; 71 72 ipc4_data = sdev->private; 73 ipc4_data->manifest_fw_hdr_offset = SOF_MAN4_FW_HDR_OFFSET; 74 75 ipc4_data->mtrace_type = SOF_IPC4_MTRACE_INTEL_CAVS_2; 76 77 /* External library loading support */ 78 ipc4_data->load_library = hda_dsp_ipc4_load_library; 79 80 /* set DAI ops */ 81 hda_set_dai_drv_ops(sdev, &sof_lnl_ops); 82 83 sof_lnl_ops.set_power_state = hda_dsp_set_power_state_ipc4; 84 85 return 0; 86 }; 87 EXPORT_SYMBOL_NS(sof_lnl_ops_init, SND_SOC_SOF_INTEL_HDA_COMMON); 88 89 /* Check if an SDW IRQ occurred */ 90 static bool lnl_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 91 { 92 struct hdac_bus *bus = sof_to_bus(sdev); 93 94 return hdac_bus_eml_check_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW); 95 } 96 97 static void lnl_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) 98 { 99 struct hdac_bus *bus = sof_to_bus(sdev); 100 101 hdac_bus_eml_enable_interrupt(bus, true, AZX_REG_ML_LEPTR_ID_SDW, enable); 102 } 103 104 static int lnl_dsp_disable_interrupts(struct snd_sof_dev *sdev) 105 { 106 lnl_enable_sdw_irq(sdev, false); 107 mtl_disable_ipc_interrupts(sdev); 108 return mtl_enable_interrupts(sdev, false); 109 } 110 111 const struct sof_intel_dsp_desc lnl_chip_info = { 112 .cores_num = 5, 113 .init_core_mask = BIT(0), 114 .host_managed_cores_mask = BIT(0), 115 .ipc_req = MTL_DSP_REG_HFIPCXIDR, 116 .ipc_req_mask = MTL_DSP_REG_HFIPCXIDR_BUSY, 117 .ipc_ack = MTL_DSP_REG_HFIPCXIDA, 118 .ipc_ack_mask = MTL_DSP_REG_HFIPCXIDA_DONE, 119 .ipc_ctl = MTL_DSP_REG_HFIPCXCTL, 120 .rom_status_reg = MTL_DSP_ROM_STS, 121 .rom_init_timeout = 300, 122 .ssp_count = MTL_SSP_COUNT, 123 .d0i3_offset = MTL_HDA_VS_D0I3C, 124 .read_sdw_lcount = hda_sdw_check_lcount_ext, 125 .enable_sdw_irq = lnl_enable_sdw_irq, 126 .check_sdw_irq = lnl_dsp_check_sdw_irq, 127 .check_ipc_irq = mtl_dsp_check_ipc_irq, 128 .cl_init = mtl_dsp_cl_init, 129 .power_down_dsp = mtl_power_down_dsp, 130 .disable_interrupts = lnl_dsp_disable_interrupts, 131 .hw_ip_version = SOF_INTEL_ACE_2_0, 132 }; 133 EXPORT_SYMBOL_NS(lnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); 134