xref: /openbmc/linux/sound/soc/pxa/mmp-sspa.c (revision 1a59d1b8e05ea6ab45f7e18897de1ef0e6bc3da6)
1*1a59d1b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2fa375d42SZhangfei Gao /*
3fa375d42SZhangfei Gao  * linux/sound/soc/pxa/mmp-sspa.c
4fa375d42SZhangfei Gao  * Base on pxa2xx-ssp.c
5fa375d42SZhangfei Gao  *
6fa375d42SZhangfei Gao  * Copyright (C) 2011 Marvell International Ltd.
7fa375d42SZhangfei Gao  */
8fa375d42SZhangfei Gao #include <linux/init.h>
9fa375d42SZhangfei Gao #include <linux/module.h>
10fa375d42SZhangfei Gao #include <linux/platform_device.h>
11fa375d42SZhangfei Gao #include <linux/delay.h>
12fa375d42SZhangfei Gao #include <linux/clk.h>
13fa375d42SZhangfei Gao #include <linux/slab.h>
14fa375d42SZhangfei Gao #include <linux/pxa2xx_ssp.h>
15fa375d42SZhangfei Gao #include <linux/io.h>
16d65a1458SDaniel Mack #include <linux/dmaengine.h>
17d65a1458SDaniel Mack 
18fa375d42SZhangfei Gao #include <sound/core.h>
19fa375d42SZhangfei Gao #include <sound/pcm.h>
20fa375d42SZhangfei Gao #include <sound/initval.h>
21fa375d42SZhangfei Gao #include <sound/pcm_params.h>
22fa375d42SZhangfei Gao #include <sound/soc.h>
23fa375d42SZhangfei Gao #include <sound/pxa2xx-lib.h>
24d65a1458SDaniel Mack #include <sound/dmaengine_pcm.h>
25fa375d42SZhangfei Gao #include "mmp-sspa.h"
26fa375d42SZhangfei Gao 
27fa375d42SZhangfei Gao /*
28fa375d42SZhangfei Gao  * SSPA audio private data
29fa375d42SZhangfei Gao  */
30fa375d42SZhangfei Gao struct sspa_priv {
31fa375d42SZhangfei Gao 	struct ssp_device *sspa;
32d65a1458SDaniel Mack 	struct snd_dmaengine_dai_dma_data *dma_params;
33fa375d42SZhangfei Gao 	struct clk *audio_clk;
34fa375d42SZhangfei Gao 	struct clk *sysclk;
35fa375d42SZhangfei Gao 	int dai_fmt;
36fa375d42SZhangfei Gao 	int running_cnt;
37fa375d42SZhangfei Gao };
38fa375d42SZhangfei Gao 
39fa375d42SZhangfei Gao static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val)
40fa375d42SZhangfei Gao {
41fa375d42SZhangfei Gao 	__raw_writel(val, sspa->mmio_base + reg);
42fa375d42SZhangfei Gao }
43fa375d42SZhangfei Gao 
44fa375d42SZhangfei Gao static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg)
45fa375d42SZhangfei Gao {
46fa375d42SZhangfei Gao 	return __raw_readl(sspa->mmio_base + reg);
47fa375d42SZhangfei Gao }
48fa375d42SZhangfei Gao 
49fa375d42SZhangfei Gao static void mmp_sspa_tx_enable(struct ssp_device *sspa)
50fa375d42SZhangfei Gao {
51fa375d42SZhangfei Gao 	unsigned int sspa_sp;
52fa375d42SZhangfei Gao 
53fa375d42SZhangfei Gao 	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
54fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_S_EN;
55fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_WEN;
56fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
57fa375d42SZhangfei Gao }
58fa375d42SZhangfei Gao 
59fa375d42SZhangfei Gao static void mmp_sspa_tx_disable(struct ssp_device *sspa)
60fa375d42SZhangfei Gao {
61fa375d42SZhangfei Gao 	unsigned int sspa_sp;
62fa375d42SZhangfei Gao 
63fa375d42SZhangfei Gao 	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP);
64fa375d42SZhangfei Gao 	sspa_sp &= ~SSPA_SP_S_EN;
65fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_WEN;
66fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
67fa375d42SZhangfei Gao }
68fa375d42SZhangfei Gao 
69fa375d42SZhangfei Gao static void mmp_sspa_rx_enable(struct ssp_device *sspa)
70fa375d42SZhangfei Gao {
71fa375d42SZhangfei Gao 	unsigned int sspa_sp;
72fa375d42SZhangfei Gao 
73fa375d42SZhangfei Gao 	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
74fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_S_EN;
75fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_WEN;
76fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
77fa375d42SZhangfei Gao }
78fa375d42SZhangfei Gao 
79fa375d42SZhangfei Gao static void mmp_sspa_rx_disable(struct ssp_device *sspa)
80fa375d42SZhangfei Gao {
81fa375d42SZhangfei Gao 	unsigned int sspa_sp;
82fa375d42SZhangfei Gao 
83fa375d42SZhangfei Gao 	sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP);
84fa375d42SZhangfei Gao 	sspa_sp &= ~SSPA_SP_S_EN;
85fa375d42SZhangfei Gao 	sspa_sp |= SSPA_SP_WEN;
86fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
87fa375d42SZhangfei Gao }
88fa375d42SZhangfei Gao 
89fa375d42SZhangfei Gao static int mmp_sspa_startup(struct snd_pcm_substream *substream,
90fa375d42SZhangfei Gao 	struct snd_soc_dai *dai)
91fa375d42SZhangfei Gao {
92fa375d42SZhangfei Gao 	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
93fa375d42SZhangfei Gao 
94fa375d42SZhangfei Gao 	clk_enable(priv->sysclk);
95fa375d42SZhangfei Gao 	clk_enable(priv->sspa->clk);
96fa375d42SZhangfei Gao 
97fa375d42SZhangfei Gao 	return 0;
98fa375d42SZhangfei Gao }
99fa375d42SZhangfei Gao 
100fa375d42SZhangfei Gao static void mmp_sspa_shutdown(struct snd_pcm_substream *substream,
101fa375d42SZhangfei Gao 	struct snd_soc_dai *dai)
102fa375d42SZhangfei Gao {
103fa375d42SZhangfei Gao 	struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai);
104fa375d42SZhangfei Gao 
105fa375d42SZhangfei Gao 	clk_disable(priv->sspa->clk);
106fa375d42SZhangfei Gao 	clk_disable(priv->sysclk);
107fa375d42SZhangfei Gao 
108fa375d42SZhangfei Gao }
109fa375d42SZhangfei Gao 
110fa375d42SZhangfei Gao /*
111fa375d42SZhangfei Gao  * Set the SSP ports SYSCLK.
112fa375d42SZhangfei Gao  */
113fa375d42SZhangfei Gao static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
114fa375d42SZhangfei Gao 				    int clk_id, unsigned int freq, int dir)
115fa375d42SZhangfei Gao {
116fa375d42SZhangfei Gao 	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
117fa375d42SZhangfei Gao 	int ret = 0;
118fa375d42SZhangfei Gao 
119fa375d42SZhangfei Gao 	switch (clk_id) {
120fa375d42SZhangfei Gao 	case MMP_SSPA_CLK_AUDIO:
121fa375d42SZhangfei Gao 		ret = clk_set_rate(priv->audio_clk, freq);
122fa375d42SZhangfei Gao 		if (ret)
123fa375d42SZhangfei Gao 			return ret;
124fa375d42SZhangfei Gao 		break;
125fa375d42SZhangfei Gao 	case MMP_SSPA_CLK_PLL:
126fa375d42SZhangfei Gao 	case MMP_SSPA_CLK_VCXO:
127fa375d42SZhangfei Gao 		/* not support yet */
128fa375d42SZhangfei Gao 		return -EINVAL;
129fa375d42SZhangfei Gao 	default:
130fa375d42SZhangfei Gao 		return -EINVAL;
131fa375d42SZhangfei Gao 	}
132fa375d42SZhangfei Gao 
133fa375d42SZhangfei Gao 	return 0;
134fa375d42SZhangfei Gao }
135fa375d42SZhangfei Gao 
136fa375d42SZhangfei Gao static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
137fa375d42SZhangfei Gao 				 int source, unsigned int freq_in,
138fa375d42SZhangfei Gao 				 unsigned int freq_out)
139fa375d42SZhangfei Gao {
140fa375d42SZhangfei Gao 	struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
141fa375d42SZhangfei Gao 	int ret = 0;
142fa375d42SZhangfei Gao 
143fa375d42SZhangfei Gao 	switch (pll_id) {
144fa375d42SZhangfei Gao 	case MMP_SYSCLK:
145fa375d42SZhangfei Gao 		ret = clk_set_rate(priv->sysclk, freq_out);
146fa375d42SZhangfei Gao 		if (ret)
147fa375d42SZhangfei Gao 			return ret;
148fa375d42SZhangfei Gao 		break;
149fa375d42SZhangfei Gao 	case MMP_SSPA_CLK:
150fa375d42SZhangfei Gao 		ret = clk_set_rate(priv->sspa->clk, freq_out);
151fa375d42SZhangfei Gao 		if (ret)
152fa375d42SZhangfei Gao 			return ret;
153fa375d42SZhangfei Gao 		break;
154fa375d42SZhangfei Gao 	default:
155fa375d42SZhangfei Gao 		return -ENODEV;
156fa375d42SZhangfei Gao 	}
157fa375d42SZhangfei Gao 
158fa375d42SZhangfei Gao 	return 0;
159fa375d42SZhangfei Gao }
160fa375d42SZhangfei Gao 
161fa375d42SZhangfei Gao /*
162fa375d42SZhangfei Gao  * Set up the sspa dai format. The sspa port must be inactive
163fa375d42SZhangfei Gao  * before calling this function as the physical
164fa375d42SZhangfei Gao  * interface format is changed.
165fa375d42SZhangfei Gao  */
166fa375d42SZhangfei Gao static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai,
167fa375d42SZhangfei Gao 				 unsigned int fmt)
168fa375d42SZhangfei Gao {
169fa375d42SZhangfei Gao 	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai);
170fa375d42SZhangfei Gao 	struct ssp_device *sspa = sspa_priv->sspa;
171fa375d42SZhangfei Gao 	u32 sspa_sp, sspa_ctrl;
172fa375d42SZhangfei Gao 
173fa375d42SZhangfei Gao 	/* check if we need to change anything at all */
174fa375d42SZhangfei Gao 	if (sspa_priv->dai_fmt == fmt)
175fa375d42SZhangfei Gao 		return 0;
176fa375d42SZhangfei Gao 
177fa375d42SZhangfei Gao 	/* we can only change the settings if the port is not in use */
178fa375d42SZhangfei Gao 	if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) ||
179fa375d42SZhangfei Gao 	    (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) {
180fa375d42SZhangfei Gao 		dev_err(&sspa->pdev->dev,
181fa375d42SZhangfei Gao 			"can't change hardware dai format: stream is in use\n");
182fa375d42SZhangfei Gao 		return -EINVAL;
183fa375d42SZhangfei Gao 	}
184fa375d42SZhangfei Gao 
185fa375d42SZhangfei Gao 	/* reset port settings */
186fa375d42SZhangfei Gao 	sspa_sp   = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH;
187fa375d42SZhangfei Gao 	sspa_ctrl = 0;
188fa375d42SZhangfei Gao 
189fa375d42SZhangfei Gao 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
190fa375d42SZhangfei Gao 	case SND_SOC_DAIFMT_CBS_CFS:
191fa375d42SZhangfei Gao 		sspa_sp |= SSPA_SP_MSL;
192fa375d42SZhangfei Gao 		break;
193fa375d42SZhangfei Gao 	case SND_SOC_DAIFMT_CBM_CFM:
194fa375d42SZhangfei Gao 		break;
195fa375d42SZhangfei Gao 	default:
196fa375d42SZhangfei Gao 		return -EINVAL;
197fa375d42SZhangfei Gao 	}
198fa375d42SZhangfei Gao 
199fa375d42SZhangfei Gao 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
200fa375d42SZhangfei Gao 	case SND_SOC_DAIFMT_NB_NF:
201fa375d42SZhangfei Gao 		sspa_sp |= SSPA_SP_FSP;
202fa375d42SZhangfei Gao 		break;
203fa375d42SZhangfei Gao 	default:
204fa375d42SZhangfei Gao 		return -EINVAL;
205fa375d42SZhangfei Gao 	}
206fa375d42SZhangfei Gao 
207fa375d42SZhangfei Gao 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
208fa375d42SZhangfei Gao 	case SND_SOC_DAIFMT_I2S:
209fa375d42SZhangfei Gao 		sspa_sp |= SSPA_TXSP_FPER(63);
210fa375d42SZhangfei Gao 		sspa_sp |= SSPA_SP_FWID(31);
211fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XDATDLY(1);
212fa375d42SZhangfei Gao 		break;
213fa375d42SZhangfei Gao 	default:
214fa375d42SZhangfei Gao 		return -EINVAL;
215fa375d42SZhangfei Gao 	}
216fa375d42SZhangfei Gao 
217fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
218fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
219fa375d42SZhangfei Gao 
220fa375d42SZhangfei Gao 	sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH);
221fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
222fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp);
223fa375d42SZhangfei Gao 
224fa375d42SZhangfei Gao 	/*
225fa375d42SZhangfei Gao 	 * FIXME: hw issue, for the tx serial port,
226fa375d42SZhangfei Gao 	 * can not config the master/slave mode;
227fa375d42SZhangfei Gao 	 * so must clean this bit.
228fa375d42SZhangfei Gao 	 * The master/slave mode has been set in the
229fa375d42SZhangfei Gao 	 * rx port.
230fa375d42SZhangfei Gao 	 */
231fa375d42SZhangfei Gao 	sspa_sp &= ~SSPA_SP_MSL;
232fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp);
233fa375d42SZhangfei Gao 
234fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
235fa375d42SZhangfei Gao 	mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
236fa375d42SZhangfei Gao 
237fa375d42SZhangfei Gao 	/* Since we are configuring the timings for the format by hand
238fa375d42SZhangfei Gao 	 * we have to defer some things until hw_params() where we
239fa375d42SZhangfei Gao 	 * know parameters like the sample size.
240fa375d42SZhangfei Gao 	 */
241fa375d42SZhangfei Gao 	sspa_priv->dai_fmt = fmt;
242fa375d42SZhangfei Gao 	return 0;
243fa375d42SZhangfei Gao }
244fa375d42SZhangfei Gao 
245fa375d42SZhangfei Gao /*
246fa375d42SZhangfei Gao  * Set the SSPA audio DMA parameters and sample size.
247fa375d42SZhangfei Gao  * Can be called multiple times by oss emulation.
248fa375d42SZhangfei Gao  */
249fa375d42SZhangfei Gao static int mmp_sspa_hw_params(struct snd_pcm_substream *substream,
250fa375d42SZhangfei Gao 			       struct snd_pcm_hw_params *params,
251fa375d42SZhangfei Gao 			       struct snd_soc_dai *dai)
252fa375d42SZhangfei Gao {
253fa375d42SZhangfei Gao 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
254fa375d42SZhangfei Gao 	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
255fa375d42SZhangfei Gao 	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
256fa375d42SZhangfei Gao 	struct ssp_device *sspa = sspa_priv->sspa;
257d65a1458SDaniel Mack 	struct snd_dmaengine_dai_dma_data *dma_params;
258fa375d42SZhangfei Gao 	u32 sspa_ctrl;
259fa375d42SZhangfei Gao 
260fa375d42SZhangfei Gao 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
261fa375d42SZhangfei Gao 		sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL);
262fa375d42SZhangfei Gao 	else
263fa375d42SZhangfei Gao 		sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL);
264fa375d42SZhangfei Gao 
265fa375d42SZhangfei Gao 	sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK;
266fa375d42SZhangfei Gao 	sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1);
267fa375d42SZhangfei Gao 	sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK;
268fa375d42SZhangfei Gao 	sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS);
269fa375d42SZhangfei Gao 	sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK;
270fa375d42SZhangfei Gao 
271fa375d42SZhangfei Gao 	switch (params_format(params)) {
272fa375d42SZhangfei Gao 	case SNDRV_PCM_FORMAT_S8:
273fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS);
274fa375d42SZhangfei Gao 		break;
275fa375d42SZhangfei Gao 	case SNDRV_PCM_FORMAT_S16_LE:
276fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS);
277fa375d42SZhangfei Gao 		break;
278fa375d42SZhangfei Gao 	case SNDRV_PCM_FORMAT_S20_3LE:
279fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS);
280fa375d42SZhangfei Gao 		break;
281fa375d42SZhangfei Gao 	case SNDRV_PCM_FORMAT_S24_3LE:
282fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS);
283fa375d42SZhangfei Gao 		break;
284fa375d42SZhangfei Gao 	case SNDRV_PCM_FORMAT_S32_LE:
285fa375d42SZhangfei Gao 		sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS);
286fa375d42SZhangfei Gao 		break;
287fa375d42SZhangfei Gao 	default:
288fa375d42SZhangfei Gao 		return -EINVAL;
289fa375d42SZhangfei Gao 	}
290fa375d42SZhangfei Gao 
291fa375d42SZhangfei Gao 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
292fa375d42SZhangfei Gao 		mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl);
293fa375d42SZhangfei Gao 		mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1);
294fa375d42SZhangfei Gao 	} else {
295fa375d42SZhangfei Gao 		mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl);
296fa375d42SZhangfei Gao 		mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0);
297fa375d42SZhangfei Gao 	}
298fa375d42SZhangfei Gao 
299fa375d42SZhangfei Gao 	dma_params = &sspa_priv->dma_params[substream->stream];
300d65a1458SDaniel Mack 	dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
301fa375d42SZhangfei Gao 				(sspa->phys_base + SSPA_TXD) :
302fa375d42SZhangfei Gao 				(sspa->phys_base + SSPA_RXD);
303fa375d42SZhangfei Gao 	snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params);
304fa375d42SZhangfei Gao 	return 0;
305fa375d42SZhangfei Gao }
306fa375d42SZhangfei Gao 
307fa375d42SZhangfei Gao static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd,
308fa375d42SZhangfei Gao 			     struct snd_soc_dai *dai)
309fa375d42SZhangfei Gao {
310fa375d42SZhangfei Gao 	struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai);
311fa375d42SZhangfei Gao 	struct ssp_device *sspa = sspa_priv->sspa;
312fa375d42SZhangfei Gao 	int ret = 0;
313fa375d42SZhangfei Gao 
314fa375d42SZhangfei Gao 	switch (cmd) {
315fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_START:
316fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_RESUME:
317fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
318fa375d42SZhangfei Gao 		/*
319fa375d42SZhangfei Gao 		 * whatever playback or capture, must enable rx.
320fa375d42SZhangfei Gao 		 * this is a hw issue, so need check if rx has been
321fa375d42SZhangfei Gao 		 * enabled or not; if has been enabled by another
322fa375d42SZhangfei Gao 		 * stream, do not enable again.
323fa375d42SZhangfei Gao 		 */
324fa375d42SZhangfei Gao 		if (!sspa_priv->running_cnt)
325fa375d42SZhangfei Gao 			mmp_sspa_rx_enable(sspa);
326fa375d42SZhangfei Gao 
327fa375d42SZhangfei Gao 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
328fa375d42SZhangfei Gao 			mmp_sspa_tx_enable(sspa);
329fa375d42SZhangfei Gao 
330fa375d42SZhangfei Gao 		sspa_priv->running_cnt++;
331fa375d42SZhangfei Gao 		break;
332fa375d42SZhangfei Gao 
333fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_STOP:
334fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_SUSPEND:
335fa375d42SZhangfei Gao 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
336fa375d42SZhangfei Gao 		sspa_priv->running_cnt--;
337fa375d42SZhangfei Gao 
338fa375d42SZhangfei Gao 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
339fa375d42SZhangfei Gao 			mmp_sspa_tx_disable(sspa);
340fa375d42SZhangfei Gao 
341fa375d42SZhangfei Gao 		/* have no capture stream, disable rx port */
342fa375d42SZhangfei Gao 		if (!sspa_priv->running_cnt)
343fa375d42SZhangfei Gao 			mmp_sspa_rx_disable(sspa);
344fa375d42SZhangfei Gao 		break;
345fa375d42SZhangfei Gao 
346fa375d42SZhangfei Gao 	default:
347fa375d42SZhangfei Gao 		ret = -EINVAL;
348fa375d42SZhangfei Gao 	}
349fa375d42SZhangfei Gao 
350fa375d42SZhangfei Gao 	return ret;
351fa375d42SZhangfei Gao }
352fa375d42SZhangfei Gao 
353fa375d42SZhangfei Gao static int mmp_sspa_probe(struct snd_soc_dai *dai)
354fa375d42SZhangfei Gao {
355fa375d42SZhangfei Gao 	struct sspa_priv *priv = dev_get_drvdata(dai->dev);
356fa375d42SZhangfei Gao 
357fa375d42SZhangfei Gao 	snd_soc_dai_set_drvdata(dai, priv);
358fa375d42SZhangfei Gao 	return 0;
359fa375d42SZhangfei Gao 
360fa375d42SZhangfei Gao }
361fa375d42SZhangfei Gao 
362fa375d42SZhangfei Gao #define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000
363fa375d42SZhangfei Gao #define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
364fa375d42SZhangfei Gao 		SNDRV_PCM_FMTBIT_S16_LE | \
365fa375d42SZhangfei Gao 		SNDRV_PCM_FMTBIT_S24_LE | \
366fa375d42SZhangfei Gao 		SNDRV_PCM_FMTBIT_S32_LE)
367fa375d42SZhangfei Gao 
368cb753443SGustavo A. R. Silva static const struct snd_soc_dai_ops mmp_sspa_dai_ops = {
369fa375d42SZhangfei Gao 	.startup	= mmp_sspa_startup,
370fa375d42SZhangfei Gao 	.shutdown	= mmp_sspa_shutdown,
371fa375d42SZhangfei Gao 	.trigger	= mmp_sspa_trigger,
372fa375d42SZhangfei Gao 	.hw_params	= mmp_sspa_hw_params,
373fa375d42SZhangfei Gao 	.set_sysclk	= mmp_sspa_set_dai_sysclk,
374fa375d42SZhangfei Gao 	.set_pll	= mmp_sspa_set_dai_pll,
375fa375d42SZhangfei Gao 	.set_fmt	= mmp_sspa_set_dai_fmt,
376fa375d42SZhangfei Gao };
377fa375d42SZhangfei Gao 
3785d9ff402SLars-Peter Clausen static struct snd_soc_dai_driver mmp_sspa_dai = {
379fa375d42SZhangfei Gao 	.probe = mmp_sspa_probe,
380fa375d42SZhangfei Gao 	.playback = {
381fa375d42SZhangfei Gao 		.channels_min = 1,
382fa375d42SZhangfei Gao 		.channels_max = 128,
383fa375d42SZhangfei Gao 		.rates = MMP_SSPA_RATES,
384fa375d42SZhangfei Gao 		.formats = MMP_SSPA_FORMATS,
385fa375d42SZhangfei Gao 	},
386fa375d42SZhangfei Gao 	.capture = {
387fa375d42SZhangfei Gao 		.channels_min = 1,
388fa375d42SZhangfei Gao 		.channels_max = 2,
389fa375d42SZhangfei Gao 		.rates = MMP_SSPA_RATES,
390fa375d42SZhangfei Gao 		.formats = MMP_SSPA_FORMATS,
391fa375d42SZhangfei Gao 	},
392fa375d42SZhangfei Gao 	.ops = &mmp_sspa_dai_ops,
393fa375d42SZhangfei Gao };
394fa375d42SZhangfei Gao 
395425f3708SKuninori Morimoto static const struct snd_soc_component_driver mmp_sspa_component = {
396425f3708SKuninori Morimoto 	.name		= "mmp-sspa",
397425f3708SKuninori Morimoto };
398425f3708SKuninori Morimoto 
399570f6fe1SBill Pemberton static int asoc_mmp_sspa_probe(struct platform_device *pdev)
400fa375d42SZhangfei Gao {
401fa375d42SZhangfei Gao 	struct sspa_priv *priv;
402fa375d42SZhangfei Gao 	struct resource *res;
403fa375d42SZhangfei Gao 
404fa375d42SZhangfei Gao 	priv = devm_kzalloc(&pdev->dev,
405fa375d42SZhangfei Gao 				sizeof(struct sspa_priv), GFP_KERNEL);
406fa375d42SZhangfei Gao 	if (!priv)
407fa375d42SZhangfei Gao 		return -ENOMEM;
408fa375d42SZhangfei Gao 
409fa375d42SZhangfei Gao 	priv->sspa = devm_kzalloc(&pdev->dev,
410fa375d42SZhangfei Gao 				sizeof(struct ssp_device), GFP_KERNEL);
411fa375d42SZhangfei Gao 	if (priv->sspa == NULL)
412fa375d42SZhangfei Gao 		return -ENOMEM;
413fa375d42SZhangfei Gao 
414a86854d0SKees Cook 	priv->dma_params = devm_kcalloc(&pdev->dev,
415a86854d0SKees Cook 			2, sizeof(struct snd_dmaengine_dai_dma_data),
416d65a1458SDaniel Mack 			GFP_KERNEL);
417fa375d42SZhangfei Gao 	if (priv->dma_params == NULL)
418fa375d42SZhangfei Gao 		return -ENOMEM;
419fa375d42SZhangfei Gao 
420fa375d42SZhangfei Gao 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
421b25b5aa0SThierry Reding 	priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res);
422b25b5aa0SThierry Reding 	if (IS_ERR(priv->sspa->mmio_base))
423b25b5aa0SThierry Reding 		return PTR_ERR(priv->sspa->mmio_base);
424fa375d42SZhangfei Gao 
425fa375d42SZhangfei Gao 	priv->sspa->clk = devm_clk_get(&pdev->dev, NULL);
426fa375d42SZhangfei Gao 	if (IS_ERR(priv->sspa->clk))
427fa375d42SZhangfei Gao 		return PTR_ERR(priv->sspa->clk);
428fa375d42SZhangfei Gao 
429fa375d42SZhangfei Gao 	priv->audio_clk = clk_get(NULL, "mmp-audio");
430fa375d42SZhangfei Gao 	if (IS_ERR(priv->audio_clk))
431fa375d42SZhangfei Gao 		return PTR_ERR(priv->audio_clk);
432fa375d42SZhangfei Gao 
433fa375d42SZhangfei Gao 	priv->sysclk = clk_get(NULL, "mmp-sysclk");
434fa375d42SZhangfei Gao 	if (IS_ERR(priv->sysclk)) {
435fa375d42SZhangfei Gao 		clk_put(priv->audio_clk);
436fa375d42SZhangfei Gao 		return PTR_ERR(priv->sysclk);
437fa375d42SZhangfei Gao 	}
438fa375d42SZhangfei Gao 	clk_enable(priv->audio_clk);
439fa375d42SZhangfei Gao 	priv->dai_fmt = (unsigned int) -1;
440fa375d42SZhangfei Gao 	platform_set_drvdata(pdev, priv);
441fa375d42SZhangfei Gao 
4429ff50721SSachin Kamat 	return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component,
443425f3708SKuninori Morimoto 					       &mmp_sspa_dai, 1);
444fa375d42SZhangfei Gao }
445fa375d42SZhangfei Gao 
446570f6fe1SBill Pemberton static int asoc_mmp_sspa_remove(struct platform_device *pdev)
447fa375d42SZhangfei Gao {
448fa375d42SZhangfei Gao 	struct sspa_priv *priv = platform_get_drvdata(pdev);
449fa375d42SZhangfei Gao 
450fa375d42SZhangfei Gao 	clk_disable(priv->audio_clk);
451fa375d42SZhangfei Gao 	clk_put(priv->audio_clk);
452fa375d42SZhangfei Gao 	clk_put(priv->sysclk);
453fa375d42SZhangfei Gao 	return 0;
454fa375d42SZhangfei Gao }
455fa375d42SZhangfei Gao 
456fa375d42SZhangfei Gao static struct platform_driver asoc_mmp_sspa_driver = {
457fa375d42SZhangfei Gao 	.driver = {
458fa375d42SZhangfei Gao 		.name = "mmp-sspa-dai",
459fa375d42SZhangfei Gao 	},
460fa375d42SZhangfei Gao 	.probe = asoc_mmp_sspa_probe,
461570f6fe1SBill Pemberton 	.remove = asoc_mmp_sspa_remove,
462fa375d42SZhangfei Gao };
463fa375d42SZhangfei Gao 
464fa375d42SZhangfei Gao module_platform_driver(asoc_mmp_sspa_driver);
465fa375d42SZhangfei Gao 
466fa375d42SZhangfei Gao MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
467fa375d42SZhangfei Gao MODULE_DESCRIPTION("MMP SSPA SoC Interface");
468fa375d42SZhangfei Gao MODULE_LICENSE("GPL");
469e5b7d71aSAndrea Adami MODULE_ALIAS("platform:mmp-sspa-dai");
470