11f95c019STrevor Wu // SPDX-License-Identifier: GPL-2.0
21f95c019STrevor Wu /*
31f95c019STrevor Wu * MediaTek ALSA SoC Audio DAI PCM I/F Control
41f95c019STrevor Wu *
51f95c019STrevor Wu * Copyright (c) 2020 MediaTek Inc.
61f95c019STrevor Wu * Author: Bicycle Tsai <bicycle.tsai@mediatek.com>
71f95c019STrevor Wu * Trevor Wu <trevor.wu@mediatek.com>
81f95c019STrevor Wu */
91f95c019STrevor Wu
101f95c019STrevor Wu #include <linux/regmap.h>
111f95c019STrevor Wu #include <sound/pcm_params.h>
121f95c019STrevor Wu #include "mt8195-afe-clk.h"
131f95c019STrevor Wu #include "mt8195-afe-common.h"
141f95c019STrevor Wu #include "mt8195-reg.h"
151f95c019STrevor Wu
161f95c019STrevor Wu enum {
171f95c019STrevor Wu MTK_DAI_PCM_FMT_I2S,
181f95c019STrevor Wu MTK_DAI_PCM_FMT_EIAJ,
191f95c019STrevor Wu MTK_DAI_PCM_FMT_MODEA,
201f95c019STrevor Wu MTK_DAI_PCM_FMT_MODEB,
211f95c019STrevor Wu };
221f95c019STrevor Wu
231f95c019STrevor Wu enum {
241f95c019STrevor Wu MTK_DAI_PCM_CLK_A1SYS,
251f95c019STrevor Wu MTK_DAI_PCM_CLK_A2SYS,
261f95c019STrevor Wu MTK_DAI_PCM_CLK_26M_48K,
271f95c019STrevor Wu MTK_DAI_PCM_CLK_26M_441K,
281f95c019STrevor Wu };
291f95c019STrevor Wu
301f95c019STrevor Wu struct mtk_dai_pcm_rate {
311f95c019STrevor Wu unsigned int rate;
321f95c019STrevor Wu unsigned int reg_value;
331f95c019STrevor Wu };
341f95c019STrevor Wu
351f95c019STrevor Wu struct mtk_dai_pcmif_priv {
361f95c019STrevor Wu unsigned int slave_mode;
371f95c019STrevor Wu unsigned int lrck_inv;
381f95c019STrevor Wu unsigned int bck_inv;
391f95c019STrevor Wu unsigned int format;
401f95c019STrevor Wu };
411f95c019STrevor Wu
421f95c019STrevor Wu static const struct mtk_dai_pcm_rate mtk_dai_pcm_rates[] = {
431f95c019STrevor Wu { .rate = 8000, .reg_value = 0, },
441f95c019STrevor Wu { .rate = 16000, .reg_value = 1, },
451f95c019STrevor Wu { .rate = 32000, .reg_value = 2, },
461f95c019STrevor Wu { .rate = 48000, .reg_value = 3, },
471f95c019STrevor Wu { .rate = 11025, .reg_value = 1, },
481f95c019STrevor Wu { .rate = 22050, .reg_value = 2, },
491f95c019STrevor Wu { .rate = 44100, .reg_value = 3, },
501f95c019STrevor Wu };
511f95c019STrevor Wu
mtk_dai_pcm_mode(unsigned int rate)521f95c019STrevor Wu static int mtk_dai_pcm_mode(unsigned int rate)
531f95c019STrevor Wu {
541f95c019STrevor Wu int i;
551f95c019STrevor Wu
561f95c019STrevor Wu for (i = 0; i < ARRAY_SIZE(mtk_dai_pcm_rates); i++)
571f95c019STrevor Wu if (mtk_dai_pcm_rates[i].rate == rate)
581f95c019STrevor Wu return mtk_dai_pcm_rates[i].reg_value;
591f95c019STrevor Wu
601f95c019STrevor Wu return -EINVAL;
611f95c019STrevor Wu }
621f95c019STrevor Wu
631f95c019STrevor Wu static const struct snd_kcontrol_new mtk_dai_pcm_o000_mix[] = {
641f95c019STrevor Wu SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN0, 0, 1, 0),
651f95c019STrevor Wu SOC_DAPM_SINGLE_AUTODISABLE("I070 Switch", AFE_CONN0_2, 6, 1, 0),
661f95c019STrevor Wu };
671f95c019STrevor Wu
681f95c019STrevor Wu static const struct snd_kcontrol_new mtk_dai_pcm_o001_mix[] = {
691f95c019STrevor Wu SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN1, 1, 1, 0),
701f95c019STrevor Wu SOC_DAPM_SINGLE_AUTODISABLE("I071 Switch", AFE_CONN1_2, 7, 1, 0),
711f95c019STrevor Wu };
721f95c019STrevor Wu
731f95c019STrevor Wu static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
741f95c019STrevor Wu SND_SOC_DAPM_MIXER("I002", SND_SOC_NOPM, 0, 0, NULL, 0),
751f95c019STrevor Wu SND_SOC_DAPM_MIXER("I003", SND_SOC_NOPM, 0, 0, NULL, 0),
761f95c019STrevor Wu SND_SOC_DAPM_MIXER("O000", SND_SOC_NOPM, 0, 0,
771f95c019STrevor Wu mtk_dai_pcm_o000_mix,
781f95c019STrevor Wu ARRAY_SIZE(mtk_dai_pcm_o000_mix)),
791f95c019STrevor Wu SND_SOC_DAPM_MIXER("O001", SND_SOC_NOPM, 0, 0,
801f95c019STrevor Wu mtk_dai_pcm_o001_mix,
811f95c019STrevor Wu ARRAY_SIZE(mtk_dai_pcm_o001_mix)),
821f95c019STrevor Wu
832355028cSTrevor Wu SND_SOC_DAPM_SUPPLY("PCM_EN", PCM_INTF_CON1,
842355028cSTrevor Wu PCM_INTF_CON1_PCM_EN_SHIFT, 0, NULL, 0),
852355028cSTrevor Wu
861f95c019STrevor Wu SND_SOC_DAPM_INPUT("PCM1_INPUT"),
871f95c019STrevor Wu SND_SOC_DAPM_OUTPUT("PCM1_OUTPUT"),
882355028cSTrevor Wu
892355028cSTrevor Wu SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc11"),
902355028cSTrevor Wu SND_SOC_DAPM_CLOCK_SUPPLY("aud_asrc12"),
912355028cSTrevor Wu SND_SOC_DAPM_CLOCK_SUPPLY("aud_pcmif"),
921f95c019STrevor Wu };
931f95c019STrevor Wu
941f95c019STrevor Wu static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
951f95c019STrevor Wu {"I002", NULL, "PCM1 Capture"},
961f95c019STrevor Wu {"I003", NULL, "PCM1 Capture"},
971f95c019STrevor Wu
981f95c019STrevor Wu {"O000", "I000 Switch", "I000"},
991f95c019STrevor Wu {"O001", "I001 Switch", "I001"},
1001f95c019STrevor Wu
1011f95c019STrevor Wu {"O000", "I070 Switch", "I070"},
1021f95c019STrevor Wu {"O001", "I071 Switch", "I071"},
1031f95c019STrevor Wu
1041f95c019STrevor Wu {"PCM1 Playback", NULL, "O000"},
1051f95c019STrevor Wu {"PCM1 Playback", NULL, "O001"},
1061f95c019STrevor Wu
1072355028cSTrevor Wu {"PCM1 Playback", NULL, "PCM_EN"},
1082355028cSTrevor Wu {"PCM1 Playback", NULL, "aud_asrc12"},
1092355028cSTrevor Wu {"PCM1 Playback", NULL, "aud_pcmif"},
1102355028cSTrevor Wu
1112355028cSTrevor Wu {"PCM1 Capture", NULL, "PCM_EN"},
1122355028cSTrevor Wu {"PCM1 Capture", NULL, "aud_asrc11"},
1132355028cSTrevor Wu {"PCM1 Capture", NULL, "aud_pcmif"},
1142355028cSTrevor Wu
1151f95c019STrevor Wu {"PCM1_OUTPUT", NULL, "PCM1 Playback"},
1161f95c019STrevor Wu {"PCM1 Capture", NULL, "PCM1_INPUT"},
1171f95c019STrevor Wu };
1181f95c019STrevor Wu
mtk_dai_pcm_configure(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1191f95c019STrevor Wu static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream,
1201f95c019STrevor Wu struct snd_soc_dai *dai)
1211f95c019STrevor Wu {
1221f95c019STrevor Wu struct snd_pcm_runtime * const runtime = substream->runtime;
1231f95c019STrevor Wu struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
1241f95c019STrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv;
125*ff728899STrevor Wu struct mtk_dai_pcmif_priv *pcmif_priv;
126*ff728899STrevor Wu unsigned int slave_mode;
127*ff728899STrevor Wu unsigned int lrck_inv;
128*ff728899STrevor Wu unsigned int bck_inv;
129*ff728899STrevor Wu unsigned int fmt;
1301f95c019STrevor Wu unsigned int bit_width = dai->sample_bits;
1311f95c019STrevor Wu unsigned int val = 0;
1321f95c019STrevor Wu unsigned int mask = 0;
1331f95c019STrevor Wu int fs = 0;
1341f95c019STrevor Wu int mode = 0;
1351f95c019STrevor Wu
136*ff728899STrevor Wu if (dai->id != MT8195_AFE_IO_PCM)
137*ff728899STrevor Wu return -EINVAL;
138*ff728899STrevor Wu
139*ff728899STrevor Wu pcmif_priv = afe_priv->dai_priv[dai->id];
140*ff728899STrevor Wu slave_mode = pcmif_priv->slave_mode;
141*ff728899STrevor Wu lrck_inv = pcmif_priv->lrck_inv;
142*ff728899STrevor Wu bck_inv = pcmif_priv->bck_inv;
143*ff728899STrevor Wu fmt = pcmif_priv->format;
144*ff728899STrevor Wu
1451f95c019STrevor Wu /* sync freq mode */
1461f95c019STrevor Wu fs = mt8195_afe_fs_timing(runtime->rate);
1471f95c019STrevor Wu if (fs < 0)
1481f95c019STrevor Wu return -EINVAL;
1491f95c019STrevor Wu val |= PCM_INTF_CON2_SYNC_FREQ_MODE(fs);
1501f95c019STrevor Wu mask |= PCM_INTF_CON2_SYNC_FREQ_MODE_MASK;
1511f95c019STrevor Wu
1521f95c019STrevor Wu /* clk domain sel */
1531f95c019STrevor Wu if (runtime->rate % 8000)
1541f95c019STrevor Wu val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_441K);
1551f95c019STrevor Wu else
1561f95c019STrevor Wu val |= PCM_INTF_CON2_CLK_DOMAIN_SEL(MTK_DAI_PCM_CLK_26M_48K);
1571f95c019STrevor Wu mask |= PCM_INTF_CON2_CLK_DOMAIN_SEL_MASK;
1581f95c019STrevor Wu
1591f95c019STrevor Wu regmap_update_bits(afe->regmap, PCM_INTF_CON2, mask, val);
1601f95c019STrevor Wu
1611f95c019STrevor Wu val = 0;
1621f95c019STrevor Wu mask = 0;
1631f95c019STrevor Wu
1641f95c019STrevor Wu /* pcm mode */
1651f95c019STrevor Wu mode = mtk_dai_pcm_mode(runtime->rate);
1661f95c019STrevor Wu if (mode < 0)
1671f95c019STrevor Wu return -EINVAL;
1681f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_MODE(mode);
1691f95c019STrevor Wu mask |= PCM_INTF_CON1_PCM_MODE_MASK;
1701f95c019STrevor Wu
1711f95c019STrevor Wu /* pcm format */
1721f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_FMT(fmt);
1731f95c019STrevor Wu mask |= PCM_INTF_CON1_PCM_FMT_MASK;
1741f95c019STrevor Wu
1751f95c019STrevor Wu /* pcm sync length */
1761f95c019STrevor Wu if (fmt == MTK_DAI_PCM_FMT_MODEA ||
1771f95c019STrevor Wu fmt == MTK_DAI_PCM_FMT_MODEB)
1781f95c019STrevor Wu val |= PCM_INTF_CON1_SYNC_LENGTH(1);
1791f95c019STrevor Wu else
1801f95c019STrevor Wu val |= PCM_INTF_CON1_SYNC_LENGTH(bit_width);
1811f95c019STrevor Wu mask |= PCM_INTF_CON1_SYNC_LENGTH_MASK;
1821f95c019STrevor Wu
1831f95c019STrevor Wu /* pcm bits, word length */
1841f95c019STrevor Wu if (bit_width > 16) {
1851f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_24BIT;
1861f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_WLEN_64BCK;
1871f95c019STrevor Wu } else {
1881f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_16BIT;
1891f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_WLEN_32BCK;
1901f95c019STrevor Wu }
1911f95c019STrevor Wu mask |= PCM_INTF_CON1_PCM_BIT_MASK;
1921f95c019STrevor Wu mask |= PCM_INTF_CON1_PCM_WLEN_MASK;
1931f95c019STrevor Wu
1941f95c019STrevor Wu /* master/slave */
1951f95c019STrevor Wu if (!slave_mode) {
1961f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_MASTER;
1971f95c019STrevor Wu
1981f95c019STrevor Wu if (lrck_inv)
1991f95c019STrevor Wu val |= PCM_INTF_CON1_SYNC_OUT_INV;
2001f95c019STrevor Wu if (bck_inv)
2011f95c019STrevor Wu val |= PCM_INTF_CON1_BCLK_OUT_INV;
2021f95c019STrevor Wu mask |= PCM_INTF_CON1_CLK_OUT_INV_MASK;
2031f95c019STrevor Wu } else {
2041f95c019STrevor Wu val |= PCM_INTF_CON1_PCM_SLAVE;
2051f95c019STrevor Wu
2061f95c019STrevor Wu if (lrck_inv)
2071f95c019STrevor Wu val |= PCM_INTF_CON1_SYNC_IN_INV;
2081f95c019STrevor Wu if (bck_inv)
2091f95c019STrevor Wu val |= PCM_INTF_CON1_BCLK_IN_INV;
2101f95c019STrevor Wu mask |= PCM_INTF_CON1_CLK_IN_INV_MASK;
2111f95c019STrevor Wu
2121f95c019STrevor Wu /* TODO: add asrc setting for slave mode */
2131f95c019STrevor Wu }
2141f95c019STrevor Wu mask |= PCM_INTF_CON1_PCM_M_S_MASK;
2151f95c019STrevor Wu
2161f95c019STrevor Wu regmap_update_bits(afe->regmap, PCM_INTF_CON1, mask, val);
2171f95c019STrevor Wu
2181f95c019STrevor Wu return 0;
2191f95c019STrevor Wu }
2201f95c019STrevor Wu
2211f95c019STrevor Wu /* dai ops */
mtk_dai_pcm_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)2221f95c019STrevor Wu static int mtk_dai_pcm_prepare(struct snd_pcm_substream *substream,
2231f95c019STrevor Wu struct snd_soc_dai *dai)
2241f95c019STrevor Wu {
2250df2ec8eSKuninori Morimoto struct snd_soc_dapm_widget *p = snd_soc_dai_get_widget_playback(dai);
2260df2ec8eSKuninori Morimoto struct snd_soc_dapm_widget *c = snd_soc_dai_get_widget_capture(dai);
2270df2ec8eSKuninori Morimoto
2282355028cSTrevor Wu dev_dbg(dai->dev, "%s(), id %d, stream %d, widget active p %d, c %d\n",
2292355028cSTrevor Wu __func__, dai->id, substream->stream,
2300df2ec8eSKuninori Morimoto p->active, c->active);
2312355028cSTrevor Wu
2320df2ec8eSKuninori Morimoto if (p->active || c->active)
2331f95c019STrevor Wu return 0;
2341f95c019STrevor Wu
23574eaa812SMinghao Chi return mtk_dai_pcm_configure(substream, dai);
2361f95c019STrevor Wu }
2371f95c019STrevor Wu
mtk_dai_pcm_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)2381f95c019STrevor Wu static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2391f95c019STrevor Wu {
2401f95c019STrevor Wu struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
2411f95c019STrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv;
242*ff728899STrevor Wu struct mtk_dai_pcmif_priv *pcmif_priv;
2431f95c019STrevor Wu
2441f95c019STrevor Wu dev_dbg(dai->dev, "%s fmt 0x%x\n", __func__, fmt);
2451f95c019STrevor Wu
246*ff728899STrevor Wu if (dai->id != MT8195_AFE_IO_PCM)
247*ff728899STrevor Wu return -EINVAL;
248*ff728899STrevor Wu
249*ff728899STrevor Wu pcmif_priv = afe_priv->dai_priv[dai->id];
250*ff728899STrevor Wu
2511f95c019STrevor Wu switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2521f95c019STrevor Wu case SND_SOC_DAIFMT_I2S:
2531f95c019STrevor Wu pcmif_priv->format = MTK_DAI_PCM_FMT_I2S;
2541f95c019STrevor Wu break;
2551f95c019STrevor Wu case SND_SOC_DAIFMT_DSP_A:
2561f95c019STrevor Wu pcmif_priv->format = MTK_DAI_PCM_FMT_MODEA;
2571f95c019STrevor Wu break;
2581f95c019STrevor Wu case SND_SOC_DAIFMT_DSP_B:
2591f95c019STrevor Wu pcmif_priv->format = MTK_DAI_PCM_FMT_MODEB;
2601f95c019STrevor Wu break;
2611f95c019STrevor Wu default:
2621f95c019STrevor Wu return -EINVAL;
2631f95c019STrevor Wu }
2641f95c019STrevor Wu
2651f95c019STrevor Wu switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2661f95c019STrevor Wu case SND_SOC_DAIFMT_NB_NF:
2671f95c019STrevor Wu pcmif_priv->bck_inv = 0;
2681f95c019STrevor Wu pcmif_priv->lrck_inv = 0;
2691f95c019STrevor Wu break;
2701f95c019STrevor Wu case SND_SOC_DAIFMT_NB_IF:
2711f95c019STrevor Wu pcmif_priv->bck_inv = 0;
2721f95c019STrevor Wu pcmif_priv->lrck_inv = 1;
2731f95c019STrevor Wu break;
2741f95c019STrevor Wu case SND_SOC_DAIFMT_IB_NF:
2751f95c019STrevor Wu pcmif_priv->bck_inv = 1;
2761f95c019STrevor Wu pcmif_priv->lrck_inv = 0;
2771f95c019STrevor Wu break;
2781f95c019STrevor Wu case SND_SOC_DAIFMT_IB_IF:
2791f95c019STrevor Wu pcmif_priv->bck_inv = 1;
2801f95c019STrevor Wu pcmif_priv->lrck_inv = 1;
2811f95c019STrevor Wu break;
2821f95c019STrevor Wu default:
2831f95c019STrevor Wu return -EINVAL;
2841f95c019STrevor Wu }
2851f95c019STrevor Wu
2863af99430SCharles Keepax switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
2873af99430SCharles Keepax case SND_SOC_DAIFMT_BC_FC:
2881f95c019STrevor Wu pcmif_priv->slave_mode = 1;
2891f95c019STrevor Wu break;
2903af99430SCharles Keepax case SND_SOC_DAIFMT_BP_FP:
2911f95c019STrevor Wu pcmif_priv->slave_mode = 0;
2921f95c019STrevor Wu break;
2931f95c019STrevor Wu default:
2941f95c019STrevor Wu return -EINVAL;
2951f95c019STrevor Wu }
2961f95c019STrevor Wu
2971f95c019STrevor Wu return 0;
2981f95c019STrevor Wu }
2991f95c019STrevor Wu
3001f95c019STrevor Wu static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
3011f95c019STrevor Wu .prepare = mtk_dai_pcm_prepare,
30200ca2d15SCharles Keepax .set_fmt = mtk_dai_pcm_set_fmt,
3031f95c019STrevor Wu };
3041f95c019STrevor Wu
3051f95c019STrevor Wu /* dai driver */
3061f95c019STrevor Wu #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000_48000)
3071f95c019STrevor Wu
3081f95c019STrevor Wu #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
3091f95c019STrevor Wu SNDRV_PCM_FMTBIT_S24_LE |\
3101f95c019STrevor Wu SNDRV_PCM_FMTBIT_S32_LE)
3111f95c019STrevor Wu
3121f95c019STrevor Wu static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
3131f95c019STrevor Wu {
3141f95c019STrevor Wu .name = "PCM1",
3151f95c019STrevor Wu .id = MT8195_AFE_IO_PCM,
3161f95c019STrevor Wu .playback = {
3171f95c019STrevor Wu .stream_name = "PCM1 Playback",
3181f95c019STrevor Wu .channels_min = 1,
3191f95c019STrevor Wu .channels_max = 2,
3201f95c019STrevor Wu .rates = MTK_PCM_RATES,
3211f95c019STrevor Wu .formats = MTK_PCM_FORMATS,
3221f95c019STrevor Wu },
3231f95c019STrevor Wu .capture = {
3241f95c019STrevor Wu .stream_name = "PCM1 Capture",
3251f95c019STrevor Wu .channels_min = 1,
3261f95c019STrevor Wu .channels_max = 2,
3271f95c019STrevor Wu .rates = MTK_PCM_RATES,
3281f95c019STrevor Wu .formats = MTK_PCM_FORMATS,
3291f95c019STrevor Wu },
3301f95c019STrevor Wu .ops = &mtk_dai_pcm_ops,
3311f95c019STrevor Wu .symmetric_rate = 1,
3321f95c019STrevor Wu .symmetric_sample_bits = 1,
3331f95c019STrevor Wu },
3341f95c019STrevor Wu };
3351f95c019STrevor Wu
init_pcmif_priv_data(struct mtk_base_afe * afe)3361f95c019STrevor Wu static int init_pcmif_priv_data(struct mtk_base_afe *afe)
3371f95c019STrevor Wu {
3381f95c019STrevor Wu struct mt8195_afe_private *afe_priv = afe->platform_priv;
3391f95c019STrevor Wu struct mtk_dai_pcmif_priv *pcmif_priv;
3401f95c019STrevor Wu
3411f95c019STrevor Wu pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_pcmif_priv),
3421f95c019STrevor Wu GFP_KERNEL);
3431f95c019STrevor Wu if (!pcmif_priv)
3441f95c019STrevor Wu return -ENOMEM;
3451f95c019STrevor Wu
3461f95c019STrevor Wu afe_priv->dai_priv[MT8195_AFE_IO_PCM] = pcmif_priv;
3471f95c019STrevor Wu return 0;
3481f95c019STrevor Wu }
3491f95c019STrevor Wu
mt8195_dai_pcm_register(struct mtk_base_afe * afe)3501f95c019STrevor Wu int mt8195_dai_pcm_register(struct mtk_base_afe *afe)
3511f95c019STrevor Wu {
3521f95c019STrevor Wu struct mtk_base_afe_dai *dai;
3531f95c019STrevor Wu
3541f95c019STrevor Wu dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
3551f95c019STrevor Wu if (!dai)
3561f95c019STrevor Wu return -ENOMEM;
3571f95c019STrevor Wu
3581f95c019STrevor Wu list_add(&dai->list, &afe->sub_dais);
3591f95c019STrevor Wu
3601f95c019STrevor Wu dai->dai_drivers = mtk_dai_pcm_driver;
3611f95c019STrevor Wu dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
3621f95c019STrevor Wu
3631f95c019STrevor Wu dai->dapm_widgets = mtk_dai_pcm_widgets;
3641f95c019STrevor Wu dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
3651f95c019STrevor Wu dai->dapm_routes = mtk_dai_pcm_routes;
3661f95c019STrevor Wu dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
3671f95c019STrevor Wu
3681f95c019STrevor Wu return init_pcmif_priv_data(afe);
3691f95c019STrevor Wu }
370