1a94aec03SShunli Wang /* SPDX-License-Identifier: GPL-2.0 */ 2a94aec03SShunli Wang /* 3a94aec03SShunli Wang * mt8183-afe-common.h -- Mediatek 8183 audio driver definitions 4a94aec03SShunli Wang * 5a94aec03SShunli Wang * Copyright (c) 2018 MediaTek Inc. 6a94aec03SShunli Wang * Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com> 7a94aec03SShunli Wang */ 8a94aec03SShunli Wang 9a94aec03SShunli Wang #ifndef _MT_8183_AFE_COMMON_H_ 10a94aec03SShunli Wang #define _MT_8183_AFE_COMMON_H_ 11a94aec03SShunli Wang 12a94aec03SShunli Wang #include <sound/soc.h> 13a94aec03SShunli Wang #include <linux/list.h> 14a94aec03SShunli Wang #include <linux/regmap.h> 15a94aec03SShunli Wang #include "../common/mtk-base-afe.h" 16a94aec03SShunli Wang 17a94aec03SShunli Wang enum { 18a94aec03SShunli Wang MT8183_MEMIF_DL1, 19a94aec03SShunli Wang MT8183_MEMIF_DL2, 20a94aec03SShunli Wang MT8183_MEMIF_DL3, 21a94aec03SShunli Wang MT8183_MEMIF_VUL12, 22a94aec03SShunli Wang MT8183_MEMIF_VUL2, 23a94aec03SShunli Wang MT8183_MEMIF_AWB, 24a94aec03SShunli Wang MT8183_MEMIF_AWB2, 25a94aec03SShunli Wang MT8183_MEMIF_MOD_DAI, 26a94aec03SShunli Wang MT8183_MEMIF_HDMI, 27a94aec03SShunli Wang MT8183_MEMIF_NUM, 28a94aec03SShunli Wang MT8183_DAI_ADDA = MT8183_MEMIF_NUM, 29a94aec03SShunli Wang MT8183_DAI_PCM_1, 30a94aec03SShunli Wang MT8183_DAI_PCM_2, 31a94aec03SShunli Wang MT8183_DAI_I2S_0, 32a94aec03SShunli Wang MT8183_DAI_I2S_1, 33a94aec03SShunli Wang MT8183_DAI_I2S_2, 34a94aec03SShunli Wang MT8183_DAI_I2S_3, 35a94aec03SShunli Wang MT8183_DAI_I2S_5, 36a94aec03SShunli Wang MT8183_DAI_TDM, 37a94aec03SShunli Wang MT8183_DAI_HOSTLESS_LPBK, 38a94aec03SShunli Wang MT8183_DAI_HOSTLESS_SPEECH, 39a94aec03SShunli Wang MT8183_DAI_NUM, 40a94aec03SShunli Wang }; 41a94aec03SShunli Wang 42a94aec03SShunli Wang enum { 43a94aec03SShunli Wang MT8183_IRQ_0, 44a94aec03SShunli Wang MT8183_IRQ_1, 45a94aec03SShunli Wang MT8183_IRQ_2, 46a94aec03SShunli Wang MT8183_IRQ_3, 47a94aec03SShunli Wang MT8183_IRQ_4, 48a94aec03SShunli Wang MT8183_IRQ_5, 49a94aec03SShunli Wang MT8183_IRQ_6, 50a94aec03SShunli Wang MT8183_IRQ_7, 51a94aec03SShunli Wang MT8183_IRQ_8, /* hw bundle to TDM */ 52a94aec03SShunli Wang MT8183_IRQ_11, 53a94aec03SShunli Wang MT8183_IRQ_12, 54a94aec03SShunli Wang MT8183_IRQ_NUM, 55a94aec03SShunli Wang }; 56a94aec03SShunli Wang 57a94aec03SShunli Wang enum { 58a94aec03SShunli Wang MT8183_MTKAIF_PROTOCOL_1 = 0, 59a94aec03SShunli Wang MT8183_MTKAIF_PROTOCOL_2, 60a94aec03SShunli Wang MT8183_MTKAIF_PROTOCOL_2_CLK_P2, 61a94aec03SShunli Wang }; 62a94aec03SShunli Wang 63a94aec03SShunli Wang /* MCLK */ 64a94aec03SShunli Wang enum { 65a94aec03SShunli Wang MT8183_I2S0_MCK = 0, 66a94aec03SShunli Wang MT8183_I2S1_MCK, 67a94aec03SShunli Wang MT8183_I2S2_MCK, 68a94aec03SShunli Wang MT8183_I2S3_MCK, 69a94aec03SShunli Wang MT8183_I2S4_MCK, 70a94aec03SShunli Wang MT8183_I2S4_BCK, 71a94aec03SShunli Wang MT8183_I2S5_MCK, 72a94aec03SShunli Wang MT8183_MCK_NUM, 73a94aec03SShunli Wang }; 74a94aec03SShunli Wang 75a94aec03SShunli Wang struct clk; 76a94aec03SShunli Wang 77a94aec03SShunli Wang struct mt8183_afe_private { 78a94aec03SShunli Wang struct clk **clk; 79a94aec03SShunli Wang 80a94aec03SShunli Wang int pm_runtime_bypass_reg_ctl; 81a94aec03SShunli Wang 82a94aec03SShunli Wang /* dai */ 83a94aec03SShunli Wang void *dai_priv[MT8183_DAI_NUM]; 84a94aec03SShunli Wang 85a94aec03SShunli Wang /* adda */ 86a94aec03SShunli Wang int mtkaif_protocol; 87a94aec03SShunli Wang int mtkaif_calibration_ok; 88a94aec03SShunli Wang int mtkaif_chosen_phase[4]; 89a94aec03SShunli Wang int mtkaif_phase_cycle[4]; 90a94aec03SShunli Wang int mtkaif_calibration_num_phase; 91a94aec03SShunli Wang int mtkaif_dmic; 92a94aec03SShunli Wang 93a94aec03SShunli Wang /* mck */ 94a94aec03SShunli Wang int mck_rate[MT8183_MCK_NUM]; 95a94aec03SShunli Wang }; 96a94aec03SShunli Wang 97a94aec03SShunli Wang unsigned int mt8183_general_rate_transform(struct device *dev, 98a94aec03SShunli Wang unsigned int rate); 99a94aec03SShunli Wang unsigned int mt8183_rate_transform(struct device *dev, 100a94aec03SShunli Wang unsigned int rate, int aud_blk); 101a94aec03SShunli Wang 102*fea84890SNícolas F. R. A. Prado int mt8183_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name, 103*fea84890SNícolas F. R. A. Prado const char *secondary_i2s_name); 104*fea84890SNícolas F. R. A. Prado 105a94aec03SShunli Wang /* dai register */ 106a94aec03SShunli Wang int mt8183_dai_adda_register(struct mtk_base_afe *afe); 107a94aec03SShunli Wang int mt8183_dai_pcm_register(struct mtk_base_afe *afe); 108a94aec03SShunli Wang int mt8183_dai_i2s_register(struct mtk_base_afe *afe); 109a94aec03SShunli Wang int mt8183_dai_tdm_register(struct mtk_base_afe *afe); 110a94aec03SShunli Wang int mt8183_dai_hostless_register(struct mtk_base_afe *afe); 111a94aec03SShunli Wang #endif 112