1e4e2d2f4SJeeja KP /* 2e4e2d2f4SJeeja KP * skl-topology.c - Implements Platform component ALSA controls/widget 3e4e2d2f4SJeeja KP * handlers. 4e4e2d2f4SJeeja KP * 5e4e2d2f4SJeeja KP * Copyright (C) 2014-2015 Intel Corp 6e4e2d2f4SJeeja KP * Author: Jeeja KP <jeeja.kp@intel.com> 7e4e2d2f4SJeeja KP * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8e4e2d2f4SJeeja KP * 9e4e2d2f4SJeeja KP * This program is free software; you can redistribute it and/or modify 10e4e2d2f4SJeeja KP * it under the terms of the GNU General Public License as version 2, as 11e4e2d2f4SJeeja KP * published by the Free Software Foundation. 12e4e2d2f4SJeeja KP * 13e4e2d2f4SJeeja KP * This program is distributed in the hope that it will be useful, but 14e4e2d2f4SJeeja KP * WITHOUT ANY WARRANTY; without even the implied warranty of 15e4e2d2f4SJeeja KP * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16e4e2d2f4SJeeja KP * General Public License for more details. 17e4e2d2f4SJeeja KP */ 18e4e2d2f4SJeeja KP 19e4e2d2f4SJeeja KP #include <linux/slab.h> 20e4e2d2f4SJeeja KP #include <linux/types.h> 21e4e2d2f4SJeeja KP #include <linux/firmware.h> 22e4e2d2f4SJeeja KP #include <sound/soc.h> 23e4e2d2f4SJeeja KP #include <sound/soc-topology.h> 24e4e2d2f4SJeeja KP #include "skl-sst-dsp.h" 25e4e2d2f4SJeeja KP #include "skl-sst-ipc.h" 26e4e2d2f4SJeeja KP #include "skl-topology.h" 27e4e2d2f4SJeeja KP #include "skl.h" 28e4e2d2f4SJeeja KP #include "skl-tplg-interface.h" 29e4e2d2f4SJeeja KP 30f7590d4fSJeeja KP #define SKL_CH_FIXUP_MASK (1 << 0) 31f7590d4fSJeeja KP #define SKL_RATE_FIXUP_MASK (1 << 1) 32f7590d4fSJeeja KP #define SKL_FMT_FIXUP_MASK (1 << 2) 33f7590d4fSJeeja KP 34e4e2d2f4SJeeja KP /* 35e4e2d2f4SJeeja KP * SKL DSP driver modelling uses only few DAPM widgets so for rest we will 36e4e2d2f4SJeeja KP * ignore. This helpers checks if the SKL driver handles this widget type 37e4e2d2f4SJeeja KP */ 38e4e2d2f4SJeeja KP static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w) 39e4e2d2f4SJeeja KP { 40e4e2d2f4SJeeja KP switch (w->id) { 41e4e2d2f4SJeeja KP case snd_soc_dapm_dai_link: 42e4e2d2f4SJeeja KP case snd_soc_dapm_dai_in: 43e4e2d2f4SJeeja KP case snd_soc_dapm_aif_in: 44e4e2d2f4SJeeja KP case snd_soc_dapm_aif_out: 45e4e2d2f4SJeeja KP case snd_soc_dapm_dai_out: 46e4e2d2f4SJeeja KP case snd_soc_dapm_switch: 47e4e2d2f4SJeeja KP return false; 48e4e2d2f4SJeeja KP default: 49e4e2d2f4SJeeja KP return true; 50e4e2d2f4SJeeja KP } 51e4e2d2f4SJeeja KP } 52e4e2d2f4SJeeja KP 53e4e2d2f4SJeeja KP /* 54e4e2d2f4SJeeja KP * Each pipelines needs memory to be allocated. Check if we have free memory 55e4e2d2f4SJeeja KP * from available pool. Then only add this to pool 56e4e2d2f4SJeeja KP * This is freed when pipe is deleted 57e4e2d2f4SJeeja KP * Note: DSP does actual memory management we only keep track for complete 58e4e2d2f4SJeeja KP * pool 59e4e2d2f4SJeeja KP */ 60e4e2d2f4SJeeja KP static bool skl_tplg_alloc_pipe_mem(struct skl *skl, 61e4e2d2f4SJeeja KP struct skl_module_cfg *mconfig) 62e4e2d2f4SJeeja KP { 63e4e2d2f4SJeeja KP struct skl_sst *ctx = skl->skl_sst; 64e4e2d2f4SJeeja KP 65e4e2d2f4SJeeja KP if (skl->resource.mem + mconfig->pipe->memory_pages > 66e4e2d2f4SJeeja KP skl->resource.max_mem) { 67e4e2d2f4SJeeja KP dev_err(ctx->dev, 68e4e2d2f4SJeeja KP "%s: module_id %d instance %d\n", __func__, 69e4e2d2f4SJeeja KP mconfig->id.module_id, 70e4e2d2f4SJeeja KP mconfig->id.instance_id); 71e4e2d2f4SJeeja KP dev_err(ctx->dev, 72e4e2d2f4SJeeja KP "exceeds ppl memory available %d mem %d\n", 73e4e2d2f4SJeeja KP skl->resource.max_mem, skl->resource.mem); 74e4e2d2f4SJeeja KP return false; 75e4e2d2f4SJeeja KP } 76e4e2d2f4SJeeja KP 77e4e2d2f4SJeeja KP skl->resource.mem += mconfig->pipe->memory_pages; 78e4e2d2f4SJeeja KP return true; 79e4e2d2f4SJeeja KP } 80e4e2d2f4SJeeja KP 81e4e2d2f4SJeeja KP /* 82e4e2d2f4SJeeja KP * Pipeline needs needs DSP CPU resources for computation, this is 83e4e2d2f4SJeeja KP * quantified in MCPS (Million Clocks Per Second) required for module/pipe 84e4e2d2f4SJeeja KP * 85e4e2d2f4SJeeja KP * Each pipelines needs mcps to be allocated. Check if we have mcps for this 86e4e2d2f4SJeeja KP * pipe. This adds the mcps to driver counter 87e4e2d2f4SJeeja KP * This is removed on pipeline delete 88e4e2d2f4SJeeja KP */ 89e4e2d2f4SJeeja KP static bool skl_tplg_alloc_pipe_mcps(struct skl *skl, 90e4e2d2f4SJeeja KP struct skl_module_cfg *mconfig) 91e4e2d2f4SJeeja KP { 92e4e2d2f4SJeeja KP struct skl_sst *ctx = skl->skl_sst; 93e4e2d2f4SJeeja KP 94e4e2d2f4SJeeja KP if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) { 95e4e2d2f4SJeeja KP dev_err(ctx->dev, 96e4e2d2f4SJeeja KP "%s: module_id %d instance %d\n", __func__, 97e4e2d2f4SJeeja KP mconfig->id.module_id, mconfig->id.instance_id); 98e4e2d2f4SJeeja KP dev_err(ctx->dev, 99e4e2d2f4SJeeja KP "exceeds ppl memory available %d > mem %d\n", 100e4e2d2f4SJeeja KP skl->resource.max_mcps, skl->resource.mcps); 101e4e2d2f4SJeeja KP return false; 102e4e2d2f4SJeeja KP } 103e4e2d2f4SJeeja KP 104e4e2d2f4SJeeja KP skl->resource.mcps += mconfig->mcps; 105e4e2d2f4SJeeja KP return true; 106e4e2d2f4SJeeja KP } 107e4e2d2f4SJeeja KP 108e4e2d2f4SJeeja KP /* 109e4e2d2f4SJeeja KP * Free the mcps when tearing down 110e4e2d2f4SJeeja KP */ 111e4e2d2f4SJeeja KP static void 112e4e2d2f4SJeeja KP skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig) 113e4e2d2f4SJeeja KP { 114e4e2d2f4SJeeja KP skl->resource.mcps -= mconfig->mcps; 115e4e2d2f4SJeeja KP } 116e4e2d2f4SJeeja KP 117e4e2d2f4SJeeja KP /* 118e4e2d2f4SJeeja KP * Free the memory when tearing down 119e4e2d2f4SJeeja KP */ 120e4e2d2f4SJeeja KP static void 121e4e2d2f4SJeeja KP skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig) 122e4e2d2f4SJeeja KP { 123e4e2d2f4SJeeja KP skl->resource.mem -= mconfig->pipe->memory_pages; 124e4e2d2f4SJeeja KP } 125e4e2d2f4SJeeja KP 126f7590d4fSJeeja KP 127f7590d4fSJeeja KP static void skl_dump_mconfig(struct skl_sst *ctx, 128f7590d4fSJeeja KP struct skl_module_cfg *mcfg) 129f7590d4fSJeeja KP { 130f7590d4fSJeeja KP dev_dbg(ctx->dev, "Dumping config\n"); 131f7590d4fSJeeja KP dev_dbg(ctx->dev, "Input Format:\n"); 1324cd9899fSHardik T Shah dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels); 1334cd9899fSHardik T Shah dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq); 1344cd9899fSHardik T Shah dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg); 1354cd9899fSHardik T Shah dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth); 136f7590d4fSJeeja KP dev_dbg(ctx->dev, "Output Format:\n"); 1374cd9899fSHardik T Shah dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels); 1384cd9899fSHardik T Shah dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq); 1394cd9899fSHardik T Shah dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth); 1404cd9899fSHardik T Shah dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg); 141f7590d4fSJeeja KP } 142f7590d4fSJeeja KP 143f7590d4fSJeeja KP static void skl_tplg_update_params(struct skl_module_fmt *fmt, 144f7590d4fSJeeja KP struct skl_pipe_params *params, int fixup) 145f7590d4fSJeeja KP { 146f7590d4fSJeeja KP if (fixup & SKL_RATE_FIXUP_MASK) 147f7590d4fSJeeja KP fmt->s_freq = params->s_freq; 148f7590d4fSJeeja KP if (fixup & SKL_CH_FIXUP_MASK) 149f7590d4fSJeeja KP fmt->channels = params->ch; 15098256f83SJeeja KP if (fixup & SKL_FMT_FIXUP_MASK) { 15198256f83SJeeja KP fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt); 15298256f83SJeeja KP 15398256f83SJeeja KP /* 15498256f83SJeeja KP * 16 bit is 16 bit container whereas 24 bit is in 32 bit 15598256f83SJeeja KP * container so update bit depth accordingly 15698256f83SJeeja KP */ 15798256f83SJeeja KP switch (fmt->valid_bit_depth) { 15898256f83SJeeja KP case SKL_DEPTH_16BIT: 15998256f83SJeeja KP fmt->bit_depth = fmt->valid_bit_depth; 16098256f83SJeeja KP break; 16198256f83SJeeja KP 16298256f83SJeeja KP default: 16398256f83SJeeja KP fmt->bit_depth = SKL_DEPTH_32BIT; 16498256f83SJeeja KP break; 16598256f83SJeeja KP } 16698256f83SJeeja KP } 16798256f83SJeeja KP 168f7590d4fSJeeja KP } 169f7590d4fSJeeja KP 170f7590d4fSJeeja KP /* 171f7590d4fSJeeja KP * A pipeline may have modules which impact the pcm parameters, like SRC, 172f7590d4fSJeeja KP * channel converter, format converter. 173f7590d4fSJeeja KP * We need to calculate the output params by applying the 'fixup' 174f7590d4fSJeeja KP * Topology will tell driver which type of fixup is to be applied by 175f7590d4fSJeeja KP * supplying the fixup mask, so based on that we calculate the output 176f7590d4fSJeeja KP * 177f7590d4fSJeeja KP * Now In FE the pcm hw_params is source/target format. Same is applicable 178f7590d4fSJeeja KP * for BE with its hw_params invoked. 179f7590d4fSJeeja KP * here based on FE, BE pipeline and direction we calculate the input and 180f7590d4fSJeeja KP * outfix and then apply that for a module 181f7590d4fSJeeja KP */ 182f7590d4fSJeeja KP static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg, 183f7590d4fSJeeja KP struct skl_pipe_params *params, bool is_fe) 184f7590d4fSJeeja KP { 185f7590d4fSJeeja KP int in_fixup, out_fixup; 186f7590d4fSJeeja KP struct skl_module_fmt *in_fmt, *out_fmt; 187f7590d4fSJeeja KP 1884cd9899fSHardik T Shah /* Fixups will be applied to pin 0 only */ 1894cd9899fSHardik T Shah in_fmt = &m_cfg->in_fmt[0]; 1904cd9899fSHardik T Shah out_fmt = &m_cfg->out_fmt[0]; 191f7590d4fSJeeja KP 192f7590d4fSJeeja KP if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 193f7590d4fSJeeja KP if (is_fe) { 194f7590d4fSJeeja KP in_fixup = m_cfg->params_fixup; 195f7590d4fSJeeja KP out_fixup = (~m_cfg->converter) & 196f7590d4fSJeeja KP m_cfg->params_fixup; 197f7590d4fSJeeja KP } else { 198f7590d4fSJeeja KP out_fixup = m_cfg->params_fixup; 199f7590d4fSJeeja KP in_fixup = (~m_cfg->converter) & 200f7590d4fSJeeja KP m_cfg->params_fixup; 201f7590d4fSJeeja KP } 202f7590d4fSJeeja KP } else { 203f7590d4fSJeeja KP if (is_fe) { 204f7590d4fSJeeja KP out_fixup = m_cfg->params_fixup; 205f7590d4fSJeeja KP in_fixup = (~m_cfg->converter) & 206f7590d4fSJeeja KP m_cfg->params_fixup; 207f7590d4fSJeeja KP } else { 208f7590d4fSJeeja KP in_fixup = m_cfg->params_fixup; 209f7590d4fSJeeja KP out_fixup = (~m_cfg->converter) & 210f7590d4fSJeeja KP m_cfg->params_fixup; 211f7590d4fSJeeja KP } 212f7590d4fSJeeja KP } 213f7590d4fSJeeja KP 214f7590d4fSJeeja KP skl_tplg_update_params(in_fmt, params, in_fixup); 215f7590d4fSJeeja KP skl_tplg_update_params(out_fmt, params, out_fixup); 216f7590d4fSJeeja KP } 217f7590d4fSJeeja KP 218f7590d4fSJeeja KP /* 219f7590d4fSJeeja KP * A module needs input and output buffers, which are dependent upon pcm 220f7590d4fSJeeja KP * params, so once we have calculate params, we need buffer calculation as 221f7590d4fSJeeja KP * well. 222f7590d4fSJeeja KP */ 223f7590d4fSJeeja KP static void skl_tplg_update_buffer_size(struct skl_sst *ctx, 224f7590d4fSJeeja KP struct skl_module_cfg *mcfg) 225f7590d4fSJeeja KP { 226f7590d4fSJeeja KP int multiplier = 1; 2274cd9899fSHardik T Shah struct skl_module_fmt *in_fmt, *out_fmt; 2284cd9899fSHardik T Shah 2294cd9899fSHardik T Shah 2304cd9899fSHardik T Shah /* Since fixups is applied to pin 0 only, ibs, obs needs 2314cd9899fSHardik T Shah * change for pin 0 only 2324cd9899fSHardik T Shah */ 2334cd9899fSHardik T Shah in_fmt = &mcfg->in_fmt[0]; 2344cd9899fSHardik T Shah out_fmt = &mcfg->out_fmt[0]; 235f7590d4fSJeeja KP 236f7590d4fSJeeja KP if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT) 237f7590d4fSJeeja KP multiplier = 5; 2384cd9899fSHardik T Shah mcfg->ibs = (in_fmt->s_freq / 1000) * 2394cd9899fSHardik T Shah (mcfg->in_fmt->channels) * 2404cd9899fSHardik T Shah (mcfg->in_fmt->bit_depth >> 3) * 241f7590d4fSJeeja KP multiplier; 242f7590d4fSJeeja KP 2434cd9899fSHardik T Shah mcfg->obs = (mcfg->out_fmt->s_freq / 1000) * 2444cd9899fSHardik T Shah (mcfg->out_fmt->channels) * 2454cd9899fSHardik T Shah (mcfg->out_fmt->bit_depth >> 3) * 246f7590d4fSJeeja KP multiplier; 247f7590d4fSJeeja KP } 248f7590d4fSJeeja KP 249f7590d4fSJeeja KP static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, 250f7590d4fSJeeja KP struct skl_sst *ctx) 251f7590d4fSJeeja KP { 252f7590d4fSJeeja KP struct skl_module_cfg *m_cfg = w->priv; 253f7590d4fSJeeja KP struct skl_pipe_params *params = m_cfg->pipe->p_params; 254f7590d4fSJeeja KP int p_conn_type = m_cfg->pipe->conn_type; 255f7590d4fSJeeja KP bool is_fe; 256f7590d4fSJeeja KP 257f7590d4fSJeeja KP if (!m_cfg->params_fixup) 258f7590d4fSJeeja KP return; 259f7590d4fSJeeja KP 260f7590d4fSJeeja KP dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n", 261f7590d4fSJeeja KP w->name); 262f7590d4fSJeeja KP 263f7590d4fSJeeja KP skl_dump_mconfig(ctx, m_cfg); 264f7590d4fSJeeja KP 265f7590d4fSJeeja KP if (p_conn_type == SKL_PIPE_CONN_TYPE_FE) 266f7590d4fSJeeja KP is_fe = true; 267f7590d4fSJeeja KP else 268f7590d4fSJeeja KP is_fe = false; 269f7590d4fSJeeja KP 270f7590d4fSJeeja KP skl_tplg_update_params_fixup(m_cfg, params, is_fe); 271f7590d4fSJeeja KP skl_tplg_update_buffer_size(ctx, m_cfg); 272f7590d4fSJeeja KP 273f7590d4fSJeeja KP dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n", 274f7590d4fSJeeja KP w->name); 275f7590d4fSJeeja KP 276f7590d4fSJeeja KP skl_dump_mconfig(ctx, m_cfg); 277f7590d4fSJeeja KP } 278f7590d4fSJeeja KP 279e4e2d2f4SJeeja KP /* 280e4e2d2f4SJeeja KP * A pipe can have multiple modules, each of them will be a DAPM widget as 281e4e2d2f4SJeeja KP * well. While managing a pipeline we need to get the list of all the 282e4e2d2f4SJeeja KP * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps 283e4e2d2f4SJeeja KP * to get the SKL type widgets in that pipeline 284e4e2d2f4SJeeja KP */ 285e4e2d2f4SJeeja KP static int skl_tplg_alloc_pipe_widget(struct device *dev, 286e4e2d2f4SJeeja KP struct snd_soc_dapm_widget *w, struct skl_pipe *pipe) 287e4e2d2f4SJeeja KP { 288e4e2d2f4SJeeja KP struct skl_module_cfg *src_module = NULL; 289e4e2d2f4SJeeja KP struct snd_soc_dapm_path *p = NULL; 290e4e2d2f4SJeeja KP struct skl_pipe_module *p_module = NULL; 291e4e2d2f4SJeeja KP 292e4e2d2f4SJeeja KP p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL); 293e4e2d2f4SJeeja KP if (!p_module) 294e4e2d2f4SJeeja KP return -ENOMEM; 295e4e2d2f4SJeeja KP 296e4e2d2f4SJeeja KP p_module->w = w; 297e4e2d2f4SJeeja KP list_add_tail(&p_module->node, &pipe->w_list); 298e4e2d2f4SJeeja KP 299e4e2d2f4SJeeja KP snd_soc_dapm_widget_for_each_sink_path(w, p) { 300e4e2d2f4SJeeja KP if ((p->sink->priv == NULL) 301e4e2d2f4SJeeja KP && (!is_skl_dsp_widget_type(w))) 302e4e2d2f4SJeeja KP continue; 303e4e2d2f4SJeeja KP 304e4e2d2f4SJeeja KP if ((p->sink->priv != NULL) && p->connect 305e4e2d2f4SJeeja KP && is_skl_dsp_widget_type(p->sink)) { 306e4e2d2f4SJeeja KP 307e4e2d2f4SJeeja KP src_module = p->sink->priv; 308e4e2d2f4SJeeja KP if (pipe->ppl_id == src_module->pipe->ppl_id) 309e4e2d2f4SJeeja KP skl_tplg_alloc_pipe_widget(dev, 310e4e2d2f4SJeeja KP p->sink, pipe); 311e4e2d2f4SJeeja KP } 312e4e2d2f4SJeeja KP } 313e4e2d2f4SJeeja KP return 0; 314e4e2d2f4SJeeja KP } 315e4e2d2f4SJeeja KP 316e4e2d2f4SJeeja KP /* 317e4e2d2f4SJeeja KP * Inside a pipe instance, we can have various modules. These modules need 318e4e2d2f4SJeeja KP * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by 319e4e2d2f4SJeeja KP * skl_init_module() routine, so invoke that for all modules in a pipeline 320e4e2d2f4SJeeja KP */ 321e4e2d2f4SJeeja KP static int 322e4e2d2f4SJeeja KP skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe) 323e4e2d2f4SJeeja KP { 324e4e2d2f4SJeeja KP struct skl_pipe_module *w_module; 325e4e2d2f4SJeeja KP struct snd_soc_dapm_widget *w; 326e4e2d2f4SJeeja KP struct skl_module_cfg *mconfig; 327e4e2d2f4SJeeja KP struct skl_sst *ctx = skl->skl_sst; 328e4e2d2f4SJeeja KP int ret = 0; 329e4e2d2f4SJeeja KP 330e4e2d2f4SJeeja KP list_for_each_entry(w_module, &pipe->w_list, node) { 331e4e2d2f4SJeeja KP w = w_module->w; 332e4e2d2f4SJeeja KP mconfig = w->priv; 333e4e2d2f4SJeeja KP 334e4e2d2f4SJeeja KP /* check resource available */ 335e4e2d2f4SJeeja KP if (!skl_tplg_alloc_pipe_mcps(skl, mconfig)) 336e4e2d2f4SJeeja KP return -ENOMEM; 337e4e2d2f4SJeeja KP 338f7590d4fSJeeja KP /* 339f7590d4fSJeeja KP * apply fix/conversion to module params based on 340f7590d4fSJeeja KP * FE/BE params 341f7590d4fSJeeja KP */ 342f7590d4fSJeeja KP skl_tplg_update_module_params(w, ctx); 343e4e2d2f4SJeeja KP ret = skl_init_module(ctx, mconfig, NULL); 344e4e2d2f4SJeeja KP if (ret < 0) 345e4e2d2f4SJeeja KP return ret; 346e4e2d2f4SJeeja KP } 347e4e2d2f4SJeeja KP 348e4e2d2f4SJeeja KP return 0; 349e4e2d2f4SJeeja KP } 350d93f8e55SVinod Koul 351d93f8e55SVinod Koul /* 352d93f8e55SVinod Koul * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we 353d93f8e55SVinod Koul * need create the pipeline. So we do following: 354d93f8e55SVinod Koul * - check the resources 355d93f8e55SVinod Koul * - Create the pipeline 356d93f8e55SVinod Koul * - Initialize the modules in pipeline 357d93f8e55SVinod Koul * - finally bind all modules together 358d93f8e55SVinod Koul */ 359d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, 360d93f8e55SVinod Koul struct skl *skl) 361d93f8e55SVinod Koul { 362d93f8e55SVinod Koul int ret; 363d93f8e55SVinod Koul struct skl_module_cfg *mconfig = w->priv; 364d93f8e55SVinod Koul struct skl_pipe_module *w_module; 365d93f8e55SVinod Koul struct skl_pipe *s_pipe = mconfig->pipe; 366d93f8e55SVinod Koul struct skl_module_cfg *src_module = NULL, *dst_module; 367d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 368d93f8e55SVinod Koul 369d93f8e55SVinod Koul /* check resource available */ 370d93f8e55SVinod Koul if (!skl_tplg_alloc_pipe_mcps(skl, mconfig)) 371d93f8e55SVinod Koul return -EBUSY; 372d93f8e55SVinod Koul 373d93f8e55SVinod Koul if (!skl_tplg_alloc_pipe_mem(skl, mconfig)) 374d93f8e55SVinod Koul return -ENOMEM; 375d93f8e55SVinod Koul 376d93f8e55SVinod Koul /* 377d93f8e55SVinod Koul * Create a list of modules for pipe. 378d93f8e55SVinod Koul * This list contains modules from source to sink 379d93f8e55SVinod Koul */ 380d93f8e55SVinod Koul ret = skl_create_pipeline(ctx, mconfig->pipe); 381d93f8e55SVinod Koul if (ret < 0) 382d93f8e55SVinod Koul return ret; 383d93f8e55SVinod Koul 384d93f8e55SVinod Koul /* 385d93f8e55SVinod Koul * we create a w_list of all widgets in that pipe. This list is not 386d93f8e55SVinod Koul * freed on PMD event as widgets within a pipe are static. This 387d93f8e55SVinod Koul * saves us cycles to get widgets in pipe every time. 388d93f8e55SVinod Koul * 389d93f8e55SVinod Koul * So if we have already initialized all the widgets of a pipeline 390d93f8e55SVinod Koul * we skip, so check for list_empty and create the list if empty 391d93f8e55SVinod Koul */ 392d93f8e55SVinod Koul if (list_empty(&s_pipe->w_list)) { 393d93f8e55SVinod Koul ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe); 394d93f8e55SVinod Koul if (ret < 0) 395d93f8e55SVinod Koul return ret; 396d93f8e55SVinod Koul } 397d93f8e55SVinod Koul 398d93f8e55SVinod Koul /* Init all pipe modules from source to sink */ 399d93f8e55SVinod Koul ret = skl_tplg_init_pipe_modules(skl, s_pipe); 400d93f8e55SVinod Koul if (ret < 0) 401d93f8e55SVinod Koul return ret; 402d93f8e55SVinod Koul 403d93f8e55SVinod Koul /* Bind modules from source to sink */ 404d93f8e55SVinod Koul list_for_each_entry(w_module, &s_pipe->w_list, node) { 405d93f8e55SVinod Koul dst_module = w_module->w->priv; 406d93f8e55SVinod Koul 407d93f8e55SVinod Koul if (src_module == NULL) { 408d93f8e55SVinod Koul src_module = dst_module; 409d93f8e55SVinod Koul continue; 410d93f8e55SVinod Koul } 411d93f8e55SVinod Koul 412d93f8e55SVinod Koul ret = skl_bind_modules(ctx, src_module, dst_module); 413d93f8e55SVinod Koul if (ret < 0) 414d93f8e55SVinod Koul return ret; 415d93f8e55SVinod Koul 416d93f8e55SVinod Koul src_module = dst_module; 417d93f8e55SVinod Koul } 418d93f8e55SVinod Koul 419d93f8e55SVinod Koul return 0; 420d93f8e55SVinod Koul } 421d93f8e55SVinod Koul 4228724ff17SJeeja KP static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, 4238724ff17SJeeja KP struct skl *skl, 4248724ff17SJeeja KP struct skl_module_cfg *src_mconfig) 425d93f8e55SVinod Koul { 426d93f8e55SVinod Koul struct snd_soc_dapm_path *p; 4270ed95d76SJeeja KP struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL; 4288724ff17SJeeja KP struct skl_module_cfg *sink_mconfig; 429d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 4308724ff17SJeeja KP int ret; 431d93f8e55SVinod Koul 4328724ff17SJeeja KP snd_soc_dapm_widget_for_each_sink_path(w, p) { 433d93f8e55SVinod Koul if (!p->connect) 434d93f8e55SVinod Koul continue; 435d93f8e55SVinod Koul 436d93f8e55SVinod Koul dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name); 437d93f8e55SVinod Koul dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name); 438d93f8e55SVinod Koul 4390ed95d76SJeeja KP next_sink = p->sink; 440d93f8e55SVinod Koul /* 441d93f8e55SVinod Koul * here we will check widgets in sink pipelines, so that 442d93f8e55SVinod Koul * can be any widgets type and we are only interested if 443d93f8e55SVinod Koul * they are ones used for SKL so check that first 444d93f8e55SVinod Koul */ 445d93f8e55SVinod Koul if ((p->sink->priv != NULL) && 446d93f8e55SVinod Koul is_skl_dsp_widget_type(p->sink)) { 447d93f8e55SVinod Koul 448d93f8e55SVinod Koul sink = p->sink; 449d93f8e55SVinod Koul sink_mconfig = sink->priv; 450d93f8e55SVinod Koul 451d93f8e55SVinod Koul /* Bind source to sink, mixin is always source */ 452d93f8e55SVinod Koul ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); 453d93f8e55SVinod Koul if (ret) 454d93f8e55SVinod Koul return ret; 455d93f8e55SVinod Koul 456d93f8e55SVinod Koul /* Start sinks pipe first */ 457d93f8e55SVinod Koul if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { 458d1730c3dSJeeja KP if (sink_mconfig->pipe->conn_type != 459d1730c3dSJeeja KP SKL_PIPE_CONN_TYPE_FE) 460d1730c3dSJeeja KP ret = skl_run_pipe(ctx, 461d1730c3dSJeeja KP sink_mconfig->pipe); 462d93f8e55SVinod Koul if (ret) 463d93f8e55SVinod Koul return ret; 464d93f8e55SVinod Koul } 465d93f8e55SVinod Koul } 466d93f8e55SVinod Koul } 467d93f8e55SVinod Koul 4688724ff17SJeeja KP if (!sink) 4690ed95d76SJeeja KP return skl_tplg_bind_sinks(next_sink, skl, src_mconfig); 4708724ff17SJeeja KP 4718724ff17SJeeja KP return 0; 4728724ff17SJeeja KP } 4738724ff17SJeeja KP 4748724ff17SJeeja KP /* 4758724ff17SJeeja KP * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA 4768724ff17SJeeja KP * we need to do following: 4778724ff17SJeeja KP * - Bind to sink pipeline 4788724ff17SJeeja KP * Since the sink pipes can be running and we don't get mixer event on 4798724ff17SJeeja KP * connect for already running mixer, we need to find the sink pipes 4808724ff17SJeeja KP * here and bind to them. This way dynamic connect works. 4818724ff17SJeeja KP * - Start sink pipeline, if not running 4828724ff17SJeeja KP * - Then run current pipe 4838724ff17SJeeja KP */ 4848724ff17SJeeja KP static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, 4858724ff17SJeeja KP struct skl *skl) 4868724ff17SJeeja KP { 4878724ff17SJeeja KP struct skl_module_cfg *src_mconfig; 4888724ff17SJeeja KP struct skl_sst *ctx = skl->skl_sst; 4898724ff17SJeeja KP int ret = 0; 4908724ff17SJeeja KP 4918724ff17SJeeja KP src_mconfig = w->priv; 4928724ff17SJeeja KP 4938724ff17SJeeja KP /* 4948724ff17SJeeja KP * find which sink it is connected to, bind with the sink, 4958724ff17SJeeja KP * if sink is not started, start sink pipe first, then start 4968724ff17SJeeja KP * this pipe 4978724ff17SJeeja KP */ 4988724ff17SJeeja KP ret = skl_tplg_bind_sinks(w, skl, src_mconfig); 4998724ff17SJeeja KP if (ret) 5008724ff17SJeeja KP return ret; 5018724ff17SJeeja KP 502d93f8e55SVinod Koul /* Start source pipe last after starting all sinks */ 503d1730c3dSJeeja KP if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) 504d1730c3dSJeeja KP return skl_run_pipe(ctx, src_mconfig->pipe); 505d93f8e55SVinod Koul 506d93f8e55SVinod Koul return 0; 507d93f8e55SVinod Koul } 508d93f8e55SVinod Koul 5098724ff17SJeeja KP static struct snd_soc_dapm_widget *skl_get_src_dsp_widget( 5108724ff17SJeeja KP struct snd_soc_dapm_widget *w, struct skl *skl) 5118724ff17SJeeja KP { 5128724ff17SJeeja KP struct snd_soc_dapm_path *p; 5138724ff17SJeeja KP struct snd_soc_dapm_widget *src_w = NULL; 5148724ff17SJeeja KP struct skl_sst *ctx = skl->skl_sst; 5158724ff17SJeeja KP 5168724ff17SJeeja KP snd_soc_dapm_widget_for_each_source_path(w, p) { 5178724ff17SJeeja KP src_w = p->source; 5188724ff17SJeeja KP if (!p->connect) 5198724ff17SJeeja KP continue; 5208724ff17SJeeja KP 5218724ff17SJeeja KP dev_dbg(ctx->dev, "sink widget=%s\n", w->name); 5228724ff17SJeeja KP dev_dbg(ctx->dev, "src widget=%s\n", p->source->name); 5238724ff17SJeeja KP 5248724ff17SJeeja KP /* 5258724ff17SJeeja KP * here we will check widgets in sink pipelines, so that can 5268724ff17SJeeja KP * be any widgets type and we are only interested if they are 5278724ff17SJeeja KP * ones used for SKL so check that first 5288724ff17SJeeja KP */ 5298724ff17SJeeja KP if ((p->source->priv != NULL) && 5308724ff17SJeeja KP is_skl_dsp_widget_type(p->source)) { 5318724ff17SJeeja KP return p->source; 5328724ff17SJeeja KP } 5338724ff17SJeeja KP } 5348724ff17SJeeja KP 5358724ff17SJeeja KP if (src_w != NULL) 5368724ff17SJeeja KP return skl_get_src_dsp_widget(src_w, skl); 5378724ff17SJeeja KP 5388724ff17SJeeja KP return NULL; 5398724ff17SJeeja KP } 5408724ff17SJeeja KP 541d93f8e55SVinod Koul /* 542d93f8e55SVinod Koul * in the Post-PMU event of mixer we need to do following: 543d93f8e55SVinod Koul * - Check if this pipe is running 544d93f8e55SVinod Koul * - if not, then 545d93f8e55SVinod Koul * - bind this pipeline to its source pipeline 546d93f8e55SVinod Koul * if source pipe is already running, this means it is a dynamic 547d93f8e55SVinod Koul * connection and we need to bind only to that pipe 548d93f8e55SVinod Koul * - start this pipeline 549d93f8e55SVinod Koul */ 550d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w, 551d93f8e55SVinod Koul struct skl *skl) 552d93f8e55SVinod Koul { 553d93f8e55SVinod Koul int ret = 0; 554d93f8e55SVinod Koul struct snd_soc_dapm_widget *source, *sink; 555d93f8e55SVinod Koul struct skl_module_cfg *src_mconfig, *sink_mconfig; 556d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 557d93f8e55SVinod Koul int src_pipe_started = 0; 558d93f8e55SVinod Koul 559d93f8e55SVinod Koul sink = w; 560d93f8e55SVinod Koul sink_mconfig = sink->priv; 561d93f8e55SVinod Koul 562d93f8e55SVinod Koul /* 563d93f8e55SVinod Koul * If source pipe is already started, that means source is driving 564d93f8e55SVinod Koul * one more sink before this sink got connected, Since source is 565d93f8e55SVinod Koul * started, bind this sink to source and start this pipe. 566d93f8e55SVinod Koul */ 5678724ff17SJeeja KP source = skl_get_src_dsp_widget(w, skl); 5688724ff17SJeeja KP if (source != NULL) { 569d93f8e55SVinod Koul src_mconfig = source->priv; 570d93f8e55SVinod Koul sink_mconfig = sink->priv; 571d93f8e55SVinod Koul src_pipe_started = 1; 572d93f8e55SVinod Koul 573d93f8e55SVinod Koul /* 5748724ff17SJeeja KP * check pipe state, then no need to bind or start the 5758724ff17SJeeja KP * pipe 576d93f8e55SVinod Koul */ 577d93f8e55SVinod Koul if (src_mconfig->pipe->state != SKL_PIPE_STARTED) 578d93f8e55SVinod Koul src_pipe_started = 0; 579d93f8e55SVinod Koul } 580d93f8e55SVinod Koul 581d93f8e55SVinod Koul if (src_pipe_started) { 582d93f8e55SVinod Koul ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); 583d93f8e55SVinod Koul if (ret) 584d93f8e55SVinod Koul return ret; 585d93f8e55SVinod Koul 586d1730c3dSJeeja KP if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) 587d93f8e55SVinod Koul ret = skl_run_pipe(ctx, sink_mconfig->pipe); 588d93f8e55SVinod Koul } 589d93f8e55SVinod Koul 590d93f8e55SVinod Koul return ret; 591d93f8e55SVinod Koul } 592d93f8e55SVinod Koul 593d93f8e55SVinod Koul /* 594d93f8e55SVinod Koul * in the Pre-PMD event of mixer we need to do following: 595d93f8e55SVinod Koul * - Stop the pipe 596d93f8e55SVinod Koul * - find the source connections and remove that from dapm_path_list 597d93f8e55SVinod Koul * - unbind with source pipelines if still connected 598d93f8e55SVinod Koul */ 599d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w, 600d93f8e55SVinod Koul struct skl *skl) 601d93f8e55SVinod Koul { 602d93f8e55SVinod Koul struct skl_module_cfg *src_mconfig, *sink_mconfig; 603ce1b5551SJeeja KP int ret = 0, i; 604d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 605d93f8e55SVinod Koul 606ce1b5551SJeeja KP sink_mconfig = w->priv; 607d93f8e55SVinod Koul 608d93f8e55SVinod Koul /* Stop the pipe */ 609d93f8e55SVinod Koul ret = skl_stop_pipe(ctx, sink_mconfig->pipe); 610d93f8e55SVinod Koul if (ret) 611d93f8e55SVinod Koul return ret; 612d93f8e55SVinod Koul 613ce1b5551SJeeja KP for (i = 0; i < sink_mconfig->max_in_queue; i++) { 614ce1b5551SJeeja KP if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) { 615ce1b5551SJeeja KP src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg; 616ce1b5551SJeeja KP if (!src_mconfig) 617ce1b5551SJeeja KP continue; 618d93f8e55SVinod Koul /* 619ce1b5551SJeeja KP * If path_found == 1, that means pmd for source 620ce1b5551SJeeja KP * pipe has not occurred, source is connected to 621ce1b5551SJeeja KP * some other sink. so its responsibility of sink 622ce1b5551SJeeja KP * to unbind itself from source. 623d93f8e55SVinod Koul */ 624d93f8e55SVinod Koul ret = skl_stop_pipe(ctx, src_mconfig->pipe); 625d93f8e55SVinod Koul if (ret < 0) 626d93f8e55SVinod Koul return ret; 627d93f8e55SVinod Koul 628ce1b5551SJeeja KP ret = skl_unbind_modules(ctx, 629ce1b5551SJeeja KP src_mconfig, sink_mconfig); 630ce1b5551SJeeja KP } 631d93f8e55SVinod Koul } 632d93f8e55SVinod Koul 633d93f8e55SVinod Koul return ret; 634d93f8e55SVinod Koul } 635d93f8e55SVinod Koul 636d93f8e55SVinod Koul /* 637d93f8e55SVinod Koul * in the Post-PMD event of mixer we need to do following: 638d93f8e55SVinod Koul * - Free the mcps used 639d93f8e55SVinod Koul * - Free the mem used 640d93f8e55SVinod Koul * - Unbind the modules within the pipeline 641d93f8e55SVinod Koul * - Delete the pipeline (modules are not required to be explicitly 642d93f8e55SVinod Koul * deleted, pipeline delete is enough here 643d93f8e55SVinod Koul */ 644d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, 645d93f8e55SVinod Koul struct skl *skl) 646d93f8e55SVinod Koul { 647d93f8e55SVinod Koul struct skl_module_cfg *mconfig = w->priv; 648d93f8e55SVinod Koul struct skl_pipe_module *w_module; 649d93f8e55SVinod Koul struct skl_module_cfg *src_module = NULL, *dst_module; 650d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 651d93f8e55SVinod Koul struct skl_pipe *s_pipe = mconfig->pipe; 652d93f8e55SVinod Koul int ret = 0; 653d93f8e55SVinod Koul 654d93f8e55SVinod Koul skl_tplg_free_pipe_mcps(skl, mconfig); 655*65976878SVinod Koul skl_tplg_free_pipe_mem(skl, mconfig); 656d93f8e55SVinod Koul 657d93f8e55SVinod Koul list_for_each_entry(w_module, &s_pipe->w_list, node) { 658d93f8e55SVinod Koul dst_module = w_module->w->priv; 659d93f8e55SVinod Koul 6607ae3cb15SVinod Koul skl_tplg_free_pipe_mcps(skl, dst_module); 661d93f8e55SVinod Koul if (src_module == NULL) { 662d93f8e55SVinod Koul src_module = dst_module; 663d93f8e55SVinod Koul continue; 664d93f8e55SVinod Koul } 665d93f8e55SVinod Koul 666d93f8e55SVinod Koul ret = skl_unbind_modules(ctx, src_module, dst_module); 667d93f8e55SVinod Koul if (ret < 0) 668d93f8e55SVinod Koul return ret; 669d93f8e55SVinod Koul 670d93f8e55SVinod Koul src_module = dst_module; 671d93f8e55SVinod Koul } 672d93f8e55SVinod Koul 673d93f8e55SVinod Koul ret = skl_delete_pipe(ctx, mconfig->pipe); 674d93f8e55SVinod Koul 675d93f8e55SVinod Koul return ret; 676d93f8e55SVinod Koul } 677d93f8e55SVinod Koul 678d93f8e55SVinod Koul /* 679d93f8e55SVinod Koul * in the Post-PMD event of PGA we need to do following: 680d93f8e55SVinod Koul * - Free the mcps used 681d93f8e55SVinod Koul * - Stop the pipeline 682d93f8e55SVinod Koul * - In source pipe is connected, unbind with source pipelines 683d93f8e55SVinod Koul */ 684d93f8e55SVinod Koul static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, 685d93f8e55SVinod Koul struct skl *skl) 686d93f8e55SVinod Koul { 687d93f8e55SVinod Koul struct skl_module_cfg *src_mconfig, *sink_mconfig; 688ce1b5551SJeeja KP int ret = 0, i; 689d93f8e55SVinod Koul struct skl_sst *ctx = skl->skl_sst; 690d93f8e55SVinod Koul 691ce1b5551SJeeja KP src_mconfig = w->priv; 692d93f8e55SVinod Koul 693d93f8e55SVinod Koul /* Stop the pipe since this is a mixin module */ 694d93f8e55SVinod Koul ret = skl_stop_pipe(ctx, src_mconfig->pipe); 695d93f8e55SVinod Koul if (ret) 696d93f8e55SVinod Koul return ret; 697d93f8e55SVinod Koul 698ce1b5551SJeeja KP for (i = 0; i < src_mconfig->max_out_queue; i++) { 699ce1b5551SJeeja KP if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) { 700ce1b5551SJeeja KP sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg; 701ce1b5551SJeeja KP if (!sink_mconfig) 702ce1b5551SJeeja KP continue; 703d93f8e55SVinod Koul /* 704ce1b5551SJeeja KP * This is a connecter and if path is found that means 705d93f8e55SVinod Koul * unbind between source and sink has not happened yet 706d93f8e55SVinod Koul */ 707ce1b5551SJeeja KP ret = skl_stop_pipe(ctx, sink_mconfig->pipe); 708d93f8e55SVinod Koul if (ret < 0) 709d93f8e55SVinod Koul return ret; 710ce1b5551SJeeja KP ret = skl_unbind_modules(ctx, src_mconfig, 711ce1b5551SJeeja KP sink_mconfig); 712ce1b5551SJeeja KP } 713d93f8e55SVinod Koul } 714d93f8e55SVinod Koul 715d93f8e55SVinod Koul return ret; 716d93f8e55SVinod Koul } 717d93f8e55SVinod Koul 718d93f8e55SVinod Koul /* 719d93f8e55SVinod Koul * In modelling, we assume there will be ONLY one mixer in a pipeline. If 720d93f8e55SVinod Koul * mixer is not required then it is treated as static mixer aka vmixer with 721d93f8e55SVinod Koul * a hard path to source module 722d93f8e55SVinod Koul * So we don't need to check if source is started or not as hard path puts 723d93f8e55SVinod Koul * dependency on each other 724d93f8e55SVinod Koul */ 725d93f8e55SVinod Koul static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w, 726d93f8e55SVinod Koul struct snd_kcontrol *k, int event) 727d93f8e55SVinod Koul { 728d93f8e55SVinod Koul struct snd_soc_dapm_context *dapm = w->dapm; 729d93f8e55SVinod Koul struct skl *skl = get_skl_ctx(dapm->dev); 730d93f8e55SVinod Koul 731d93f8e55SVinod Koul switch (event) { 732d93f8e55SVinod Koul case SND_SOC_DAPM_PRE_PMU: 733d93f8e55SVinod Koul return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); 734d93f8e55SVinod Koul 735d93f8e55SVinod Koul case SND_SOC_DAPM_POST_PMD: 736d93f8e55SVinod Koul return skl_tplg_mixer_dapm_post_pmd_event(w, skl); 737d93f8e55SVinod Koul } 738d93f8e55SVinod Koul 739d93f8e55SVinod Koul return 0; 740d93f8e55SVinod Koul } 741d93f8e55SVinod Koul 742d93f8e55SVinod Koul /* 743d93f8e55SVinod Koul * In modelling, we assume there will be ONLY one mixer in a pipeline. If a 744d93f8e55SVinod Koul * second one is required that is created as another pipe entity. 745d93f8e55SVinod Koul * The mixer is responsible for pipe management and represent a pipeline 746d93f8e55SVinod Koul * instance 747d93f8e55SVinod Koul */ 748d93f8e55SVinod Koul static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w, 749d93f8e55SVinod Koul struct snd_kcontrol *k, int event) 750d93f8e55SVinod Koul { 751d93f8e55SVinod Koul struct snd_soc_dapm_context *dapm = w->dapm; 752d93f8e55SVinod Koul struct skl *skl = get_skl_ctx(dapm->dev); 753d93f8e55SVinod Koul 754d93f8e55SVinod Koul switch (event) { 755d93f8e55SVinod Koul case SND_SOC_DAPM_PRE_PMU: 756d93f8e55SVinod Koul return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); 757d93f8e55SVinod Koul 758d93f8e55SVinod Koul case SND_SOC_DAPM_POST_PMU: 759d93f8e55SVinod Koul return skl_tplg_mixer_dapm_post_pmu_event(w, skl); 760d93f8e55SVinod Koul 761d93f8e55SVinod Koul case SND_SOC_DAPM_PRE_PMD: 762d93f8e55SVinod Koul return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); 763d93f8e55SVinod Koul 764d93f8e55SVinod Koul case SND_SOC_DAPM_POST_PMD: 765d93f8e55SVinod Koul return skl_tplg_mixer_dapm_post_pmd_event(w, skl); 766d93f8e55SVinod Koul } 767d93f8e55SVinod Koul 768d93f8e55SVinod Koul return 0; 769d93f8e55SVinod Koul } 770d93f8e55SVinod Koul 771d93f8e55SVinod Koul /* 772d93f8e55SVinod Koul * In modelling, we assumed rest of the modules in pipeline are PGA. But we 773d93f8e55SVinod Koul * are interested in last PGA (leaf PGA) in a pipeline to disconnect with 774d93f8e55SVinod Koul * the sink when it is running (two FE to one BE or one FE to two BE) 775d93f8e55SVinod Koul * scenarios 776d93f8e55SVinod Koul */ 777d93f8e55SVinod Koul static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w, 778d93f8e55SVinod Koul struct snd_kcontrol *k, int event) 779d93f8e55SVinod Koul 780d93f8e55SVinod Koul { 781d93f8e55SVinod Koul struct snd_soc_dapm_context *dapm = w->dapm; 782d93f8e55SVinod Koul struct skl *skl = get_skl_ctx(dapm->dev); 783d93f8e55SVinod Koul 784d93f8e55SVinod Koul switch (event) { 785d93f8e55SVinod Koul case SND_SOC_DAPM_PRE_PMU: 786d93f8e55SVinod Koul return skl_tplg_pga_dapm_pre_pmu_event(w, skl); 787d93f8e55SVinod Koul 788d93f8e55SVinod Koul case SND_SOC_DAPM_POST_PMD: 789d93f8e55SVinod Koul return skl_tplg_pga_dapm_post_pmd_event(w, skl); 790d93f8e55SVinod Koul } 791d93f8e55SVinod Koul 792d93f8e55SVinod Koul return 0; 793d93f8e55SVinod Koul } 794cfb0a873SVinod Koul 795cfb0a873SVinod Koul /* 796cfb0a873SVinod Koul * The FE params are passed by hw_params of the DAI. 797cfb0a873SVinod Koul * On hw_params, the params are stored in Gateway module of the FE and we 798cfb0a873SVinod Koul * need to calculate the format in DSP module configuration, that 799cfb0a873SVinod Koul * conversion is done here 800cfb0a873SVinod Koul */ 801cfb0a873SVinod Koul int skl_tplg_update_pipe_params(struct device *dev, 802cfb0a873SVinod Koul struct skl_module_cfg *mconfig, 803cfb0a873SVinod Koul struct skl_pipe_params *params) 804cfb0a873SVinod Koul { 805cfb0a873SVinod Koul struct skl_pipe *pipe = mconfig->pipe; 806cfb0a873SVinod Koul struct skl_module_fmt *format = NULL; 807cfb0a873SVinod Koul 808cfb0a873SVinod Koul memcpy(pipe->p_params, params, sizeof(*params)); 809cfb0a873SVinod Koul 810cfb0a873SVinod Koul if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) 8114cd9899fSHardik T Shah format = &mconfig->in_fmt[0]; 812cfb0a873SVinod Koul else 8134cd9899fSHardik T Shah format = &mconfig->out_fmt[0]; 814cfb0a873SVinod Koul 815cfb0a873SVinod Koul /* set the hw_params */ 816cfb0a873SVinod Koul format->s_freq = params->s_freq; 817cfb0a873SVinod Koul format->channels = params->ch; 818cfb0a873SVinod Koul format->valid_bit_depth = skl_get_bit_depth(params->s_fmt); 819cfb0a873SVinod Koul 820cfb0a873SVinod Koul /* 821cfb0a873SVinod Koul * 16 bit is 16 bit container whereas 24 bit is in 32 bit 822cfb0a873SVinod Koul * container so update bit depth accordingly 823cfb0a873SVinod Koul */ 824cfb0a873SVinod Koul switch (format->valid_bit_depth) { 825cfb0a873SVinod Koul case SKL_DEPTH_16BIT: 826cfb0a873SVinod Koul format->bit_depth = format->valid_bit_depth; 827cfb0a873SVinod Koul break; 828cfb0a873SVinod Koul 829cfb0a873SVinod Koul case SKL_DEPTH_24BIT: 8306654f39eSJeeja KP case SKL_DEPTH_32BIT: 831cfb0a873SVinod Koul format->bit_depth = SKL_DEPTH_32BIT; 832cfb0a873SVinod Koul break; 833cfb0a873SVinod Koul 834cfb0a873SVinod Koul default: 835cfb0a873SVinod Koul dev_err(dev, "Invalid bit depth %x for pipe\n", 836cfb0a873SVinod Koul format->valid_bit_depth); 837cfb0a873SVinod Koul return -EINVAL; 838cfb0a873SVinod Koul } 839cfb0a873SVinod Koul 840cfb0a873SVinod Koul if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 841cfb0a873SVinod Koul mconfig->ibs = (format->s_freq / 1000) * 842cfb0a873SVinod Koul (format->channels) * 843cfb0a873SVinod Koul (format->bit_depth >> 3); 844cfb0a873SVinod Koul } else { 845cfb0a873SVinod Koul mconfig->obs = (format->s_freq / 1000) * 846cfb0a873SVinod Koul (format->channels) * 847cfb0a873SVinod Koul (format->bit_depth >> 3); 848cfb0a873SVinod Koul } 849cfb0a873SVinod Koul 850cfb0a873SVinod Koul return 0; 851cfb0a873SVinod Koul } 852cfb0a873SVinod Koul 853cfb0a873SVinod Koul /* 854cfb0a873SVinod Koul * Query the module config for the FE DAI 855cfb0a873SVinod Koul * This is used to find the hw_params set for that DAI and apply to FE 856cfb0a873SVinod Koul * pipeline 857cfb0a873SVinod Koul */ 858cfb0a873SVinod Koul struct skl_module_cfg * 859cfb0a873SVinod Koul skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) 860cfb0a873SVinod Koul { 861cfb0a873SVinod Koul struct snd_soc_dapm_widget *w; 862cfb0a873SVinod Koul struct snd_soc_dapm_path *p = NULL; 863cfb0a873SVinod Koul 864cfb0a873SVinod Koul if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 865cfb0a873SVinod Koul w = dai->playback_widget; 866f0900eb2SSubhransu S. Prusty snd_soc_dapm_widget_for_each_sink_path(w, p) { 867cfb0a873SVinod Koul if (p->connect && p->sink->power && 868a28f51dbSJeeja KP !is_skl_dsp_widget_type(p->sink)) 869cfb0a873SVinod Koul continue; 870cfb0a873SVinod Koul 871cfb0a873SVinod Koul if (p->sink->priv) { 872cfb0a873SVinod Koul dev_dbg(dai->dev, "set params for %s\n", 873cfb0a873SVinod Koul p->sink->name); 874cfb0a873SVinod Koul return p->sink->priv; 875cfb0a873SVinod Koul } 876cfb0a873SVinod Koul } 877cfb0a873SVinod Koul } else { 878cfb0a873SVinod Koul w = dai->capture_widget; 879f0900eb2SSubhransu S. Prusty snd_soc_dapm_widget_for_each_source_path(w, p) { 880cfb0a873SVinod Koul if (p->connect && p->source->power && 881a28f51dbSJeeja KP !is_skl_dsp_widget_type(p->source)) 882cfb0a873SVinod Koul continue; 883cfb0a873SVinod Koul 884cfb0a873SVinod Koul if (p->source->priv) { 885cfb0a873SVinod Koul dev_dbg(dai->dev, "set params for %s\n", 886cfb0a873SVinod Koul p->source->name); 887cfb0a873SVinod Koul return p->source->priv; 888cfb0a873SVinod Koul } 889cfb0a873SVinod Koul } 890cfb0a873SVinod Koul } 891cfb0a873SVinod Koul 892cfb0a873SVinod Koul return NULL; 893cfb0a873SVinod Koul } 894cfb0a873SVinod Koul 895cfb0a873SVinod Koul static u8 skl_tplg_be_link_type(int dev_type) 896cfb0a873SVinod Koul { 897cfb0a873SVinod Koul int ret; 898cfb0a873SVinod Koul 899cfb0a873SVinod Koul switch (dev_type) { 900cfb0a873SVinod Koul case SKL_DEVICE_BT: 901cfb0a873SVinod Koul ret = NHLT_LINK_SSP; 902cfb0a873SVinod Koul break; 903cfb0a873SVinod Koul 904cfb0a873SVinod Koul case SKL_DEVICE_DMIC: 905cfb0a873SVinod Koul ret = NHLT_LINK_DMIC; 906cfb0a873SVinod Koul break; 907cfb0a873SVinod Koul 908cfb0a873SVinod Koul case SKL_DEVICE_I2S: 909cfb0a873SVinod Koul ret = NHLT_LINK_SSP; 910cfb0a873SVinod Koul break; 911cfb0a873SVinod Koul 912cfb0a873SVinod Koul case SKL_DEVICE_HDALINK: 913cfb0a873SVinod Koul ret = NHLT_LINK_HDA; 914cfb0a873SVinod Koul break; 915cfb0a873SVinod Koul 916cfb0a873SVinod Koul default: 917cfb0a873SVinod Koul ret = NHLT_LINK_INVALID; 918cfb0a873SVinod Koul break; 919cfb0a873SVinod Koul } 920cfb0a873SVinod Koul 921cfb0a873SVinod Koul return ret; 922cfb0a873SVinod Koul } 923cfb0a873SVinod Koul 924cfb0a873SVinod Koul /* 925cfb0a873SVinod Koul * Fill the BE gateway parameters 926cfb0a873SVinod Koul * The BE gateway expects a blob of parameters which are kept in the ACPI 927cfb0a873SVinod Koul * NHLT blob, so query the blob for interface type (i2s/pdm) and instance. 928cfb0a873SVinod Koul * The port can have multiple settings so pick based on the PCM 929cfb0a873SVinod Koul * parameters 930cfb0a873SVinod Koul */ 931cfb0a873SVinod Koul static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai, 932cfb0a873SVinod Koul struct skl_module_cfg *mconfig, 933cfb0a873SVinod Koul struct skl_pipe_params *params) 934cfb0a873SVinod Koul { 935cfb0a873SVinod Koul struct skl_pipe *pipe = mconfig->pipe; 936cfb0a873SVinod Koul struct nhlt_specific_cfg *cfg; 937cfb0a873SVinod Koul struct skl *skl = get_skl_ctx(dai->dev); 938cfb0a873SVinod Koul int link_type = skl_tplg_be_link_type(mconfig->dev_type); 939cfb0a873SVinod Koul 940cfb0a873SVinod Koul memcpy(pipe->p_params, params, sizeof(*params)); 941cfb0a873SVinod Koul 942b30c275eSJeeja KP if (link_type == NHLT_LINK_HDA) 943b30c275eSJeeja KP return 0; 944b30c275eSJeeja KP 945cfb0a873SVinod Koul /* update the blob based on virtual bus_id*/ 946cfb0a873SVinod Koul cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type, 947cfb0a873SVinod Koul params->s_fmt, params->ch, 948cfb0a873SVinod Koul params->s_freq, params->stream); 949cfb0a873SVinod Koul if (cfg) { 950cfb0a873SVinod Koul mconfig->formats_config.caps_size = cfg->size; 951bc03281aSJeeja KP mconfig->formats_config.caps = (u32 *) &cfg->caps; 952cfb0a873SVinod Koul } else { 953cfb0a873SVinod Koul dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n", 954cfb0a873SVinod Koul mconfig->vbus_id, link_type, 955cfb0a873SVinod Koul params->stream); 956cfb0a873SVinod Koul dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n", 957cfb0a873SVinod Koul params->ch, params->s_freq, params->s_fmt); 958cfb0a873SVinod Koul return -EINVAL; 959cfb0a873SVinod Koul } 960cfb0a873SVinod Koul 961cfb0a873SVinod Koul return 0; 962cfb0a873SVinod Koul } 963cfb0a873SVinod Koul 964cfb0a873SVinod Koul static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai, 965cfb0a873SVinod Koul struct snd_soc_dapm_widget *w, 966cfb0a873SVinod Koul struct skl_pipe_params *params) 967cfb0a873SVinod Koul { 968cfb0a873SVinod Koul struct snd_soc_dapm_path *p; 9694d8adccbSSubhransu S. Prusty int ret = -EIO; 970cfb0a873SVinod Koul 971f0900eb2SSubhransu S. Prusty snd_soc_dapm_widget_for_each_source_path(w, p) { 972cfb0a873SVinod Koul if (p->connect && is_skl_dsp_widget_type(p->source) && 973cfb0a873SVinod Koul p->source->priv) { 974cfb0a873SVinod Koul 9759a03cb49SJeeja KP ret = skl_tplg_be_fill_pipe_params(dai, 9769a03cb49SJeeja KP p->source->priv, params); 9774d8adccbSSubhransu S. Prusty if (ret < 0) 9784d8adccbSSubhransu S. Prusty return ret; 979cfb0a873SVinod Koul } else { 9809a03cb49SJeeja KP ret = skl_tplg_be_set_src_pipe_params(dai, 9819a03cb49SJeeja KP p->source, params); 9824d8adccbSSubhransu S. Prusty if (ret < 0) 9834d8adccbSSubhransu S. Prusty return ret; 984cfb0a873SVinod Koul } 985cfb0a873SVinod Koul } 986cfb0a873SVinod Koul 9874d8adccbSSubhransu S. Prusty return ret; 988cfb0a873SVinod Koul } 989cfb0a873SVinod Koul 990cfb0a873SVinod Koul static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai, 991cfb0a873SVinod Koul struct snd_soc_dapm_widget *w, struct skl_pipe_params *params) 992cfb0a873SVinod Koul { 993cfb0a873SVinod Koul struct snd_soc_dapm_path *p = NULL; 9944d8adccbSSubhransu S. Prusty int ret = -EIO; 995cfb0a873SVinod Koul 996f0900eb2SSubhransu S. Prusty snd_soc_dapm_widget_for_each_sink_path(w, p) { 997cfb0a873SVinod Koul if (p->connect && is_skl_dsp_widget_type(p->sink) && 998cfb0a873SVinod Koul p->sink->priv) { 999cfb0a873SVinod Koul 10009a03cb49SJeeja KP ret = skl_tplg_be_fill_pipe_params(dai, 10019a03cb49SJeeja KP p->sink->priv, params); 10024d8adccbSSubhransu S. Prusty if (ret < 0) 10034d8adccbSSubhransu S. Prusty return ret; 10044d8adccbSSubhransu S. Prusty } else { 10054d8adccbSSubhransu S. Prusty ret = skl_tplg_be_set_sink_pipe_params( 1006cfb0a873SVinod Koul dai, p->sink, params); 10074d8adccbSSubhransu S. Prusty if (ret < 0) 10084d8adccbSSubhransu S. Prusty return ret; 1009cfb0a873SVinod Koul } 1010cfb0a873SVinod Koul } 1011cfb0a873SVinod Koul 10124d8adccbSSubhransu S. Prusty return ret; 1013cfb0a873SVinod Koul } 1014cfb0a873SVinod Koul 1015cfb0a873SVinod Koul /* 1016cfb0a873SVinod Koul * BE hw_params can be a source parameters (capture) or sink parameters 1017cfb0a873SVinod Koul * (playback). Based on sink and source we need to either find the source 1018cfb0a873SVinod Koul * list or the sink list and set the pipeline parameters 1019cfb0a873SVinod Koul */ 1020cfb0a873SVinod Koul int skl_tplg_be_update_params(struct snd_soc_dai *dai, 1021cfb0a873SVinod Koul struct skl_pipe_params *params) 1022cfb0a873SVinod Koul { 1023cfb0a873SVinod Koul struct snd_soc_dapm_widget *w; 1024cfb0a873SVinod Koul 1025cfb0a873SVinod Koul if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1026cfb0a873SVinod Koul w = dai->playback_widget; 1027cfb0a873SVinod Koul 1028cfb0a873SVinod Koul return skl_tplg_be_set_src_pipe_params(dai, w, params); 1029cfb0a873SVinod Koul 1030cfb0a873SVinod Koul } else { 1031cfb0a873SVinod Koul w = dai->capture_widget; 1032cfb0a873SVinod Koul 1033cfb0a873SVinod Koul return skl_tplg_be_set_sink_pipe_params(dai, w, params); 1034cfb0a873SVinod Koul } 1035cfb0a873SVinod Koul 1036cfb0a873SVinod Koul return 0; 1037cfb0a873SVinod Koul } 10383af36706SVinod Koul 10393af36706SVinod Koul static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = { 10403af36706SVinod Koul {SKL_MIXER_EVENT, skl_tplg_mixer_event}, 10413af36706SVinod Koul {SKL_VMIXER_EVENT, skl_tplg_vmixer_event}, 10423af36706SVinod Koul {SKL_PGA_EVENT, skl_tplg_pga_event}, 10433af36706SVinod Koul }; 10443af36706SVinod Koul 10453af36706SVinod Koul /* 10463af36706SVinod Koul * The topology binary passes the pin info for a module so initialize the pin 10473af36706SVinod Koul * info passed into module instance 10483af36706SVinod Koul */ 10496abca1d7SJeeja KP static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin, 10503af36706SVinod Koul struct skl_module_pin *m_pin, 10516abca1d7SJeeja KP bool is_dynamic, int max_pin) 10523af36706SVinod Koul { 10533af36706SVinod Koul int i; 10543af36706SVinod Koul 10553af36706SVinod Koul for (i = 0; i < max_pin; i++) { 10566abca1d7SJeeja KP m_pin[i].id.module_id = dfw_pin[i].module_id; 10576abca1d7SJeeja KP m_pin[i].id.instance_id = dfw_pin[i].instance_id; 10583af36706SVinod Koul m_pin[i].in_use = false; 10596abca1d7SJeeja KP m_pin[i].is_dynamic = is_dynamic; 10604f745708SJeeja KP m_pin[i].pin_state = SKL_PIN_UNBIND; 10613af36706SVinod Koul } 10623af36706SVinod Koul } 10633af36706SVinod Koul 10643af36706SVinod Koul /* 10653af36706SVinod Koul * Add pipeline from topology binary into driver pipeline list 10663af36706SVinod Koul * 10673af36706SVinod Koul * If already added we return that instance 10683af36706SVinod Koul * Otherwise we create a new instance and add into driver list 10693af36706SVinod Koul */ 10703af36706SVinod Koul static struct skl_pipe *skl_tplg_add_pipe(struct device *dev, 10713af36706SVinod Koul struct skl *skl, struct skl_dfw_pipe *dfw_pipe) 10723af36706SVinod Koul { 10733af36706SVinod Koul struct skl_pipeline *ppl; 10743af36706SVinod Koul struct skl_pipe *pipe; 10753af36706SVinod Koul struct skl_pipe_params *params; 10763af36706SVinod Koul 10773af36706SVinod Koul list_for_each_entry(ppl, &skl->ppl_list, node) { 10783af36706SVinod Koul if (ppl->pipe->ppl_id == dfw_pipe->pipe_id) 10793af36706SVinod Koul return ppl->pipe; 10803af36706SVinod Koul } 10813af36706SVinod Koul 10823af36706SVinod Koul ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL); 10833af36706SVinod Koul if (!ppl) 10843af36706SVinod Koul return NULL; 10853af36706SVinod Koul 10863af36706SVinod Koul pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL); 10873af36706SVinod Koul if (!pipe) 10883af36706SVinod Koul return NULL; 10893af36706SVinod Koul 10903af36706SVinod Koul params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL); 10913af36706SVinod Koul if (!params) 10923af36706SVinod Koul return NULL; 10933af36706SVinod Koul 10943af36706SVinod Koul pipe->ppl_id = dfw_pipe->pipe_id; 10953af36706SVinod Koul pipe->memory_pages = dfw_pipe->memory_pages; 10963af36706SVinod Koul pipe->pipe_priority = dfw_pipe->pipe_priority; 10973af36706SVinod Koul pipe->conn_type = dfw_pipe->conn_type; 10983af36706SVinod Koul pipe->state = SKL_PIPE_INVALID; 10993af36706SVinod Koul pipe->p_params = params; 11003af36706SVinod Koul INIT_LIST_HEAD(&pipe->w_list); 11013af36706SVinod Koul 11023af36706SVinod Koul ppl->pipe = pipe; 11033af36706SVinod Koul list_add(&ppl->node, &skl->ppl_list); 11043af36706SVinod Koul 11053af36706SVinod Koul return ppl->pipe; 11063af36706SVinod Koul } 11073af36706SVinod Koul 11084cd9899fSHardik T Shah static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt, 11094cd9899fSHardik T Shah struct skl_dfw_module_fmt *src_fmt, 11104cd9899fSHardik T Shah int pins) 11114cd9899fSHardik T Shah { 11124cd9899fSHardik T Shah int i; 11134cd9899fSHardik T Shah 11144cd9899fSHardik T Shah for (i = 0; i < pins; i++) { 11154cd9899fSHardik T Shah dst_fmt[i].channels = src_fmt[i].channels; 11164cd9899fSHardik T Shah dst_fmt[i].s_freq = src_fmt[i].freq; 11174cd9899fSHardik T Shah dst_fmt[i].bit_depth = src_fmt[i].bit_depth; 11184cd9899fSHardik T Shah dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth; 11194cd9899fSHardik T Shah dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg; 11204cd9899fSHardik T Shah dst_fmt[i].ch_map = src_fmt[i].ch_map; 11214cd9899fSHardik T Shah dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style; 11224cd9899fSHardik T Shah dst_fmt[i].sample_type = src_fmt[i].sample_type; 11234cd9899fSHardik T Shah } 11244cd9899fSHardik T Shah } 11254cd9899fSHardik T Shah 11263af36706SVinod Koul /* 11273af36706SVinod Koul * Topology core widget load callback 11283af36706SVinod Koul * 11293af36706SVinod Koul * This is used to save the private data for each widget which gives 11303af36706SVinod Koul * information to the driver about module and pipeline parameters which DSP 11313af36706SVinod Koul * FW expects like ids, resource values, formats etc 11323af36706SVinod Koul */ 11333af36706SVinod Koul static int skl_tplg_widget_load(struct snd_soc_component *cmpnt, 11343af36706SVinod Koul struct snd_soc_dapm_widget *w, 11353af36706SVinod Koul struct snd_soc_tplg_dapm_widget *tplg_w) 11363af36706SVinod Koul { 11373af36706SVinod Koul int ret; 11383af36706SVinod Koul struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); 11393af36706SVinod Koul struct skl *skl = ebus_to_skl(ebus); 11403af36706SVinod Koul struct hdac_bus *bus = ebus_to_hbus(ebus); 11413af36706SVinod Koul struct skl_module_cfg *mconfig; 11423af36706SVinod Koul struct skl_pipe *pipe; 1143b663a8c5SJeeja KP struct skl_dfw_module *dfw_config = 1144b663a8c5SJeeja KP (struct skl_dfw_module *)tplg_w->priv.data; 11453af36706SVinod Koul 11463af36706SVinod Koul if (!tplg_w->priv.size) 11473af36706SVinod Koul goto bind_event; 11483af36706SVinod Koul 11493af36706SVinod Koul mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL); 11503af36706SVinod Koul 11513af36706SVinod Koul if (!mconfig) 11523af36706SVinod Koul return -ENOMEM; 11533af36706SVinod Koul 11543af36706SVinod Koul w->priv = mconfig; 11553af36706SVinod Koul mconfig->id.module_id = dfw_config->module_id; 11563af36706SVinod Koul mconfig->id.instance_id = dfw_config->instance_id; 11573af36706SVinod Koul mconfig->mcps = dfw_config->max_mcps; 11583af36706SVinod Koul mconfig->ibs = dfw_config->ibs; 11593af36706SVinod Koul mconfig->obs = dfw_config->obs; 11603af36706SVinod Koul mconfig->core_id = dfw_config->core_id; 11613af36706SVinod Koul mconfig->max_in_queue = dfw_config->max_in_queue; 11623af36706SVinod Koul mconfig->max_out_queue = dfw_config->max_out_queue; 11633af36706SVinod Koul mconfig->is_loadable = dfw_config->is_loadable; 11644cd9899fSHardik T Shah skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt, 11654cd9899fSHardik T Shah MODULE_MAX_IN_PINS); 11664cd9899fSHardik T Shah skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt, 11674cd9899fSHardik T Shah MODULE_MAX_OUT_PINS); 11684cd9899fSHardik T Shah 11693af36706SVinod Koul mconfig->params_fixup = dfw_config->params_fixup; 11703af36706SVinod Koul mconfig->converter = dfw_config->converter; 11713af36706SVinod Koul mconfig->m_type = dfw_config->module_type; 11723af36706SVinod Koul mconfig->vbus_id = dfw_config->vbus_id; 11733af36706SVinod Koul 11743af36706SVinod Koul pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe); 11753af36706SVinod Koul if (pipe) 11763af36706SVinod Koul mconfig->pipe = pipe; 11773af36706SVinod Koul 11783af36706SVinod Koul mconfig->dev_type = dfw_config->dev_type; 11793af36706SVinod Koul mconfig->hw_conn_type = dfw_config->hw_conn_type; 11803af36706SVinod Koul mconfig->time_slot = dfw_config->time_slot; 11813af36706SVinod Koul mconfig->formats_config.caps_size = dfw_config->caps.caps_size; 11823af36706SVinod Koul 118365aecfa8SHardik T Shah if (dfw_config->is_loadable) 118465aecfa8SHardik T Shah memcpy(mconfig->guid, dfw_config->uuid, 118565aecfa8SHardik T Shah ARRAY_SIZE(dfw_config->uuid)); 118665aecfa8SHardik T Shah 11874cd9899fSHardik T Shah mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) * 11883af36706SVinod Koul sizeof(*mconfig->m_in_pin), 11893af36706SVinod Koul GFP_KERNEL); 11903af36706SVinod Koul if (!mconfig->m_in_pin) 11913af36706SVinod Koul return -ENOMEM; 11923af36706SVinod Koul 11936abca1d7SJeeja KP mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) * 11943af36706SVinod Koul sizeof(*mconfig->m_out_pin), 11953af36706SVinod Koul GFP_KERNEL); 11963af36706SVinod Koul if (!mconfig->m_out_pin) 11973af36706SVinod Koul return -ENOMEM; 11983af36706SVinod Koul 11996abca1d7SJeeja KP skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin, 12006abca1d7SJeeja KP dfw_config->is_dynamic_in_pin, 12013af36706SVinod Koul mconfig->max_in_queue); 12026abca1d7SJeeja KP 12036abca1d7SJeeja KP skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin, 12046abca1d7SJeeja KP dfw_config->is_dynamic_out_pin, 12053af36706SVinod Koul mconfig->max_out_queue); 12063af36706SVinod Koul 12076abca1d7SJeeja KP 12083af36706SVinod Koul if (mconfig->formats_config.caps_size == 0) 12093af36706SVinod Koul goto bind_event; 12103af36706SVinod Koul 12113af36706SVinod Koul mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev, 12123af36706SVinod Koul mconfig->formats_config.caps_size, GFP_KERNEL); 12133af36706SVinod Koul 12143af36706SVinod Koul if (mconfig->formats_config.caps == NULL) 12153af36706SVinod Koul return -ENOMEM; 12163af36706SVinod Koul 12173af36706SVinod Koul memcpy(mconfig->formats_config.caps, dfw_config->caps.caps, 12183af36706SVinod Koul dfw_config->caps.caps_size); 12193af36706SVinod Koul 12203af36706SVinod Koul bind_event: 12213af36706SVinod Koul if (tplg_w->event_type == 0) { 12223373f716SVinod Koul dev_dbg(bus->dev, "ASoC: No event handler required\n"); 12233af36706SVinod Koul return 0; 12243af36706SVinod Koul } 12253af36706SVinod Koul 12263af36706SVinod Koul ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops, 1227b663a8c5SJeeja KP ARRAY_SIZE(skl_tplg_widget_ops), 1228b663a8c5SJeeja KP tplg_w->event_type); 12293af36706SVinod Koul 12303af36706SVinod Koul if (ret) { 12313af36706SVinod Koul dev_err(bus->dev, "%s: No matching event handlers found for %d\n", 12323af36706SVinod Koul __func__, tplg_w->event_type); 12333af36706SVinod Koul return -EINVAL; 12343af36706SVinod Koul } 12353af36706SVinod Koul 12363af36706SVinod Koul return 0; 12373af36706SVinod Koul } 12383af36706SVinod Koul 12393af36706SVinod Koul static struct snd_soc_tplg_ops skl_tplg_ops = { 12403af36706SVinod Koul .widget_load = skl_tplg_widget_load, 12413af36706SVinod Koul }; 12423af36706SVinod Koul 12433af36706SVinod Koul /* This will be read from topology manifest, currently defined here */ 12443af36706SVinod Koul #define SKL_MAX_MCPS 30000000 12453af36706SVinod Koul #define SKL_FW_MAX_MEM 1000000 12463af36706SVinod Koul 12473af36706SVinod Koul /* 12483af36706SVinod Koul * SKL topology init routine 12493af36706SVinod Koul */ 12503af36706SVinod Koul int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) 12513af36706SVinod Koul { 12523af36706SVinod Koul int ret; 12533af36706SVinod Koul const struct firmware *fw; 12543af36706SVinod Koul struct hdac_bus *bus = ebus_to_hbus(ebus); 12553af36706SVinod Koul struct skl *skl = ebus_to_skl(ebus); 12563af36706SVinod Koul 12573af36706SVinod Koul ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); 12583af36706SVinod Koul if (ret < 0) { 1259b663a8c5SJeeja KP dev_err(bus->dev, "tplg fw %s load failed with %d\n", 12603af36706SVinod Koul "dfw_sst.bin", ret); 12613af36706SVinod Koul return ret; 12623af36706SVinod Koul } 12633af36706SVinod Koul 12643af36706SVinod Koul /* 12653af36706SVinod Koul * The complete tplg for SKL is loaded as index 0, we don't use 12663af36706SVinod Koul * any other index 12673af36706SVinod Koul */ 1268b663a8c5SJeeja KP ret = snd_soc_tplg_component_load(&platform->component, 1269b663a8c5SJeeja KP &skl_tplg_ops, fw, 0); 12703af36706SVinod Koul if (ret < 0) { 12713af36706SVinod Koul dev_err(bus->dev, "tplg component load failed%d\n", ret); 12723af36706SVinod Koul return -EINVAL; 12733af36706SVinod Koul } 12743af36706SVinod Koul 12753af36706SVinod Koul skl->resource.max_mcps = SKL_MAX_MCPS; 12763af36706SVinod Koul skl->resource.max_mem = SKL_FW_MAX_MEM; 12773af36706SVinod Koul 12783af36706SVinod Koul return 0; 12793af36706SVinod Koul } 1280