1a750ba5fSSubhransu S. Prusty /* 2a750ba5fSSubhransu S. Prusty * skl-sst.c - HDA DSP library functions for SKL platform 3a750ba5fSSubhransu S. Prusty * 4a750ba5fSSubhransu S. Prusty * Copyright (C) 2014-15, Intel Corporation. 5a750ba5fSSubhransu S. Prusty * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> 6a750ba5fSSubhransu S. Prusty * Jeeja KP <jeeja.kp@intel.com> 7a750ba5fSSubhransu S. Prusty * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8a750ba5fSSubhransu S. Prusty * 9a750ba5fSSubhransu S. Prusty * This program is free software; you can redistribute it and/or modify 10a750ba5fSSubhransu S. Prusty * it under the terms of the GNU General Public License as version 2, as 11a750ba5fSSubhransu S. Prusty * published by the Free Software Foundation. 12a750ba5fSSubhransu S. Prusty * 13a750ba5fSSubhransu S. Prusty * This program is distributed in the hope that it will be useful, but 14a750ba5fSSubhransu S. Prusty * WITHOUT ANY WARRANTY; without even the implied warranty of 15a750ba5fSSubhransu S. Prusty * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16a750ba5fSSubhransu S. Prusty * General Public License for more details. 17a750ba5fSSubhransu S. Prusty */ 18a750ba5fSSubhransu S. Prusty 19a750ba5fSSubhransu S. Prusty #include <linux/module.h> 20a750ba5fSSubhransu S. Prusty #include <linux/delay.h> 21a750ba5fSSubhransu S. Prusty #include <linux/device.h> 2253afce2cSJeeja KP #include <linux/err.h> 2309305da9SShreyas NC #include <linux/uuid.h> 24a750ba5fSSubhransu S. Prusty #include "../common/sst-dsp.h" 25a750ba5fSSubhransu S. Prusty #include "../common/sst-dsp-priv.h" 26a750ba5fSSubhransu S. Prusty #include "../common/sst-ipc.h" 27a750ba5fSSubhransu S. Prusty #include "skl-sst-ipc.h" 28a750ba5fSSubhransu S. Prusty 29a750ba5fSSubhransu S. Prusty #define SKL_BASEFW_TIMEOUT 300 30a750ba5fSSubhransu S. Prusty #define SKL_INIT_TIMEOUT 1000 31a750ba5fSSubhransu S. Prusty 32a750ba5fSSubhransu S. Prusty /* Intel HD Audio SRAM Window 0*/ 33a750ba5fSSubhransu S. Prusty #define SKL_ADSP_SRAM0_BASE 0x8000 34a750ba5fSSubhransu S. Prusty 35a750ba5fSSubhransu S. Prusty /* Firmware status window */ 36a750ba5fSSubhransu S. Prusty #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE 37a750ba5fSSubhransu S. Prusty #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4) 38a750ba5fSSubhransu S. Prusty 396c5768b3SDharageswari R #define SKL_NUM_MODULES 1 406c5768b3SDharageswari R 41a750ba5fSSubhransu S. Prusty static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status) 42a750ba5fSSubhransu S. Prusty { 43a750ba5fSSubhransu S. Prusty u32 cur_sts; 44a750ba5fSSubhransu S. Prusty 45a750ba5fSSubhransu S. Prusty cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK; 46a750ba5fSSubhransu S. Prusty 47a750ba5fSSubhransu S. Prusty return (cur_sts == status); 48a750ba5fSSubhransu S. Prusty } 49a750ba5fSSubhransu S. Prusty 50a750ba5fSSubhransu S. Prusty static int skl_transfer_firmware(struct sst_dsp *ctx, 51a750ba5fSSubhransu S. Prusty const void *basefw, u32 base_fw_size) 52a750ba5fSSubhransu S. Prusty { 53a750ba5fSSubhransu S. Prusty int ret = 0; 54a750ba5fSSubhransu S. Prusty 55b7d0254cSJeeja KP ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size, 56b7d0254cSJeeja KP true); 57a750ba5fSSubhransu S. Prusty if (ret < 0) 58a750ba5fSSubhransu S. Prusty return ret; 59a750ba5fSSubhransu S. Prusty 60a750ba5fSSubhransu S. Prusty ret = sst_dsp_register_poll(ctx, 61a750ba5fSSubhransu S. Prusty SKL_ADSP_FW_STATUS, 62a750ba5fSSubhransu S. Prusty SKL_FW_STS_MASK, 63a750ba5fSSubhransu S. Prusty SKL_FW_RFW_START, 64a750ba5fSSubhransu S. Prusty SKL_BASEFW_TIMEOUT, 65a750ba5fSSubhransu S. Prusty "Firmware boot"); 66a750ba5fSSubhransu S. Prusty 67a750ba5fSSubhransu S. Prusty ctx->cl_dev.ops.cl_stop_dma(ctx); 68a750ba5fSSubhransu S. Prusty 69a750ba5fSSubhransu S. Prusty return ret; 70a750ba5fSSubhransu S. Prusty } 71a750ba5fSSubhransu S. Prusty 7206711051SVinod Koul #define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284 7306711051SVinod Koul 74a750ba5fSSubhransu S. Prusty static int skl_load_base_firmware(struct sst_dsp *ctx) 75a750ba5fSSubhransu S. Prusty { 76a750ba5fSSubhransu S. Prusty int ret = 0, i; 77a750ba5fSSubhransu S. Prusty struct skl_sst *skl = ctx->thread_context; 78cd63655eSVinod Koul struct firmware stripped_fw; 79a750ba5fSSubhransu S. Prusty u32 reg; 80a750ba5fSSubhransu S. Prusty 8184c9e283SJeeja KP skl->boot_complete = false; 8284c9e283SJeeja KP init_waitqueue_head(&skl->boot_wait); 8384c9e283SJeeja KP 8484c9e283SJeeja KP if (ctx->fw == NULL) { 85aecf6fd8SVinod Koul ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev); 86a750ba5fSSubhransu S. Prusty if (ret < 0) { 87a750ba5fSSubhransu S. Prusty dev_err(ctx->dev, "Request firmware failed %d\n", ret); 88a750ba5fSSubhransu S. Prusty return -EIO; 89a750ba5fSSubhransu S. Prusty } 9006711051SVinod Koul } 9106711051SVinod Koul 92e280823cSVinod Koul /* prase uuids on first boot */ 93e280823cSVinod Koul if (skl->is_first_boot) { 94a8e2c19eSSenthilnathan Veppur ret = snd_skl_parse_uuids(ctx, ctx->fw, SKL_ADSP_FW_BIN_HDR_OFFSET, 0); 9506711051SVinod Koul if (ret < 0) { 96e280823cSVinod Koul dev_err(ctx->dev, "UUID parsing err: %d\n", ret); 9706711051SVinod Koul release_firmware(ctx->fw); 98052f103cSJayachandran B skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK); 9906711051SVinod Koul return ret; 10084c9e283SJeeja KP } 101e280823cSVinod Koul } 10284c9e283SJeeja KP 103cd63655eSVinod Koul /* check for extended manifest */ 104cd63655eSVinod Koul stripped_fw.data = ctx->fw->data; 105cd63655eSVinod Koul stripped_fw.size = ctx->fw->size; 106cd63655eSVinod Koul 107cd63655eSVinod Koul skl_dsp_strip_extended_manifest(&stripped_fw); 108cd63655eSVinod Koul 10984c9e283SJeeja KP ret = skl_dsp_boot(ctx); 11084c9e283SJeeja KP if (ret < 0) { 111ecd286a9SColin Ian King dev_err(ctx->dev, "Boot dsp core failed ret: %d\n", ret); 11284c9e283SJeeja KP goto skl_load_base_firmware_failed; 11384c9e283SJeeja KP } 11484c9e283SJeeja KP 11584c9e283SJeeja KP ret = skl_cldma_prepare(ctx); 11684c9e283SJeeja KP if (ret < 0) { 117ecd286a9SColin Ian King dev_err(ctx->dev, "CL dma prepare failed : %d\n", ret); 11884c9e283SJeeja KP goto skl_load_base_firmware_failed; 11984c9e283SJeeja KP } 120a750ba5fSSubhransu S. Prusty 121a750ba5fSSubhransu S. Prusty /* enable Interrupt */ 122a750ba5fSSubhransu S. Prusty skl_ipc_int_enable(ctx); 123a750ba5fSSubhransu S. Prusty skl_ipc_op_int_enable(ctx); 124a750ba5fSSubhransu S. Prusty 125a750ba5fSSubhransu S. Prusty /* check ROM Status */ 126a750ba5fSSubhransu S. Prusty for (i = SKL_INIT_TIMEOUT; i > 0; --i) { 127a750ba5fSSubhransu S. Prusty if (skl_check_fw_status(ctx, SKL_FW_INIT)) { 128a750ba5fSSubhransu S. Prusty dev_dbg(ctx->dev, 129a750ba5fSSubhransu S. Prusty "ROM loaded, we can continue with FW loading\n"); 130a750ba5fSSubhransu S. Prusty break; 131a750ba5fSSubhransu S. Prusty } 132a750ba5fSSubhransu S. Prusty mdelay(1); 133a750ba5fSSubhransu S. Prusty } 134a750ba5fSSubhransu S. Prusty if (!i) { 135a750ba5fSSubhransu S. Prusty reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS); 136a750ba5fSSubhransu S. Prusty dev_err(ctx->dev, 137a750ba5fSSubhransu S. Prusty "Timeout waiting for ROM init done, reg:0x%x\n", reg); 138a750ba5fSSubhransu S. Prusty ret = -EIO; 139ae395937SJeeja KP goto transfer_firmware_failed; 140a750ba5fSSubhransu S. Prusty } 141a750ba5fSSubhransu S. Prusty 142cd63655eSVinod Koul ret = skl_transfer_firmware(ctx, stripped_fw.data, stripped_fw.size); 143a750ba5fSSubhransu S. Prusty if (ret < 0) { 144a750ba5fSSubhransu S. Prusty dev_err(ctx->dev, "Transfer firmware failed%d\n", ret); 145ae395937SJeeja KP goto transfer_firmware_failed; 146a750ba5fSSubhransu S. Prusty } else { 147a750ba5fSSubhransu S. Prusty ret = wait_event_timeout(skl->boot_wait, skl->boot_complete, 148a750ba5fSSubhransu S. Prusty msecs_to_jiffies(SKL_IPC_BOOT_MSECS)); 149a750ba5fSSubhransu S. Prusty if (ret == 0) { 150a750ba5fSSubhransu S. Prusty dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n"); 151a750ba5fSSubhransu S. Prusty ret = -EIO; 152ae395937SJeeja KP goto transfer_firmware_failed; 153a750ba5fSSubhransu S. Prusty } 154a750ba5fSSubhransu S. Prusty 155a750ba5fSSubhransu S. Prusty dev_dbg(ctx->dev, "Download firmware successful%d\n", ret); 1561665c177SJayachandran B skl->fw_loaded = true; 157a750ba5fSSubhransu S. Prusty } 158a750ba5fSSubhransu S. Prusty return 0; 159ae395937SJeeja KP transfer_firmware_failed: 160ae395937SJeeja KP ctx->cl_dev.ops.cl_cleanup_controller(ctx); 161a750ba5fSSubhransu S. Prusty skl_load_base_firmware_failed: 162052f103cSJayachandran B skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK); 16384c9e283SJeeja KP release_firmware(ctx->fw); 16484c9e283SJeeja KP ctx->fw = NULL; 165a750ba5fSSubhransu S. Prusty return ret; 166a750ba5fSSubhransu S. Prusty } 167a750ba5fSSubhransu S. Prusty 168052f103cSJayachandran B static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) 169a750ba5fSSubhransu S. Prusty { 170a750ba5fSSubhransu S. Prusty int ret; 17140a16603SJayachandran B struct skl_ipc_dxstate_info dx; 17240a16603SJayachandran B struct skl_sst *skl = ctx->thread_context; 17340a16603SJayachandran B unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); 174a750ba5fSSubhransu S. Prusty 17540a16603SJayachandran B /* If core0 is being turned on, we need to load the FW */ 17640a16603SJayachandran B if (core_id == SKL_DSP_CORE0_ID) { 177a750ba5fSSubhransu S. Prusty ret = skl_load_base_firmware(ctx); 178a750ba5fSSubhransu S. Prusty if (ret < 0) { 179a750ba5fSSubhransu S. Prusty dev_err(ctx->dev, "unable to load firmware\n"); 180a750ba5fSSubhransu S. Prusty return ret; 181a750ba5fSSubhransu S. Prusty } 182b6726009SSodhi, VunnyX 183b6726009SSodhi, VunnyX /* load libs as they are also lost on D3 */ 184b6726009SSodhi, VunnyX if (skl->lib_count > 1) { 185b6726009SSodhi, VunnyX ret = ctx->fw_ops.load_library(ctx, skl->lib_info, 186b6726009SSodhi, VunnyX skl->lib_count); 187b6726009SSodhi, VunnyX if (ret < 0) { 188b6726009SSodhi, VunnyX dev_err(ctx->dev, "reload libs failed: %d\n", 189b6726009SSodhi, VunnyX ret); 190b6726009SSodhi, VunnyX return ret; 191b6726009SSodhi, VunnyX } 192b6726009SSodhi, VunnyX 193b6726009SSodhi, VunnyX } 19440a16603SJayachandran B } 195a750ba5fSSubhransu S. Prusty 19640a16603SJayachandran B /* 19740a16603SJayachandran B * If any core other than core 0 is being moved to D0, enable the 19840a16603SJayachandran B * core and send the set dx IPC for the core. 19940a16603SJayachandran B */ 20040a16603SJayachandran B if (core_id != SKL_DSP_CORE0_ID) { 20140a16603SJayachandran B ret = skl_dsp_enable_core(ctx, core_mask); 20240a16603SJayachandran B if (ret < 0) 20340a16603SJayachandran B return ret; 20440a16603SJayachandran B 20540a16603SJayachandran B dx.core_mask = core_mask; 20640a16603SJayachandran B dx.dx_mask = core_mask; 20740a16603SJayachandran B 20840a16603SJayachandran B ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, 20940a16603SJayachandran B SKL_BASE_FW_MODULE_ID, &dx); 21040a16603SJayachandran B if (ret < 0) { 21140a16603SJayachandran B dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n", 21240a16603SJayachandran B core_id); 21340a16603SJayachandran B skl_dsp_disable_core(ctx, core_mask); 21440a16603SJayachandran B } 21540a16603SJayachandran B } 21640a16603SJayachandran B 21740a16603SJayachandran B skl->cores.state[core_id] = SKL_DSP_RUNNING; 218a750ba5fSSubhransu S. Prusty 219b6726009SSodhi, VunnyX return 0; 220a750ba5fSSubhransu S. Prusty } 221a750ba5fSSubhransu S. Prusty 222052f103cSJayachandran B static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id) 223a750ba5fSSubhransu S. Prusty { 224a750ba5fSSubhransu S. Prusty int ret; 225a750ba5fSSubhransu S. Prusty struct skl_ipc_dxstate_info dx; 226a750ba5fSSubhransu S. Prusty struct skl_sst *skl = ctx->thread_context; 22740a16603SJayachandran B unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); 228a750ba5fSSubhransu S. Prusty 22940a16603SJayachandran B dx.core_mask = core_mask; 230a750ba5fSSubhransu S. Prusty dx.dx_mask = SKL_IPC_D3_MASK; 23140a16603SJayachandran B 232a750ba5fSSubhransu S. Prusty ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx); 23353afce2cSJeeja KP if (ret < 0) 23440a16603SJayachandran B dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret); 23553afce2cSJeeja KP 23640a16603SJayachandran B if (core_id == SKL_DSP_CORE0_ID) { 23753afce2cSJeeja KP /* disable Interrupt */ 23853afce2cSJeeja KP ctx->cl_dev.ops.cl_cleanup_controller(ctx); 23953afce2cSJeeja KP skl_cldma_int_disable(ctx); 24053afce2cSJeeja KP skl_ipc_op_int_disable(ctx); 24153afce2cSJeeja KP skl_ipc_int_disable(ctx); 242a750ba5fSSubhransu S. Prusty } 243a750ba5fSSubhransu S. Prusty 24440a16603SJayachandran B ret = skl_dsp_disable_core(ctx, core_mask); 24540a16603SJayachandran B if (ret < 0) 24640a16603SJayachandran B return ret; 24740a16603SJayachandran B 24840a16603SJayachandran B skl->cores.state[core_id] = SKL_DSP_RESET; 249a750ba5fSSubhransu S. Prusty return ret; 250a750ba5fSSubhransu S. Prusty } 251a750ba5fSSubhransu S. Prusty 252a750ba5fSSubhransu S. Prusty static unsigned int skl_get_errorcode(struct sst_dsp *ctx) 253a750ba5fSSubhransu S. Prusty { 254a750ba5fSSubhransu S. Prusty return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE); 255a750ba5fSSubhransu S. Prusty } 256a750ba5fSSubhransu S. Prusty 2576c5768b3SDharageswari R /* 2586c5768b3SDharageswari R * since get/set_module are called from DAPM context, 2596c5768b3SDharageswari R * we don't need lock for usage count 2606c5768b3SDharageswari R */ 261db4e5613SDan Carpenter static int skl_get_module(struct sst_dsp *ctx, u16 mod_id) 2626c5768b3SDharageswari R { 2636c5768b3SDharageswari R struct skl_module_table *module; 2646c5768b3SDharageswari R 2656c5768b3SDharageswari R list_for_each_entry(module, &ctx->module_list, list) { 2666c5768b3SDharageswari R if (module->mod_info->mod_id == mod_id) 2676c5768b3SDharageswari R return ++module->usage_cnt; 2686c5768b3SDharageswari R } 2696c5768b3SDharageswari R 2706c5768b3SDharageswari R return -EINVAL; 2716c5768b3SDharageswari R } 2726c5768b3SDharageswari R 273db4e5613SDan Carpenter static int skl_put_module(struct sst_dsp *ctx, u16 mod_id) 2746c5768b3SDharageswari R { 2756c5768b3SDharageswari R struct skl_module_table *module; 2766c5768b3SDharageswari R 2776c5768b3SDharageswari R list_for_each_entry(module, &ctx->module_list, list) { 2786c5768b3SDharageswari R if (module->mod_info->mod_id == mod_id) 2796c5768b3SDharageswari R return --module->usage_cnt; 2806c5768b3SDharageswari R } 2816c5768b3SDharageswari R 2826c5768b3SDharageswari R return -EINVAL; 2836c5768b3SDharageswari R } 2846c5768b3SDharageswari R 2856c5768b3SDharageswari R static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx, 2866c5768b3SDharageswari R char *mod_name, int mod_id) 2876c5768b3SDharageswari R { 2886c5768b3SDharageswari R const struct firmware *fw; 2896c5768b3SDharageswari R struct skl_module_table *skl_module; 2906c5768b3SDharageswari R unsigned int size; 2916c5768b3SDharageswari R int ret; 2926c5768b3SDharageswari R 2936c5768b3SDharageswari R ret = request_firmware(&fw, mod_name, ctx->dev); 2946c5768b3SDharageswari R if (ret < 0) { 2956c5768b3SDharageswari R dev_err(ctx->dev, "Request Module %s failed :%d\n", 2966c5768b3SDharageswari R mod_name, ret); 2976c5768b3SDharageswari R return NULL; 2986c5768b3SDharageswari R } 2996c5768b3SDharageswari R 3006c5768b3SDharageswari R skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL); 3016c5768b3SDharageswari R if (skl_module == NULL) { 3026c5768b3SDharageswari R release_firmware(fw); 3036c5768b3SDharageswari R return NULL; 3046c5768b3SDharageswari R } 3056c5768b3SDharageswari R 3066c5768b3SDharageswari R size = sizeof(*skl_module->mod_info); 3076c5768b3SDharageswari R skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL); 3086c5768b3SDharageswari R if (skl_module->mod_info == NULL) { 3096c5768b3SDharageswari R release_firmware(fw); 3106c5768b3SDharageswari R return NULL; 3116c5768b3SDharageswari R } 3126c5768b3SDharageswari R 3136c5768b3SDharageswari R skl_module->mod_info->mod_id = mod_id; 3146c5768b3SDharageswari R skl_module->mod_info->fw = fw; 3156c5768b3SDharageswari R list_add(&skl_module->list, &ctx->module_list); 3166c5768b3SDharageswari R 3176c5768b3SDharageswari R return skl_module; 3186c5768b3SDharageswari R } 3196c5768b3SDharageswari R 3206c5768b3SDharageswari R /* get a module from it's unique ID */ 3216c5768b3SDharageswari R static struct skl_module_table *skl_module_get_from_id( 3226c5768b3SDharageswari R struct sst_dsp *ctx, u16 mod_id) 3236c5768b3SDharageswari R { 3246c5768b3SDharageswari R struct skl_module_table *module; 3256c5768b3SDharageswari R 3266c5768b3SDharageswari R if (list_empty(&ctx->module_list)) { 3276c5768b3SDharageswari R dev_err(ctx->dev, "Module list is empty\n"); 3286c5768b3SDharageswari R return NULL; 3296c5768b3SDharageswari R } 3306c5768b3SDharageswari R 3316c5768b3SDharageswari R list_for_each_entry(module, &ctx->module_list, list) { 3326c5768b3SDharageswari R if (module->mod_info->mod_id == mod_id) 3336c5768b3SDharageswari R return module; 3346c5768b3SDharageswari R } 3356c5768b3SDharageswari R 3366c5768b3SDharageswari R return NULL; 3376c5768b3SDharageswari R } 3386c5768b3SDharageswari R 339b7d0254cSJeeja KP static int skl_transfer_module(struct sst_dsp *ctx, const void *data, 3404e0277d2SG Kranthi u32 size, u16 mod_id, u8 table_id, bool is_module) 3416c5768b3SDharageswari R { 342b7d0254cSJeeja KP int ret, bytes_left, curr_pos; 3436c5768b3SDharageswari R struct skl_sst *skl = ctx->thread_context; 344b7d0254cSJeeja KP skl->mod_load_complete = false; 3456c5768b3SDharageswari R 346b7d0254cSJeeja KP bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, data, size, false); 347b7d0254cSJeeja KP if (bytes_left < 0) 348b7d0254cSJeeja KP return bytes_left; 3496c5768b3SDharageswari R 350b6726009SSodhi, VunnyX /* check is_module flag to load module or library */ 351b6726009SSodhi, VunnyX if (is_module) 352b7d0254cSJeeja KP ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES, &mod_id); 353b6726009SSodhi, VunnyX else 354b6726009SSodhi, VunnyX ret = skl_sst_ipc_load_library(&skl->ipc, 0, table_id, false); 355b6726009SSodhi, VunnyX 356b7d0254cSJeeja KP if (ret < 0) { 357b6726009SSodhi, VunnyX dev_err(ctx->dev, "Failed to Load %s with err %d\n", 358b6726009SSodhi, VunnyX is_module ? "module" : "lib", ret); 359b7d0254cSJeeja KP goto out; 360b7d0254cSJeeja KP } 3616c5768b3SDharageswari R 362b7d0254cSJeeja KP /* 363b7d0254cSJeeja KP * if bytes_left > 0 then wait for BDL complete interrupt and 364b7d0254cSJeeja KP * copy the next chunk till bytes_left is 0. if bytes_left is 365b7d0254cSJeeja KP * is zero, then wait for load module IPC reply 366b7d0254cSJeeja KP */ 367b7d0254cSJeeja KP while (bytes_left > 0) { 368b7d0254cSJeeja KP curr_pos = size - bytes_left; 369b7d0254cSJeeja KP 370b7d0254cSJeeja KP ret = skl_cldma_wait_interruptible(ctx); 371b7d0254cSJeeja KP if (ret < 0) 372b7d0254cSJeeja KP goto out; 373b7d0254cSJeeja KP 374b7d0254cSJeeja KP bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, 375b7d0254cSJeeja KP data + curr_pos, 376b7d0254cSJeeja KP bytes_left, false); 377b7d0254cSJeeja KP } 378b7d0254cSJeeja KP 379b7d0254cSJeeja KP ret = wait_event_timeout(skl->mod_load_wait, skl->mod_load_complete, 380b7d0254cSJeeja KP msecs_to_jiffies(SKL_IPC_BOOT_MSECS)); 381b7d0254cSJeeja KP if (ret == 0 || !skl->mod_load_status) { 382b7d0254cSJeeja KP dev_err(ctx->dev, "Module Load failed\n"); 383b7d0254cSJeeja KP ret = -EIO; 384b7d0254cSJeeja KP } 385b7d0254cSJeeja KP 386b7d0254cSJeeja KP out: 3876c5768b3SDharageswari R ctx->cl_dev.ops.cl_stop_dma(ctx); 3886c5768b3SDharageswari R 3896c5768b3SDharageswari R return ret; 3906c5768b3SDharageswari R } 3916c5768b3SDharageswari R 392b6726009SSodhi, VunnyX static int 393b6726009SSodhi, VunnyX kbl_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count) 394b6726009SSodhi, VunnyX { 395b6726009SSodhi, VunnyX struct skl_sst *skl = ctx->thread_context; 396b6726009SSodhi, VunnyX struct firmware stripped_fw; 397b6726009SSodhi, VunnyX int ret, i; 398b6726009SSodhi, VunnyX 399b6726009SSodhi, VunnyX /* library indices start from 1 to N. 0 represents base FW */ 400b6726009SSodhi, VunnyX for (i = 1; i < lib_count; i++) { 401b6726009SSodhi, VunnyX ret = skl_prepare_lib_load(skl, &skl->lib_info[i], &stripped_fw, 402b6726009SSodhi, VunnyX SKL_ADSP_FW_BIN_HDR_OFFSET, i); 403b6726009SSodhi, VunnyX if (ret < 0) 404b6726009SSodhi, VunnyX goto load_library_failed; 405b6726009SSodhi, VunnyX ret = skl_transfer_module(ctx, stripped_fw.data, 406b6726009SSodhi, VunnyX stripped_fw.size, 0, i, false); 407b6726009SSodhi, VunnyX if (ret < 0) 408b6726009SSodhi, VunnyX goto load_library_failed; 409b6726009SSodhi, VunnyX } 410b6726009SSodhi, VunnyX 411b6726009SSodhi, VunnyX return 0; 412b6726009SSodhi, VunnyX 413b6726009SSodhi, VunnyX load_library_failed: 414b6726009SSodhi, VunnyX skl_release_library(linfo, lib_count); 415b6726009SSodhi, VunnyX return ret; 416b6726009SSodhi, VunnyX } 417b6726009SSodhi, VunnyX 41809305da9SShreyas NC static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid) 4196c5768b3SDharageswari R { 4206c5768b3SDharageswari R struct skl_module_table *module_entry = NULL; 4216c5768b3SDharageswari R int ret = 0; 4226c5768b3SDharageswari R char mod_name[64]; /* guid str = 32 chars + 4 hyphens */ 42309305da9SShreyas NC uuid_le *uuid_mod; 4246c5768b3SDharageswari R 42509305da9SShreyas NC uuid_mod = (uuid_le *)guid; 42609305da9SShreyas NC snprintf(mod_name, sizeof(mod_name), "%s%pUL%s", 42709305da9SShreyas NC "intel/dsp_fw_", uuid_mod, ".bin"); 4286c5768b3SDharageswari R 4296c5768b3SDharageswari R module_entry = skl_module_get_from_id(ctx, mod_id); 4306c5768b3SDharageswari R if (module_entry == NULL) { 4316c5768b3SDharageswari R module_entry = skl_fill_module_table(ctx, mod_name, mod_id); 4326c5768b3SDharageswari R if (module_entry == NULL) { 4336c5768b3SDharageswari R dev_err(ctx->dev, "Failed to Load module\n"); 4346c5768b3SDharageswari R return -EINVAL; 4356c5768b3SDharageswari R } 4366c5768b3SDharageswari R } 4376c5768b3SDharageswari R 4386c5768b3SDharageswari R if (!module_entry->usage_cnt) { 439b7d0254cSJeeja KP ret = skl_transfer_module(ctx, module_entry->mod_info->fw->data, 4404e0277d2SG Kranthi module_entry->mod_info->fw->size, 4414e0277d2SG Kranthi mod_id, 0, true); 4426c5768b3SDharageswari R if (ret < 0) { 4436c5768b3SDharageswari R dev_err(ctx->dev, "Failed to Load module\n"); 4446c5768b3SDharageswari R return ret; 4456c5768b3SDharageswari R } 4466c5768b3SDharageswari R } 4476c5768b3SDharageswari R 4486c5768b3SDharageswari R ret = skl_get_module(ctx, mod_id); 4496c5768b3SDharageswari R 4506c5768b3SDharageswari R return ret; 4516c5768b3SDharageswari R } 4526c5768b3SDharageswari R 4536c5768b3SDharageswari R static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) 4546c5768b3SDharageswari R { 455db4e5613SDan Carpenter int usage_cnt; 4566c5768b3SDharageswari R struct skl_sst *skl = ctx->thread_context; 4576c5768b3SDharageswari R int ret = 0; 4586c5768b3SDharageswari R 4596c5768b3SDharageswari R usage_cnt = skl_put_module(ctx, mod_id); 4606c5768b3SDharageswari R if (usage_cnt < 0) { 4616c5768b3SDharageswari R dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt); 4626c5768b3SDharageswari R return -EIO; 4636c5768b3SDharageswari R } 464f7ea7777SVinod Koul 465f7ea7777SVinod Koul /* if module is used by others return, no need to unload */ 466f7ea7777SVinod Koul if (usage_cnt > 0) 467f7ea7777SVinod Koul return 0; 468f7ea7777SVinod Koul 4696c5768b3SDharageswari R ret = skl_ipc_unload_modules(&skl->ipc, 4706c5768b3SDharageswari R SKL_NUM_MODULES, &mod_id); 4716c5768b3SDharageswari R if (ret < 0) { 4726c5768b3SDharageswari R dev_err(ctx->dev, "Failed to UnLoad module\n"); 4736c5768b3SDharageswari R skl_get_module(ctx, mod_id); 4746c5768b3SDharageswari R return ret; 4756c5768b3SDharageswari R } 4766c5768b3SDharageswari R 4776c5768b3SDharageswari R return ret; 4786c5768b3SDharageswari R } 4796c5768b3SDharageswari R 480fe3f4442SDharageswari R void skl_clear_module_cnt(struct sst_dsp *ctx) 481fe3f4442SDharageswari R { 482fe3f4442SDharageswari R struct skl_module_table *module; 483fe3f4442SDharageswari R 484a35aeaeeSVinod Koul if (list_empty(&ctx->module_list)) 485a35aeaeeSVinod Koul return; 486a35aeaeeSVinod Koul 487fe3f4442SDharageswari R list_for_each_entry(module, &ctx->module_list, list) { 488fe3f4442SDharageswari R module->usage_cnt = 0; 489fe3f4442SDharageswari R } 490fe3f4442SDharageswari R } 491fe3f4442SDharageswari R EXPORT_SYMBOL_GPL(skl_clear_module_cnt); 492fe3f4442SDharageswari R 4936c5768b3SDharageswari R static void skl_clear_module_table(struct sst_dsp *ctx) 4946c5768b3SDharageswari R { 4956c5768b3SDharageswari R struct skl_module_table *module, *tmp; 4966c5768b3SDharageswari R 4976c5768b3SDharageswari R if (list_empty(&ctx->module_list)) 4986c5768b3SDharageswari R return; 4996c5768b3SDharageswari R 5006c5768b3SDharageswari R list_for_each_entry_safe(module, tmp, &ctx->module_list, list) { 5016c5768b3SDharageswari R list_del(&module->list); 5026c5768b3SDharageswari R release_firmware(module->mod_info->fw); 5036c5768b3SDharageswari R } 5046c5768b3SDharageswari R } 5056c5768b3SDharageswari R 506a750ba5fSSubhransu S. Prusty static struct skl_dsp_fw_ops skl_fw_ops = { 507a750ba5fSSubhransu S. Prusty .set_state_D0 = skl_set_dsp_D0, 508a750ba5fSSubhransu S. Prusty .set_state_D3 = skl_set_dsp_D3, 509a750ba5fSSubhransu S. Prusty .load_fw = skl_load_base_firmware, 510a750ba5fSSubhransu S. Prusty .get_fw_errcode = skl_get_errorcode, 5116c5768b3SDharageswari R .load_mod = skl_load_module, 5126c5768b3SDharageswari R .unload_mod = skl_unload_module, 513a750ba5fSSubhransu S. Prusty }; 514a750ba5fSSubhransu S. Prusty 51589b0d8a5SSubhransu S. Prusty static struct skl_dsp_fw_ops kbl_fw_ops = { 51689b0d8a5SSubhransu S. Prusty .set_state_D0 = skl_set_dsp_D0, 51789b0d8a5SSubhransu S. Prusty .set_state_D3 = skl_set_dsp_D3, 51889b0d8a5SSubhransu S. Prusty .load_fw = skl_load_base_firmware, 51989b0d8a5SSubhransu S. Prusty .get_fw_errcode = skl_get_errorcode, 520b6726009SSodhi, VunnyX .load_library = kbl_load_library, 52189b0d8a5SSubhransu S. Prusty .load_mod = skl_load_module, 52289b0d8a5SSubhransu S. Prusty .unload_mod = skl_unload_module, 52389b0d8a5SSubhransu S. Prusty }; 52489b0d8a5SSubhransu S. Prusty 525a750ba5fSSubhransu S. Prusty static struct sst_ops skl_ops = { 526a750ba5fSSubhransu S. Prusty .irq_handler = skl_dsp_sst_interrupt, 527a750ba5fSSubhransu S. Prusty .write = sst_shim32_write, 528a750ba5fSSubhransu S. Prusty .read = sst_shim32_read, 529a750ba5fSSubhransu S. Prusty .ram_read = sst_memcpy_fromio_32, 530a750ba5fSSubhransu S. Prusty .ram_write = sst_memcpy_toio_32, 531a750ba5fSSubhransu S. Prusty .free = skl_dsp_free, 532a750ba5fSSubhransu S. Prusty }; 533a750ba5fSSubhransu S. Prusty 534a750ba5fSSubhransu S. Prusty static struct sst_dsp_device skl_dev = { 535a750ba5fSSubhransu S. Prusty .thread = skl_dsp_irq_thread_handler, 536a750ba5fSSubhransu S. Prusty .ops = &skl_ops, 537a750ba5fSSubhransu S. Prusty }; 538a750ba5fSSubhransu S. Prusty 539a750ba5fSSubhransu S. Prusty int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 540aecf6fd8SVinod Koul const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp) 541a750ba5fSSubhransu S. Prusty { 542a750ba5fSSubhransu S. Prusty struct skl_sst *skl; 543a750ba5fSSubhransu S. Prusty struct sst_dsp *sst; 544a750ba5fSSubhransu S. Prusty int ret; 545a750ba5fSSubhransu S. Prusty 5469fe9c711SG Kranthi ret = skl_sst_ctx_init(dev, irq, fw_name, dsp_ops, dsp, &skl_dev); 5479fe9c711SG Kranthi if (ret < 0) { 5489fe9c711SG Kranthi dev_err(dev, "%s: no device\n", __func__); 5499fe9c711SG Kranthi return ret; 550a750ba5fSSubhransu S. Prusty } 551a750ba5fSSubhransu S. Prusty 5529fe9c711SG Kranthi skl = *dsp; 553a750ba5fSSubhransu S. Prusty sst = skl->dsp; 554a750ba5fSSubhransu S. Prusty sst->addr.lpe = mmio_base; 555a750ba5fSSubhransu S. Prusty sst->addr.shim = mmio_base; 55609e914d6SGuneshwor Singh sst->addr.sram0_base = SKL_ADSP_SRAM0_BASE; 55709e914d6SGuneshwor Singh sst->addr.sram1_base = SKL_ADSP_SRAM1_BASE; 55809e914d6SGuneshwor Singh sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ; 55909e914d6SGuneshwor Singh sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ; 56009e914d6SGuneshwor Singh 561a750ba5fSSubhransu S. Prusty sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ), 562a750ba5fSSubhransu S. Prusty SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ); 563a750ba5fSSubhransu S. Prusty 564*2eed1b02SGuneshwor Singh ret = skl_ipc_init(dev, skl); 565*2eed1b02SGuneshwor Singh if (ret) 566*2eed1b02SGuneshwor Singh return ret; 567*2eed1b02SGuneshwor Singh 568a750ba5fSSubhransu S. Prusty sst->fw_ops = skl_fw_ops; 569a750ba5fSSubhransu S. Prusty 5709fe9c711SG Kranthi return 0; 571a750ba5fSSubhransu S. Prusty } 572a750ba5fSSubhransu S. Prusty EXPORT_SYMBOL_GPL(skl_sst_dsp_init); 573a750ba5fSSubhransu S. Prusty 57489b0d8a5SSubhransu S. Prusty int kbl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 57589b0d8a5SSubhransu S. Prusty const char *fw_name, struct skl_dsp_loader_ops dsp_ops, 57689b0d8a5SSubhransu S. Prusty struct skl_sst **dsp) 57789b0d8a5SSubhransu S. Prusty { 57889b0d8a5SSubhransu S. Prusty struct sst_dsp *sst; 57989b0d8a5SSubhransu S. Prusty int ret; 58089b0d8a5SSubhransu S. Prusty 58189b0d8a5SSubhransu S. Prusty ret = skl_sst_dsp_init(dev, mmio_base, irq, fw_name, dsp_ops, dsp); 58289b0d8a5SSubhransu S. Prusty if (ret < 0) { 58389b0d8a5SSubhransu S. Prusty dev_err(dev, "%s: Init failed %d\n", __func__, ret); 58489b0d8a5SSubhransu S. Prusty return ret; 58589b0d8a5SSubhransu S. Prusty } 58689b0d8a5SSubhransu S. Prusty 58789b0d8a5SSubhransu S. Prusty sst = (*dsp)->dsp; 58889b0d8a5SSubhransu S. Prusty sst->fw_ops = kbl_fw_ops; 58989b0d8a5SSubhransu S. Prusty 59089b0d8a5SSubhransu S. Prusty return 0; 59189b0d8a5SSubhransu S. Prusty 59289b0d8a5SSubhransu S. Prusty } 59389b0d8a5SSubhransu S. Prusty EXPORT_SYMBOL_GPL(kbl_sst_dsp_init); 59489b0d8a5SSubhransu S. Prusty 59578cdbbdaSVinod Koul int skl_sst_init_fw(struct device *dev, struct skl_sst *ctx) 59678cdbbdaSVinod Koul { 59778cdbbdaSVinod Koul int ret; 59878cdbbdaSVinod Koul struct sst_dsp *sst = ctx->dsp; 59978cdbbdaSVinod Koul 60078cdbbdaSVinod Koul ret = sst->fw_ops.load_fw(sst); 60178cdbbdaSVinod Koul if (ret < 0) { 602ecd286a9SColin Ian King dev_err(dev, "Load base fw failed : %d\n", ret); 60378cdbbdaSVinod Koul return ret; 60478cdbbdaSVinod Koul } 60578cdbbdaSVinod Koul 60678cdbbdaSVinod Koul skl_dsp_init_core_state(sst); 607b6726009SSodhi, VunnyX 608b6726009SSodhi, VunnyX if (ctx->lib_count > 1) { 609b6726009SSodhi, VunnyX ret = sst->fw_ops.load_library(sst, ctx->lib_info, 610b6726009SSodhi, VunnyX ctx->lib_count); 611b6726009SSodhi, VunnyX if (ret < 0) { 612b6726009SSodhi, VunnyX dev_err(dev, "Load Library failed : %x\n", ret); 613b6726009SSodhi, VunnyX return ret; 614b6726009SSodhi, VunnyX } 615b6726009SSodhi, VunnyX } 61678cdbbdaSVinod Koul ctx->is_first_boot = false; 61778cdbbdaSVinod Koul 61878cdbbdaSVinod Koul return 0; 61978cdbbdaSVinod Koul } 62078cdbbdaSVinod Koul EXPORT_SYMBOL_GPL(skl_sst_init_fw); 62178cdbbdaSVinod Koul 622a750ba5fSSubhransu S. Prusty void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx) 623a750ba5fSSubhransu S. Prusty { 624bc65a326SJeeja KP 625bc65a326SJeeja KP if (ctx->dsp->fw) 626bc65a326SJeeja KP release_firmware(ctx->dsp->fw); 6276c5768b3SDharageswari R skl_clear_module_table(ctx->dsp); 62806711051SVinod Koul skl_freeup_uuid_list(ctx); 629a750ba5fSSubhransu S. Prusty skl_ipc_free(&ctx->ipc); 630a750ba5fSSubhransu S. Prusty ctx->dsp->ops->free(ctx->dsp); 63195536d8cSDharageswari.R if (ctx->boot_complete) { 63295536d8cSDharageswari.R ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp); 63395536d8cSDharageswari.R skl_cldma_int_disable(ctx->dsp); 63495536d8cSDharageswari.R } 635a750ba5fSSubhransu S. Prusty } 636a750ba5fSSubhransu S. Prusty EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup); 637a750ba5fSSubhransu S. Prusty 638a750ba5fSSubhransu S. Prusty MODULE_LICENSE("GPL v2"); 639a750ba5fSSubhransu S. Prusty MODULE_DESCRIPTION("Intel Skylake IPC driver"); 640