xref: /openbmc/linux/sound/soc/intel/avs/ipc.c (revision 8b3a9ad86239f80ed569e23c3954a311f66481d6)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 //
5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 //          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 //
8 
9 #include <linux/io-64-nonatomic-lo-hi.h>
10 #include <linux/slab.h>
11 #include <sound/hdaudio_ext.h>
12 #include "avs.h"
13 #include "messages.h"
14 #include "registers.h"
15 #include "trace.h"
16 
17 #define AVS_IPC_TIMEOUT_MS	300
18 #define AVS_D0IX_DELAY_MS	300
19 
20 static int
21 avs_dsp_set_d0ix(struct avs_dev *adev, bool enable)
22 {
23 	struct avs_ipc *ipc = adev->ipc;
24 	int ret;
25 
26 	/* Is transition required? */
27 	if (ipc->in_d0ix == enable)
28 		return 0;
29 
30 	ret = avs_dsp_op(adev, set_d0ix, enable);
31 	if (ret) {
32 		/* Prevent further d0ix attempts on conscious IPC failure. */
33 		if (ret == -AVS_EIPC)
34 			atomic_inc(&ipc->d0ix_disable_depth);
35 
36 		ipc->in_d0ix = false;
37 		return ret;
38 	}
39 
40 	ipc->in_d0ix = enable;
41 	return 0;
42 }
43 
44 static void avs_dsp_schedule_d0ix(struct avs_dev *adev, struct avs_ipc_msg *tx)
45 {
46 	if (atomic_read(&adev->ipc->d0ix_disable_depth))
47 		return;
48 
49 	mod_delayed_work(system_power_efficient_wq, &adev->ipc->d0ix_work,
50 			 msecs_to_jiffies(AVS_D0IX_DELAY_MS));
51 }
52 
53 static void avs_dsp_d0ix_work(struct work_struct *work)
54 {
55 	struct avs_ipc *ipc = container_of(work, struct avs_ipc, d0ix_work.work);
56 
57 	avs_dsp_set_d0ix(to_avs_dev(ipc->dev), true);
58 }
59 
60 static int avs_dsp_wake_d0i0(struct avs_dev *adev, struct avs_ipc_msg *tx)
61 {
62 	struct avs_ipc *ipc = adev->ipc;
63 
64 	if (!atomic_read(&ipc->d0ix_disable_depth)) {
65 		cancel_delayed_work_sync(&ipc->d0ix_work);
66 		return avs_dsp_set_d0ix(adev, false);
67 	}
68 
69 	return 0;
70 }
71 
72 int avs_dsp_disable_d0ix(struct avs_dev *adev)
73 {
74 	struct avs_ipc *ipc = adev->ipc;
75 
76 	/* Prevent PG only on the first disable. */
77 	if (atomic_inc_return(&ipc->d0ix_disable_depth) == 1) {
78 		cancel_delayed_work_sync(&ipc->d0ix_work);
79 		return avs_dsp_set_d0ix(adev, false);
80 	}
81 
82 	return 0;
83 }
84 
85 int avs_dsp_enable_d0ix(struct avs_dev *adev)
86 {
87 	struct avs_ipc *ipc = adev->ipc;
88 
89 	if (atomic_dec_and_test(&ipc->d0ix_disable_depth))
90 		queue_delayed_work(system_power_efficient_wq, &ipc->d0ix_work,
91 				   msecs_to_jiffies(AVS_D0IX_DELAY_MS));
92 	return 0;
93 }
94 
95 static void avs_dsp_recovery(struct avs_dev *adev)
96 {
97 	struct avs_soc_component *acomp;
98 	unsigned int core_mask;
99 	int ret;
100 
101 	mutex_lock(&adev->comp_list_mutex);
102 	/* disconnect all running streams */
103 	list_for_each_entry(acomp, &adev->comp_list, node) {
104 		struct snd_soc_pcm_runtime *rtd;
105 		struct snd_soc_card *card;
106 
107 		card = acomp->base.card;
108 		if (!card)
109 			continue;
110 
111 		for_each_card_rtds(card, rtd) {
112 			struct snd_pcm *pcm;
113 			int dir;
114 
115 			pcm = rtd->pcm;
116 			if (!pcm || rtd->dai_link->no_pcm)
117 				continue;
118 
119 			for_each_pcm_streams(dir) {
120 				struct snd_pcm_substream *substream;
121 
122 				substream = pcm->streams[dir].substream;
123 				if (!substream || !substream->runtime)
124 					continue;
125 
126 				snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
127 			}
128 		}
129 	}
130 	mutex_unlock(&adev->comp_list_mutex);
131 
132 	/* forcibly shutdown all cores */
133 	core_mask = GENMASK(adev->hw_cfg.dsp_cores - 1, 0);
134 	avs_dsp_core_disable(adev, core_mask);
135 
136 	/* attempt dsp reboot */
137 	ret = avs_dsp_boot_firmware(adev, true);
138 	if (ret < 0)
139 		dev_err(adev->dev, "dsp reboot failed: %d\n", ret);
140 
141 	pm_runtime_mark_last_busy(adev->dev);
142 	pm_runtime_enable(adev->dev);
143 	pm_request_autosuspend(adev->dev);
144 
145 	atomic_set(&adev->ipc->recovering, 0);
146 }
147 
148 static void avs_dsp_recovery_work(struct work_struct *work)
149 {
150 	struct avs_ipc *ipc = container_of(work, struct avs_ipc, recovery_work);
151 
152 	avs_dsp_recovery(to_avs_dev(ipc->dev));
153 }
154 
155 static void avs_dsp_exception_caught(struct avs_dev *adev, union avs_notify_msg *msg)
156 {
157 	struct avs_ipc *ipc = adev->ipc;
158 
159 	/* Account for the double-exception case. */
160 	ipc->ready = false;
161 
162 	if (!atomic_add_unless(&ipc->recovering, 1, 1)) {
163 		dev_err(adev->dev, "dsp recovery is already in progress\n");
164 		return;
165 	}
166 
167 	dev_crit(adev->dev, "communication severed, rebooting dsp..\n");
168 
169 	cancel_delayed_work_sync(&ipc->d0ix_work);
170 	ipc->in_d0ix = false;
171 	/* Re-enabled on recovery completion. */
172 	pm_runtime_disable(adev->dev);
173 
174 	/* Process received notification. */
175 	avs_dsp_op(adev, coredump, msg);
176 
177 	schedule_work(&ipc->recovery_work);
178 }
179 
180 static void avs_dsp_receive_rx(struct avs_dev *adev, u64 header)
181 {
182 	struct avs_ipc *ipc = adev->ipc;
183 	union avs_reply_msg msg = AVS_MSG(header);
184 	u64 reg;
185 
186 	reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
187 	trace_avs_ipc_reply_msg(header, reg);
188 
189 	ipc->rx.header = header;
190 	/* Abort copying payload if request processing was unsuccessful. */
191 	if (!msg.status) {
192 		/* update size in case of LARGE_CONFIG_GET */
193 		if (msg.msg_target == AVS_MOD_MSG &&
194 		    msg.global_msg_type == AVS_MOD_LARGE_CONFIG_GET)
195 			ipc->rx.size = min_t(u32, AVS_MAILBOX_SIZE,
196 					     msg.ext.large_config.data_off_size);
197 
198 		memcpy_fromio(ipc->rx.data, avs_uplink_addr(adev), ipc->rx.size);
199 		trace_avs_msg_payload(ipc->rx.data, ipc->rx.size);
200 	}
201 }
202 
203 static void avs_dsp_process_notification(struct avs_dev *adev, u64 header)
204 {
205 	struct avs_notify_mod_data mod_data;
206 	union avs_notify_msg msg = AVS_MSG(header);
207 	size_t data_size = 0;
208 	void *data = NULL;
209 	u64 reg;
210 
211 	reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
212 	trace_avs_ipc_notify_msg(header, reg);
213 
214 	/* Ignore spurious notifications until handshake is established. */
215 	if (!adev->ipc->ready && msg.notify_msg_type != AVS_NOTIFY_FW_READY) {
216 		dev_dbg(adev->dev, "FW not ready, skip notification: 0x%08x\n", msg.primary);
217 		return;
218 	}
219 
220 	/* Calculate notification payload size. */
221 	switch (msg.notify_msg_type) {
222 	case AVS_NOTIFY_FW_READY:
223 		break;
224 
225 	case AVS_NOTIFY_PHRASE_DETECTED:
226 		data_size = sizeof(struct avs_notify_voice_data);
227 		break;
228 
229 	case AVS_NOTIFY_RESOURCE_EVENT:
230 		data_size = sizeof(struct avs_notify_res_data);
231 		break;
232 
233 	case AVS_NOTIFY_LOG_BUFFER_STATUS:
234 	case AVS_NOTIFY_EXCEPTION_CAUGHT:
235 		break;
236 
237 	case AVS_NOTIFY_MODULE_EVENT:
238 		/* To know the total payload size, header needs to be read first. */
239 		memcpy_fromio(&mod_data, avs_uplink_addr(adev), sizeof(mod_data));
240 		data_size = sizeof(mod_data) + mod_data.data_size;
241 		break;
242 
243 	default:
244 		dev_info(adev->dev, "unknown notification: 0x%08x\n", msg.primary);
245 		break;
246 	}
247 
248 	if (data_size) {
249 		data = kmalloc(data_size, GFP_KERNEL);
250 		if (!data)
251 			return;
252 
253 		memcpy_fromio(data, avs_uplink_addr(adev), data_size);
254 		trace_avs_msg_payload(data, data_size);
255 	}
256 
257 	/* Perform notification-specific operations. */
258 	switch (msg.notify_msg_type) {
259 	case AVS_NOTIFY_FW_READY:
260 		dev_dbg(adev->dev, "FW READY 0x%08x\n", msg.primary);
261 		adev->ipc->ready = true;
262 		complete(&adev->fw_ready);
263 		break;
264 
265 	case AVS_NOTIFY_LOG_BUFFER_STATUS:
266 		avs_dsp_op(adev, log_buffer_status, &msg);
267 		break;
268 
269 	case AVS_NOTIFY_EXCEPTION_CAUGHT:
270 		avs_dsp_exception_caught(adev, &msg);
271 		break;
272 
273 	default:
274 		break;
275 	}
276 
277 	kfree(data);
278 }
279 
280 void avs_dsp_process_response(struct avs_dev *adev, u64 header)
281 {
282 	struct avs_ipc *ipc = adev->ipc;
283 
284 	/*
285 	 * Response may either be solicited - a reply for a request that has
286 	 * been sent beforehand - or unsolicited (notification).
287 	 */
288 	if (avs_msg_is_reply(header)) {
289 		/* Response processing is invoked from IRQ thread. */
290 		spin_lock_irq(&ipc->rx_lock);
291 		avs_dsp_receive_rx(adev, header);
292 		ipc->rx_completed = true;
293 		spin_unlock_irq(&ipc->rx_lock);
294 	} else {
295 		avs_dsp_process_notification(adev, header);
296 	}
297 
298 	complete(&ipc->busy_completion);
299 }
300 
301 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id)
302 {
303 	struct avs_dev *adev = dev_id;
304 	struct avs_ipc *ipc = adev->ipc;
305 	u32 adspis, hipc_rsp, hipc_ack;
306 	irqreturn_t ret = IRQ_NONE;
307 
308 	adspis = snd_hdac_adsp_readl(adev, AVS_ADSP_REG_ADSPIS);
309 	if (adspis == UINT_MAX || !(adspis & AVS_ADSP_ADSPIS_IPC))
310 		return ret;
311 
312 	hipc_ack = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCIE);
313 	hipc_rsp = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCT);
314 
315 	/* DSP acked host's request */
316 	if (hipc_ack & SKL_ADSP_HIPCIE_DONE) {
317 		/*
318 		 * As an extra precaution, mask done interrupt. Code executed
319 		 * due to complete() found below does not assume any masking.
320 		 */
321 		snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL,
322 				      AVS_ADSP_HIPCCTL_DONE, 0);
323 
324 		complete(&ipc->done_completion);
325 
326 		/* tell DSP it has our attention */
327 		snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCIE,
328 				      SKL_ADSP_HIPCIE_DONE,
329 				      SKL_ADSP_HIPCIE_DONE);
330 		/* unmask done interrupt */
331 		snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL,
332 				      AVS_ADSP_HIPCCTL_DONE,
333 				      AVS_ADSP_HIPCCTL_DONE);
334 		ret = IRQ_HANDLED;
335 	}
336 
337 	/* DSP sent new response to process */
338 	if (hipc_rsp & SKL_ADSP_HIPCT_BUSY) {
339 		/* mask busy interrupt */
340 		snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL,
341 				      AVS_ADSP_HIPCCTL_BUSY, 0);
342 
343 		ret = IRQ_WAKE_THREAD;
344 	}
345 
346 	return ret;
347 }
348 
349 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id)
350 {
351 	struct avs_dev *adev = dev_id;
352 	union avs_reply_msg msg;
353 	u32 hipct, hipcte;
354 
355 	hipct = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCT);
356 	hipcte = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCTE);
357 
358 	/* ensure DSP sent new response to process */
359 	if (!(hipct & SKL_ADSP_HIPCT_BUSY))
360 		return IRQ_NONE;
361 
362 	msg.primary = hipct;
363 	msg.ext.val = hipcte;
364 	avs_dsp_process_response(adev, msg.val);
365 
366 	/* tell DSP we accepted its message */
367 	snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCT,
368 			      SKL_ADSP_HIPCT_BUSY, SKL_ADSP_HIPCT_BUSY);
369 	/* unmask busy interrupt */
370 	snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL,
371 			      AVS_ADSP_HIPCCTL_BUSY, AVS_ADSP_HIPCCTL_BUSY);
372 
373 	return IRQ_HANDLED;
374 }
375 
376 static bool avs_ipc_is_busy(struct avs_ipc *ipc)
377 {
378 	struct avs_dev *adev = to_avs_dev(ipc->dev);
379 	u32 hipc_rsp;
380 
381 	hipc_rsp = snd_hdac_adsp_readl(adev, SKL_ADSP_REG_HIPCT);
382 	return hipc_rsp & SKL_ADSP_HIPCT_BUSY;
383 }
384 
385 static int avs_ipc_wait_busy_completion(struct avs_ipc *ipc, int timeout)
386 {
387 	u32 repeats_left = 128; /* to avoid infinite looping */
388 	int ret;
389 
390 again:
391 	ret = wait_for_completion_timeout(&ipc->busy_completion, msecs_to_jiffies(timeout));
392 
393 	/* DSP could be unresponsive at this point. */
394 	if (!ipc->ready)
395 		return -EPERM;
396 
397 	if (!ret) {
398 		if (!avs_ipc_is_busy(ipc))
399 			return -ETIMEDOUT;
400 		/*
401 		 * Firmware did its job, either notification or reply
402 		 * has been received - now wait until it's processed.
403 		 */
404 		wait_for_completion_killable(&ipc->busy_completion);
405 	}
406 
407 	/* Ongoing notification's bottom-half may cause early wakeup */
408 	spin_lock(&ipc->rx_lock);
409 	if (!ipc->rx_completed) {
410 		if (repeats_left) {
411 			/* Reply delayed due to notification. */
412 			repeats_left--;
413 			reinit_completion(&ipc->busy_completion);
414 			spin_unlock(&ipc->rx_lock);
415 			goto again;
416 		}
417 
418 		spin_unlock(&ipc->rx_lock);
419 		return -ETIMEDOUT;
420 	}
421 
422 	spin_unlock(&ipc->rx_lock);
423 	return 0;
424 }
425 
426 static void avs_ipc_msg_init(struct avs_ipc *ipc, struct avs_ipc_msg *reply)
427 {
428 	lockdep_assert_held(&ipc->rx_lock);
429 
430 	ipc->rx.header = 0;
431 	ipc->rx.size = reply ? reply->size : 0;
432 	ipc->rx_completed = false;
433 
434 	reinit_completion(&ipc->done_completion);
435 	reinit_completion(&ipc->busy_completion);
436 }
437 
438 static void avs_dsp_send_tx(struct avs_dev *adev, struct avs_ipc_msg *tx, bool read_fwregs)
439 {
440 	u64 reg = ULONG_MAX;
441 
442 	tx->header |= SKL_ADSP_HIPCI_BUSY;
443 	if (read_fwregs)
444 		reg = readq(avs_sram_addr(adev, AVS_FW_REGS_WINDOW));
445 
446 	trace_avs_request(tx, reg);
447 
448 	if (tx->size)
449 		memcpy_toio(avs_downlink_addr(adev), tx->data, tx->size);
450 	snd_hdac_adsp_writel(adev, SKL_ADSP_REG_HIPCIE, tx->header >> 32);
451 	snd_hdac_adsp_writel(adev, SKL_ADSP_REG_HIPCI, tx->header & UINT_MAX);
452 }
453 
454 static int avs_dsp_do_send_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
455 			       struct avs_ipc_msg *reply, int timeout)
456 {
457 	struct avs_ipc *ipc = adev->ipc;
458 	int ret;
459 
460 	if (!ipc->ready)
461 		return -EPERM;
462 
463 	mutex_lock(&ipc->msg_mutex);
464 
465 	spin_lock(&ipc->rx_lock);
466 	avs_ipc_msg_init(ipc, reply);
467 	avs_dsp_send_tx(adev, request, true);
468 	spin_unlock(&ipc->rx_lock);
469 
470 	ret = avs_ipc_wait_busy_completion(ipc, timeout);
471 	if (ret) {
472 		if (ret == -ETIMEDOUT) {
473 			union avs_notify_msg msg = AVS_NOTIFICATION(EXCEPTION_CAUGHT);
474 
475 			/* Same treatment as on exception, just stack_dump=0. */
476 			avs_dsp_exception_caught(adev, &msg);
477 		}
478 		goto exit;
479 	}
480 
481 	ret = ipc->rx.rsp.status;
482 	if (reply) {
483 		reply->header = ipc->rx.header;
484 		reply->size = ipc->rx.size;
485 		if (reply->data && ipc->rx.size)
486 			memcpy(reply->data, ipc->rx.data, reply->size);
487 	}
488 
489 exit:
490 	mutex_unlock(&ipc->msg_mutex);
491 	return ret;
492 }
493 
494 static int avs_dsp_send_msg_sequence(struct avs_dev *adev, struct avs_ipc_msg *request,
495 				     struct avs_ipc_msg *reply, int timeout, bool wake_d0i0,
496 				     bool schedule_d0ix)
497 {
498 	int ret;
499 
500 	trace_avs_d0ix("wake", wake_d0i0, request->header);
501 	if (wake_d0i0) {
502 		ret = avs_dsp_wake_d0i0(adev, request);
503 		if (ret)
504 			return ret;
505 	}
506 
507 	ret = avs_dsp_do_send_msg(adev, request, reply, timeout);
508 	if (ret)
509 		return ret;
510 
511 	trace_avs_d0ix("schedule", schedule_d0ix, request->header);
512 	if (schedule_d0ix)
513 		avs_dsp_schedule_d0ix(adev, request);
514 
515 	return 0;
516 }
517 
518 int avs_dsp_send_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,
519 			     struct avs_ipc_msg *reply, int timeout)
520 {
521 	bool wake_d0i0 = avs_dsp_op(adev, d0ix_toggle, request, true);
522 	bool schedule_d0ix = avs_dsp_op(adev, d0ix_toggle, request, false);
523 
524 	return avs_dsp_send_msg_sequence(adev, request, reply, timeout, wake_d0i0, schedule_d0ix);
525 }
526 
527 int avs_dsp_send_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
528 		     struct avs_ipc_msg *reply)
529 {
530 	return avs_dsp_send_msg_timeout(adev, request, reply, adev->ipc->default_timeout_ms);
531 }
532 
533 int avs_dsp_send_pm_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request,
534 				struct avs_ipc_msg *reply, int timeout, bool wake_d0i0)
535 {
536 	return avs_dsp_send_msg_sequence(adev, request, reply, timeout, wake_d0i0, false);
537 }
538 
539 int avs_dsp_send_pm_msg(struct avs_dev *adev, struct avs_ipc_msg *request,
540 			struct avs_ipc_msg *reply, bool wake_d0i0)
541 {
542 	return avs_dsp_send_pm_msg_timeout(adev, request, reply, adev->ipc->default_timeout_ms,
543 					   wake_d0i0);
544 }
545 
546 static int avs_dsp_do_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request, int timeout)
547 {
548 	struct avs_ipc *ipc = adev->ipc;
549 	int ret;
550 
551 	mutex_lock(&ipc->msg_mutex);
552 
553 	spin_lock(&ipc->rx_lock);
554 	avs_ipc_msg_init(ipc, NULL);
555 	/*
556 	 * with hw still stalled, memory windows may not be
557 	 * configured properly so avoid accessing SRAM
558 	 */
559 	avs_dsp_send_tx(adev, request, false);
560 	spin_unlock(&ipc->rx_lock);
561 
562 	/* ROM messages must be sent before main core is unstalled */
563 	ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false);
564 	if (!ret) {
565 		ret = wait_for_completion_timeout(&ipc->done_completion, msecs_to_jiffies(timeout));
566 		ret = ret ? 0 : -ETIMEDOUT;
567 	}
568 
569 	mutex_unlock(&ipc->msg_mutex);
570 
571 	return ret;
572 }
573 
574 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request, int timeout)
575 {
576 	return avs_dsp_do_send_rom_msg(adev, request, timeout);
577 }
578 
579 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request)
580 {
581 	return avs_dsp_send_rom_msg_timeout(adev, request, adev->ipc->default_timeout_ms);
582 }
583 
584 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable)
585 {
586 	u32 value, mask;
587 
588 	/*
589 	 * No particular bit setting order. All of these are required
590 	 * to have a functional SW <-> FW communication.
591 	 */
592 	value = enable ? AVS_ADSP_ADSPIC_IPC : 0;
593 	snd_hdac_adsp_updatel(adev, AVS_ADSP_REG_ADSPIC, AVS_ADSP_ADSPIC_IPC, value);
594 
595 	mask = AVS_ADSP_HIPCCTL_DONE | AVS_ADSP_HIPCCTL_BUSY;
596 	value = enable ? mask : 0;
597 	snd_hdac_adsp_updatel(adev, SKL_ADSP_REG_HIPCCTL, mask, value);
598 }
599 
600 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev)
601 {
602 	ipc->rx.data = devm_kzalloc(dev, AVS_MAILBOX_SIZE, GFP_KERNEL);
603 	if (!ipc->rx.data)
604 		return -ENOMEM;
605 
606 	ipc->dev = dev;
607 	ipc->ready = false;
608 	ipc->default_timeout_ms = AVS_IPC_TIMEOUT_MS;
609 	INIT_WORK(&ipc->recovery_work, avs_dsp_recovery_work);
610 	INIT_DELAYED_WORK(&ipc->d0ix_work, avs_dsp_d0ix_work);
611 	init_completion(&ipc->done_completion);
612 	init_completion(&ipc->busy_completion);
613 	spin_lock_init(&ipc->rx_lock);
614 	mutex_init(&ipc->msg_mutex);
615 
616 	return 0;
617 }
618 
619 void avs_ipc_block(struct avs_ipc *ipc)
620 {
621 	ipc->ready = false;
622 	cancel_work_sync(&ipc->recovery_work);
623 	cancel_delayed_work_sync(&ipc->d0ix_work);
624 	ipc->in_d0ix = false;
625 }
626