1a91eb199SMark Brown /* 2a91eb199SMark Brown * wm8904.c -- WM8904 ALSA SoC Audio driver 3a91eb199SMark Brown * 4a91eb199SMark Brown * Copyright 2009 Wolfson Microelectronics plc 5a91eb199SMark Brown * 6a91eb199SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7a91eb199SMark Brown * 8a91eb199SMark Brown * 9a91eb199SMark Brown * This program is free software; you can redistribute it and/or modify 10a91eb199SMark Brown * it under the terms of the GNU General Public License version 2 as 11a91eb199SMark Brown * published by the Free Software Foundation. 12a91eb199SMark Brown */ 13a91eb199SMark Brown 14a91eb199SMark Brown #include <linux/module.h> 15a91eb199SMark Brown #include <linux/moduleparam.h> 16a91eb199SMark Brown #include <linux/init.h> 17a91eb199SMark Brown #include <linux/delay.h> 18a91eb199SMark Brown #include <linux/pm.h> 19a91eb199SMark Brown #include <linux/i2c.h> 20a91eb199SMark Brown #include <linux/platform_device.h> 21a91eb199SMark Brown #include <linux/regulator/consumer.h> 225a0e3ad6STejun Heo #include <linux/slab.h> 23a91eb199SMark Brown #include <sound/core.h> 24a91eb199SMark Brown #include <sound/pcm.h> 25a91eb199SMark Brown #include <sound/pcm_params.h> 26a91eb199SMark Brown #include <sound/soc.h> 27a91eb199SMark Brown #include <sound/soc-dapm.h> 28a91eb199SMark Brown #include <sound/initval.h> 29a91eb199SMark Brown #include <sound/tlv.h> 30a91eb199SMark Brown #include <sound/wm8904.h> 31a91eb199SMark Brown 32a91eb199SMark Brown #include "wm8904.h" 33a91eb199SMark Brown 348c126474SMark Brown enum wm8904_type { 358c126474SMark Brown WM8904, 368c126474SMark Brown WM8912, 378c126474SMark Brown }; 388c126474SMark Brown 39a91eb199SMark Brown #define WM8904_NUM_DCS_CHANNELS 4 40a91eb199SMark Brown 41a91eb199SMark Brown #define WM8904_NUM_SUPPLIES 5 42a91eb199SMark Brown static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { 43a91eb199SMark Brown "DCVDD", 44a91eb199SMark Brown "DBVDD", 45a91eb199SMark Brown "AVDD", 46a91eb199SMark Brown "CPVDD", 47a91eb199SMark Brown "MICVDD", 48a91eb199SMark Brown }; 49a91eb199SMark Brown 50a91eb199SMark Brown /* codec private data */ 51a91eb199SMark Brown struct wm8904_priv { 52f0fba2adSLiam Girdwood 53a91eb199SMark Brown u16 reg_cache[WM8904_MAX_REGISTER + 1]; 54a91eb199SMark Brown 558c126474SMark Brown enum wm8904_type devtype; 56f0fba2adSLiam Girdwood void *control_data; 578c126474SMark Brown 58a91eb199SMark Brown struct regulator_bulk_data supplies[WM8904_NUM_SUPPLIES]; 59a91eb199SMark Brown 60a91eb199SMark Brown struct wm8904_pdata *pdata; 61a91eb199SMark Brown 62a91eb199SMark Brown int deemph; 63a91eb199SMark Brown 64a91eb199SMark Brown /* Platform provided DRC configuration */ 65a91eb199SMark Brown const char **drc_texts; 66a91eb199SMark Brown int drc_cfg; 67a91eb199SMark Brown struct soc_enum drc_enum; 68a91eb199SMark Brown 69a91eb199SMark Brown /* Platform provided ReTune mobile configuration */ 70a91eb199SMark Brown int num_retune_mobile_texts; 71a91eb199SMark Brown const char **retune_mobile_texts; 72a91eb199SMark Brown int retune_mobile_cfg; 73a91eb199SMark Brown struct soc_enum retune_mobile_enum; 74a91eb199SMark Brown 75a91eb199SMark Brown /* FLL setup */ 76a91eb199SMark Brown int fll_src; 77a91eb199SMark Brown int fll_fref; 78a91eb199SMark Brown int fll_fout; 79a91eb199SMark Brown 80a91eb199SMark Brown /* Clocking configuration */ 81a91eb199SMark Brown unsigned int mclk_rate; 82a91eb199SMark Brown int sysclk_src; 83a91eb199SMark Brown unsigned int sysclk_rate; 84a91eb199SMark Brown 85a91eb199SMark Brown int tdm_width; 86a91eb199SMark Brown int tdm_slots; 87a91eb199SMark Brown int bclk; 88a91eb199SMark Brown int fs; 89a91eb199SMark Brown 90a91eb199SMark Brown /* DC servo configuration - cached offset values */ 91a91eb199SMark Brown int dcs_state[WM8904_NUM_DCS_CHANNELS]; 92a91eb199SMark Brown }; 93a91eb199SMark Brown 94a91eb199SMark Brown static const u16 wm8904_reg[WM8904_MAX_REGISTER + 1] = { 95a91eb199SMark Brown 0x8904, /* R0 - SW Reset and ID */ 96a91eb199SMark Brown 0x0000, /* R1 - Revision */ 97a91eb199SMark Brown 0x0000, /* R2 */ 98a91eb199SMark Brown 0x0000, /* R3 */ 99a91eb199SMark Brown 0x0018, /* R4 - Bias Control 0 */ 100a91eb199SMark Brown 0x0000, /* R5 - VMID Control 0 */ 101a91eb199SMark Brown 0x0000, /* R6 - Mic Bias Control 0 */ 102a91eb199SMark Brown 0x0000, /* R7 - Mic Bias Control 1 */ 103a91eb199SMark Brown 0x0001, /* R8 - Analogue DAC 0 */ 104a91eb199SMark Brown 0x9696, /* R9 - mic Filter Control */ 105a91eb199SMark Brown 0x0001, /* R10 - Analogue ADC 0 */ 106a91eb199SMark Brown 0x0000, /* R11 */ 107a91eb199SMark Brown 0x0000, /* R12 - Power Management 0 */ 108a91eb199SMark Brown 0x0000, /* R13 */ 109a91eb199SMark Brown 0x0000, /* R14 - Power Management 2 */ 110a91eb199SMark Brown 0x0000, /* R15 - Power Management 3 */ 111a91eb199SMark Brown 0x0000, /* R16 */ 112a91eb199SMark Brown 0x0000, /* R17 */ 113a91eb199SMark Brown 0x0000, /* R18 - Power Management 6 */ 114a91eb199SMark Brown 0x0000, /* R19 */ 115a91eb199SMark Brown 0x945E, /* R20 - Clock Rates 0 */ 116a91eb199SMark Brown 0x0C05, /* R21 - Clock Rates 1 */ 117a91eb199SMark Brown 0x0006, /* R22 - Clock Rates 2 */ 118a91eb199SMark Brown 0x0000, /* R23 */ 119a91eb199SMark Brown 0x0050, /* R24 - Audio Interface 0 */ 120a91eb199SMark Brown 0x000A, /* R25 - Audio Interface 1 */ 121a91eb199SMark Brown 0x00E4, /* R26 - Audio Interface 2 */ 122a91eb199SMark Brown 0x0040, /* R27 - Audio Interface 3 */ 123a91eb199SMark Brown 0x0000, /* R28 */ 124a91eb199SMark Brown 0x0000, /* R29 */ 125a91eb199SMark Brown 0x00C0, /* R30 - DAC Digital Volume Left */ 126a91eb199SMark Brown 0x00C0, /* R31 - DAC Digital Volume Right */ 127a91eb199SMark Brown 0x0000, /* R32 - DAC Digital 0 */ 128a91eb199SMark Brown 0x0008, /* R33 - DAC Digital 1 */ 129a91eb199SMark Brown 0x0000, /* R34 */ 130a91eb199SMark Brown 0x0000, /* R35 */ 131a91eb199SMark Brown 0x00C0, /* R36 - ADC Digital Volume Left */ 132a91eb199SMark Brown 0x00C0, /* R37 - ADC Digital Volume Right */ 133a91eb199SMark Brown 0x0010, /* R38 - ADC Digital 0 */ 134a91eb199SMark Brown 0x0000, /* R39 - Digital Microphone 0 */ 135a91eb199SMark Brown 0x01AF, /* R40 - DRC 0 */ 136a91eb199SMark Brown 0x3248, /* R41 - DRC 1 */ 137a91eb199SMark Brown 0x0000, /* R42 - DRC 2 */ 138a91eb199SMark Brown 0x0000, /* R43 - DRC 3 */ 139a91eb199SMark Brown 0x0085, /* R44 - Analogue Left Input 0 */ 140a91eb199SMark Brown 0x0085, /* R45 - Analogue Right Input 0 */ 141a91eb199SMark Brown 0x0044, /* R46 - Analogue Left Input 1 */ 142a91eb199SMark Brown 0x0044, /* R47 - Analogue Right Input 1 */ 143a91eb199SMark Brown 0x0000, /* R48 */ 144a91eb199SMark Brown 0x0000, /* R49 */ 145a91eb199SMark Brown 0x0000, /* R50 */ 146a91eb199SMark Brown 0x0000, /* R51 */ 147a91eb199SMark Brown 0x0000, /* R52 */ 148a91eb199SMark Brown 0x0000, /* R53 */ 149a91eb199SMark Brown 0x0000, /* R54 */ 150a91eb199SMark Brown 0x0000, /* R55 */ 151a91eb199SMark Brown 0x0000, /* R56 */ 152a91eb199SMark Brown 0x002D, /* R57 - Analogue OUT1 Left */ 153a91eb199SMark Brown 0x002D, /* R58 - Analogue OUT1 Right */ 154a91eb199SMark Brown 0x0039, /* R59 - Analogue OUT2 Left */ 155a91eb199SMark Brown 0x0039, /* R60 - Analogue OUT2 Right */ 156a91eb199SMark Brown 0x0000, /* R61 - Analogue OUT12 ZC */ 157a91eb199SMark Brown 0x0000, /* R62 */ 158a91eb199SMark Brown 0x0000, /* R63 */ 159a91eb199SMark Brown 0x0000, /* R64 */ 160a91eb199SMark Brown 0x0000, /* R65 */ 161a91eb199SMark Brown 0x0000, /* R66 */ 162a91eb199SMark Brown 0x0000, /* R67 - DC Servo 0 */ 163a91eb199SMark Brown 0x0000, /* R68 - DC Servo 1 */ 164a91eb199SMark Brown 0xAAAA, /* R69 - DC Servo 2 */ 165a91eb199SMark Brown 0x0000, /* R70 */ 166a91eb199SMark Brown 0xAAAA, /* R71 - DC Servo 4 */ 167a91eb199SMark Brown 0xAAAA, /* R72 - DC Servo 5 */ 168a91eb199SMark Brown 0x0000, /* R73 - DC Servo 6 */ 169a91eb199SMark Brown 0x0000, /* R74 - DC Servo 7 */ 170a91eb199SMark Brown 0x0000, /* R75 - DC Servo 8 */ 171a91eb199SMark Brown 0x0000, /* R76 - DC Servo 9 */ 172a91eb199SMark Brown 0x0000, /* R77 - DC Servo Readback 0 */ 173a91eb199SMark Brown 0x0000, /* R78 */ 174a91eb199SMark Brown 0x0000, /* R79 */ 175a91eb199SMark Brown 0x0000, /* R80 */ 176a91eb199SMark Brown 0x0000, /* R81 */ 177a91eb199SMark Brown 0x0000, /* R82 */ 178a91eb199SMark Brown 0x0000, /* R83 */ 179a91eb199SMark Brown 0x0000, /* R84 */ 180a91eb199SMark Brown 0x0000, /* R85 */ 181a91eb199SMark Brown 0x0000, /* R86 */ 182a91eb199SMark Brown 0x0000, /* R87 */ 183a91eb199SMark Brown 0x0000, /* R88 */ 184a91eb199SMark Brown 0x0000, /* R89 */ 185a91eb199SMark Brown 0x0000, /* R90 - Analogue HP 0 */ 186a91eb199SMark Brown 0x0000, /* R91 */ 187a91eb199SMark Brown 0x0000, /* R92 */ 188a91eb199SMark Brown 0x0000, /* R93 */ 189a91eb199SMark Brown 0x0000, /* R94 - Analogue Lineout 0 */ 190a91eb199SMark Brown 0x0000, /* R95 */ 191a91eb199SMark Brown 0x0000, /* R96 */ 192a91eb199SMark Brown 0x0000, /* R97 */ 193a91eb199SMark Brown 0x0000, /* R98 - Charge Pump 0 */ 194a91eb199SMark Brown 0x0000, /* R99 */ 195a91eb199SMark Brown 0x0000, /* R100 */ 196a91eb199SMark Brown 0x0000, /* R101 */ 197a91eb199SMark Brown 0x0000, /* R102 */ 198a91eb199SMark Brown 0x0000, /* R103 */ 199a91eb199SMark Brown 0x0004, /* R104 - Class W 0 */ 200a91eb199SMark Brown 0x0000, /* R105 */ 201a91eb199SMark Brown 0x0000, /* R106 */ 202a91eb199SMark Brown 0x0000, /* R107 */ 203a91eb199SMark Brown 0x0000, /* R108 - Write Sequencer 0 */ 204a91eb199SMark Brown 0x0000, /* R109 - Write Sequencer 1 */ 205a91eb199SMark Brown 0x0000, /* R110 - Write Sequencer 2 */ 206a91eb199SMark Brown 0x0000, /* R111 - Write Sequencer 3 */ 207a91eb199SMark Brown 0x0000, /* R112 - Write Sequencer 4 */ 208a91eb199SMark Brown 0x0000, /* R113 */ 209a91eb199SMark Brown 0x0000, /* R114 */ 210a91eb199SMark Brown 0x0000, /* R115 */ 211a91eb199SMark Brown 0x0000, /* R116 - FLL Control 1 */ 212a91eb199SMark Brown 0x0007, /* R117 - FLL Control 2 */ 213a91eb199SMark Brown 0x0000, /* R118 - FLL Control 3 */ 214a91eb199SMark Brown 0x2EE0, /* R119 - FLL Control 4 */ 215a91eb199SMark Brown 0x0004, /* R120 - FLL Control 5 */ 216a91eb199SMark Brown 0x0014, /* R121 - GPIO Control 1 */ 217a91eb199SMark Brown 0x0010, /* R122 - GPIO Control 2 */ 218a91eb199SMark Brown 0x0010, /* R123 - GPIO Control 3 */ 219a91eb199SMark Brown 0x0000, /* R124 - GPIO Control 4 */ 220a91eb199SMark Brown 0x0000, /* R125 */ 221a91eb199SMark Brown 0x0000, /* R126 - Digital Pulls */ 222a91eb199SMark Brown 0x0000, /* R127 - Interrupt Status */ 223a91eb199SMark Brown 0xFFFF, /* R128 - Interrupt Status Mask */ 224a91eb199SMark Brown 0x0000, /* R129 - Interrupt Polarity */ 225a91eb199SMark Brown 0x0000, /* R130 - Interrupt Debounce */ 226a91eb199SMark Brown 0x0000, /* R131 */ 227a91eb199SMark Brown 0x0000, /* R132 */ 228a91eb199SMark Brown 0x0000, /* R133 */ 229a91eb199SMark Brown 0x0000, /* R134 - EQ1 */ 230a91eb199SMark Brown 0x000C, /* R135 - EQ2 */ 231a91eb199SMark Brown 0x000C, /* R136 - EQ3 */ 232a91eb199SMark Brown 0x000C, /* R137 - EQ4 */ 233a91eb199SMark Brown 0x000C, /* R138 - EQ5 */ 234a91eb199SMark Brown 0x000C, /* R139 - EQ6 */ 235a91eb199SMark Brown 0x0FCA, /* R140 - EQ7 */ 236a91eb199SMark Brown 0x0400, /* R141 - EQ8 */ 237a91eb199SMark Brown 0x00D8, /* R142 - EQ9 */ 238a91eb199SMark Brown 0x1EB5, /* R143 - EQ10 */ 239a91eb199SMark Brown 0xF145, /* R144 - EQ11 */ 240a91eb199SMark Brown 0x0B75, /* R145 - EQ12 */ 241a91eb199SMark Brown 0x01C5, /* R146 - EQ13 */ 242a91eb199SMark Brown 0x1C58, /* R147 - EQ14 */ 243a91eb199SMark Brown 0xF373, /* R148 - EQ15 */ 244a91eb199SMark Brown 0x0A54, /* R149 - EQ16 */ 245a91eb199SMark Brown 0x0558, /* R150 - EQ17 */ 246a91eb199SMark Brown 0x168E, /* R151 - EQ18 */ 247a91eb199SMark Brown 0xF829, /* R152 - EQ19 */ 248a91eb199SMark Brown 0x07AD, /* R153 - EQ20 */ 249a91eb199SMark Brown 0x1103, /* R154 - EQ21 */ 250a91eb199SMark Brown 0x0564, /* R155 - EQ22 */ 251a91eb199SMark Brown 0x0559, /* R156 - EQ23 */ 252a91eb199SMark Brown 0x4000, /* R157 - EQ24 */ 253a91eb199SMark Brown 0x0000, /* R158 */ 254a91eb199SMark Brown 0x0000, /* R159 */ 255a91eb199SMark Brown 0x0000, /* R160 */ 256a91eb199SMark Brown 0x0000, /* R161 - Control Interface Test 1 */ 257a91eb199SMark Brown 0x0000, /* R162 */ 258a91eb199SMark Brown 0x0000, /* R163 */ 259a91eb199SMark Brown 0x0000, /* R164 */ 260a91eb199SMark Brown 0x0000, /* R165 */ 261a91eb199SMark Brown 0x0000, /* R166 */ 262a91eb199SMark Brown 0x0000, /* R167 */ 263a91eb199SMark Brown 0x0000, /* R168 */ 264a91eb199SMark Brown 0x0000, /* R169 */ 265a91eb199SMark Brown 0x0000, /* R170 */ 266a91eb199SMark Brown 0x0000, /* R171 */ 267a91eb199SMark Brown 0x0000, /* R172 */ 268a91eb199SMark Brown 0x0000, /* R173 */ 269a91eb199SMark Brown 0x0000, /* R174 */ 270a91eb199SMark Brown 0x0000, /* R175 */ 271a91eb199SMark Brown 0x0000, /* R176 */ 272a91eb199SMark Brown 0x0000, /* R177 */ 273a91eb199SMark Brown 0x0000, /* R178 */ 274a91eb199SMark Brown 0x0000, /* R179 */ 275a91eb199SMark Brown 0x0000, /* R180 */ 276a91eb199SMark Brown 0x0000, /* R181 */ 277a91eb199SMark Brown 0x0000, /* R182 */ 278a91eb199SMark Brown 0x0000, /* R183 */ 279a91eb199SMark Brown 0x0000, /* R184 */ 280a91eb199SMark Brown 0x0000, /* R185 */ 281a91eb199SMark Brown 0x0000, /* R186 */ 282a91eb199SMark Brown 0x0000, /* R187 */ 283a91eb199SMark Brown 0x0000, /* R188 */ 284a91eb199SMark Brown 0x0000, /* R189 */ 285a91eb199SMark Brown 0x0000, /* R190 */ 286a91eb199SMark Brown 0x0000, /* R191 */ 287a91eb199SMark Brown 0x0000, /* R192 */ 288a91eb199SMark Brown 0x0000, /* R193 */ 289a91eb199SMark Brown 0x0000, /* R194 */ 290a91eb199SMark Brown 0x0000, /* R195 */ 291a91eb199SMark Brown 0x0000, /* R196 */ 292a91eb199SMark Brown 0x0000, /* R197 */ 293a91eb199SMark Brown 0x0000, /* R198 */ 294a91eb199SMark Brown 0x0000, /* R199 */ 295a91eb199SMark Brown 0x0000, /* R200 */ 296a91eb199SMark Brown 0x0000, /* R201 */ 297a91eb199SMark Brown 0x0000, /* R202 */ 298a91eb199SMark Brown 0x0000, /* R203 */ 299a91eb199SMark Brown 0x0000, /* R204 - Analogue Output Bias 0 */ 300a91eb199SMark Brown 0x0000, /* R205 */ 301a91eb199SMark Brown 0x0000, /* R206 */ 302a91eb199SMark Brown 0x0000, /* R207 */ 303a91eb199SMark Brown 0x0000, /* R208 */ 304a91eb199SMark Brown 0x0000, /* R209 */ 305a91eb199SMark Brown 0x0000, /* R210 */ 306a91eb199SMark Brown 0x0000, /* R211 */ 307a91eb199SMark Brown 0x0000, /* R212 */ 308a91eb199SMark Brown 0x0000, /* R213 */ 309a91eb199SMark Brown 0x0000, /* R214 */ 310a91eb199SMark Brown 0x0000, /* R215 */ 311a91eb199SMark Brown 0x0000, /* R216 */ 312a91eb199SMark Brown 0x0000, /* R217 */ 313a91eb199SMark Brown 0x0000, /* R218 */ 314a91eb199SMark Brown 0x0000, /* R219 */ 315a91eb199SMark Brown 0x0000, /* R220 */ 316a91eb199SMark Brown 0x0000, /* R221 */ 317a91eb199SMark Brown 0x0000, /* R222 */ 318a91eb199SMark Brown 0x0000, /* R223 */ 319a91eb199SMark Brown 0x0000, /* R224 */ 320a91eb199SMark Brown 0x0000, /* R225 */ 321a91eb199SMark Brown 0x0000, /* R226 */ 322a91eb199SMark Brown 0x0000, /* R227 */ 323a91eb199SMark Brown 0x0000, /* R228 */ 324a91eb199SMark Brown 0x0000, /* R229 */ 325a91eb199SMark Brown 0x0000, /* R230 */ 326a91eb199SMark Brown 0x0000, /* R231 */ 327a91eb199SMark Brown 0x0000, /* R232 */ 328a91eb199SMark Brown 0x0000, /* R233 */ 329a91eb199SMark Brown 0x0000, /* R234 */ 330a91eb199SMark Brown 0x0000, /* R235 */ 331a91eb199SMark Brown 0x0000, /* R236 */ 332a91eb199SMark Brown 0x0000, /* R237 */ 333a91eb199SMark Brown 0x0000, /* R238 */ 334a91eb199SMark Brown 0x0000, /* R239 */ 335a91eb199SMark Brown 0x0000, /* R240 */ 336a91eb199SMark Brown 0x0000, /* R241 */ 337a91eb199SMark Brown 0x0000, /* R242 */ 338a91eb199SMark Brown 0x0000, /* R243 */ 339a91eb199SMark Brown 0x0000, /* R244 */ 340a91eb199SMark Brown 0x0000, /* R245 */ 341a91eb199SMark Brown 0x0000, /* R246 */ 342a91eb199SMark Brown 0x0000, /* R247 - FLL NCO Test 0 */ 343a91eb199SMark Brown 0x0019, /* R248 - FLL NCO Test 1 */ 344a91eb199SMark Brown }; 345a91eb199SMark Brown 346a91eb199SMark Brown static struct { 347a91eb199SMark Brown int readable; 348a91eb199SMark Brown int writable; 349a91eb199SMark Brown int vol; 350a91eb199SMark Brown } wm8904_access[] = { 351a91eb199SMark Brown { 0xFFFF, 0xFFFF, 1 }, /* R0 - SW Reset and ID */ 352a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R1 - Revision */ 353a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R2 */ 354a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R3 */ 355a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R4 - Bias Control 0 */ 356a91eb199SMark Brown { 0x0047, 0x0047, 0 }, /* R5 - VMID Control 0 */ 357a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R6 - Mic Bias Control 0 */ 358a91eb199SMark Brown { 0xC007, 0xC007, 0 }, /* R7 - Mic Bias Control 1 */ 359a91eb199SMark Brown { 0x001E, 0x001E, 0 }, /* R8 - Analogue DAC 0 */ 360a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R9 - mic Filter Control */ 361a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R10 - Analogue ADC 0 */ 362a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R11 */ 363a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R12 - Power Management 0 */ 364a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R13 */ 365a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R14 - Power Management 2 */ 366a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R15 - Power Management 3 */ 367a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R16 */ 368a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R17 */ 369a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R18 - Power Management 6 */ 370a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R19 */ 371a91eb199SMark Brown { 0x7001, 0x7001, 0 }, /* R20 - Clock Rates 0 */ 372a91eb199SMark Brown { 0x3C07, 0x3C07, 0 }, /* R21 - Clock Rates 1 */ 373a91eb199SMark Brown { 0xD00F, 0xD00F, 0 }, /* R22 - Clock Rates 2 */ 374a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R23 */ 375a91eb199SMark Brown { 0x1FFF, 0x1FFF, 0 }, /* R24 - Audio Interface 0 */ 376a91eb199SMark Brown { 0x3DDF, 0x3DDF, 0 }, /* R25 - Audio Interface 1 */ 377a91eb199SMark Brown { 0x0F1F, 0x0F1F, 0 }, /* R26 - Audio Interface 2 */ 378a91eb199SMark Brown { 0x0FFF, 0x0FFF, 0 }, /* R27 - Audio Interface 3 */ 379a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R28 */ 380a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R29 */ 381a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R30 - DAC Digital Volume Left */ 382a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R31 - DAC Digital Volume Right */ 383a91eb199SMark Brown { 0x0FFF, 0x0FFF, 0 }, /* R32 - DAC Digital 0 */ 384a91eb199SMark Brown { 0x1E4E, 0x1E4E, 0 }, /* R33 - DAC Digital 1 */ 385a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R34 */ 386a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R35 */ 387a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R36 - ADC Digital Volume Left */ 388a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R37 - ADC Digital Volume Right */ 389a91eb199SMark Brown { 0x0073, 0x0073, 0 }, /* R38 - ADC Digital 0 */ 390a91eb199SMark Brown { 0x1800, 0x1800, 0 }, /* R39 - Digital Microphone 0 */ 391a91eb199SMark Brown { 0xDFEF, 0xDFEF, 0 }, /* R40 - DRC 0 */ 392a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R41 - DRC 1 */ 393a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R42 - DRC 2 */ 394a91eb199SMark Brown { 0x07FF, 0x07FF, 0 }, /* R43 - DRC 3 */ 395a91eb199SMark Brown { 0x009F, 0x009F, 0 }, /* R44 - Analogue Left Input 0 */ 396a91eb199SMark Brown { 0x009F, 0x009F, 0 }, /* R45 - Analogue Right Input 0 */ 397a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R46 - Analogue Left Input 1 */ 398a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R47 - Analogue Right Input 1 */ 399a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R48 */ 400a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R49 */ 401a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R50 */ 402a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R51 */ 403a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R52 */ 404a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R53 */ 405a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R54 */ 406a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R55 */ 407a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R56 */ 408a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R57 - Analogue OUT1 Left */ 409a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R58 - Analogue OUT1 Right */ 410a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R59 - Analogue OUT2 Left */ 411a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R60 - Analogue OUT2 Right */ 412a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R61 - Analogue OUT12 ZC */ 413a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R62 */ 414a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R63 */ 415a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R64 */ 416a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R65 */ 417a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R66 */ 418a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R67 - DC Servo 0 */ 419a91eb199SMark Brown { 0xFFFF, 0xFFFF, 1 }, /* R68 - DC Servo 1 */ 420a91eb199SMark Brown { 0x0F0F, 0x0F0F, 0 }, /* R69 - DC Servo 2 */ 421a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R70 */ 422a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R71 - DC Servo 4 */ 423a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R72 - DC Servo 5 */ 424a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R73 - DC Servo 6 */ 425a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R74 - DC Servo 7 */ 426a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R75 - DC Servo 8 */ 427a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R76 - DC Servo 9 */ 428a91eb199SMark Brown { 0x0FFF, 0x0000, 1 }, /* R77 - DC Servo Readback 0 */ 429a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R78 */ 430a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R79 */ 431a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R80 */ 432a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R81 */ 433a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R82 */ 434a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R83 */ 435a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R84 */ 436a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R85 */ 437a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R86 */ 438a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R87 */ 439a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R88 */ 440a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R89 */ 441a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R90 - Analogue HP 0 */ 442a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R91 */ 443a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R92 */ 444a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R93 */ 445a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R94 - Analogue Lineout 0 */ 446a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R95 */ 447a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R96 */ 448a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R97 */ 449a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R98 - Charge Pump 0 */ 450a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R99 */ 451a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R100 */ 452a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R101 */ 453a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R102 */ 454a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R103 */ 455a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R104 - Class W 0 */ 456a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R105 */ 457a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R106 */ 458a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R107 */ 459a91eb199SMark Brown { 0x011F, 0x011F, 0 }, /* R108 - Write Sequencer 0 */ 460a91eb199SMark Brown { 0x7FFF, 0x7FFF, 0 }, /* R109 - Write Sequencer 1 */ 461a91eb199SMark Brown { 0x4FFF, 0x4FFF, 0 }, /* R110 - Write Sequencer 2 */ 462a91eb199SMark Brown { 0x003F, 0x033F, 0 }, /* R111 - Write Sequencer 3 */ 463a91eb199SMark Brown { 0x03F1, 0x0000, 0 }, /* R112 - Write Sequencer 4 */ 464a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R113 */ 465a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R114 */ 466a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R115 */ 467a91eb199SMark Brown { 0x0007, 0x0007, 0 }, /* R116 - FLL Control 1 */ 468a91eb199SMark Brown { 0x3F77, 0x3F77, 0 }, /* R117 - FLL Control 2 */ 469a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R118 - FLL Control 3 */ 470a91eb199SMark Brown { 0x7FEF, 0x7FEF, 0 }, /* R119 - FLL Control 4 */ 471a91eb199SMark Brown { 0x001B, 0x001B, 0 }, /* R120 - FLL Control 5 */ 472a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R121 - GPIO Control 1 */ 473a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R122 - GPIO Control 2 */ 474a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R123 - GPIO Control 3 */ 475a91eb199SMark Brown { 0x038F, 0x038F, 0 }, /* R124 - GPIO Control 4 */ 476a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R125 */ 477a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R126 - Digital Pulls */ 478a91eb199SMark Brown { 0x07FF, 0x03FF, 1 }, /* R127 - Interrupt Status */ 479a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R128 - Interrupt Status Mask */ 480a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R129 - Interrupt Polarity */ 481a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R130 - Interrupt Debounce */ 482a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R131 */ 483a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R132 */ 484a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R133 */ 485a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R134 - EQ1 */ 486a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R135 - EQ2 */ 487a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R136 - EQ3 */ 488a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R137 - EQ4 */ 489a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R138 - EQ5 */ 490a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R139 - EQ6 */ 491a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R140 - EQ7 */ 492a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R141 - EQ8 */ 493a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R142 - EQ9 */ 494a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R143 - EQ10 */ 495a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R144 - EQ11 */ 496a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R145 - EQ12 */ 497a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R146 - EQ13 */ 498a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R147 - EQ14 */ 499a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R148 - EQ15 */ 500a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R149 - EQ16 */ 501a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R150 - EQ17 */ 502a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R151wm8523_dai - EQ18 */ 503a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R152 - EQ19 */ 504a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R153 - EQ20 */ 505a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R154 - EQ21 */ 506a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R155 - EQ22 */ 507a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R156 - EQ23 */ 508a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R157 - EQ24 */ 509a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R158 */ 510a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R159 */ 511a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R160 */ 512a91eb199SMark Brown { 0x0002, 0x0002, 0 }, /* R161 - Control Interface Test 1 */ 513a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R162 */ 514a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R163 */ 515a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R164 */ 516a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R165 */ 517a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R166 */ 518a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R167 */ 519a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R168 */ 520a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R169 */ 521a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R170 */ 522a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R171 */ 523a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R172 */ 524a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R173 */ 525a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R174 */ 526a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R175 */ 527a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R176 */ 528a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R177 */ 529a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R178 */ 530a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R179 */ 531a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R180 */ 532a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R181 */ 533a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R182 */ 534a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R183 */ 535a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R184 */ 536a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R185 */ 537a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R186 */ 538a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R187 */ 539a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R188 */ 540a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R189 */ 541a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R190 */ 542a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R191 */ 543a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R192 */ 544a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R193 */ 545a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R194 */ 546a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R195 */ 547a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R196 */ 548a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R197 */ 549a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R198 */ 550a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R199 */ 551a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R200 */ 552a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R201 */ 553a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R202 */ 554a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R203 */ 555a91eb199SMark Brown { 0x0070, 0x0070, 0 }, /* R204 - Analogue Output Bias 0 */ 556a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R205 */ 557a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R206 */ 558a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R207 */ 559a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R208 */ 560a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R209 */ 561a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R210 */ 562a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R211 */ 563a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R212 */ 564a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R213 */ 565a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R214 */ 566a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R215 */ 567a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R216 */ 568a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R217 */ 569a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R218 */ 570a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R219 */ 571a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R220 */ 572a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R221 */ 573a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R222 */ 574a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R223 */ 575a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R224 */ 576a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R225 */ 577a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R226 */ 578a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R227 */ 579a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R228 */ 580a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R229 */ 581a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R230 */ 582a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R231 */ 583a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R232 */ 584a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R233 */ 585a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R234 */ 586a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R235 */ 587a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R236 */ 588a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R237 */ 589a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R238 */ 590a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R239 */ 591a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R240 */ 592a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R241 */ 593a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R242 */ 594a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R243 */ 595a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R244 */ 596a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R245 */ 597a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R246 */ 598a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R247 - FLL NCO Test 0 */ 599a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R248 - FLL NCO Test 1 */ 600a91eb199SMark Brown }; 601a91eb199SMark Brown 602a91eb199SMark Brown static int wm8904_volatile_register(unsigned int reg) 603a91eb199SMark Brown { 604a91eb199SMark Brown return wm8904_access[reg].vol; 605a91eb199SMark Brown } 606a91eb199SMark Brown 607a91eb199SMark Brown static int wm8904_reset(struct snd_soc_codec *codec) 608a91eb199SMark Brown { 609a91eb199SMark Brown return snd_soc_write(codec, WM8904_SW_RESET_AND_ID, 0); 610a91eb199SMark Brown } 611a91eb199SMark Brown 612a91eb199SMark Brown static int wm8904_configure_clocking(struct snd_soc_codec *codec) 613a91eb199SMark Brown { 614b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 615a91eb199SMark Brown unsigned int clock0, clock2, rate; 616a91eb199SMark Brown 617a91eb199SMark Brown /* Gate the clock while we're updating to avoid misclocking */ 618a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 619a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 620a91eb199SMark Brown WM8904_SYSCLK_SRC, 0); 621a91eb199SMark Brown 622a91eb199SMark Brown /* This should be done on init() for bypass paths */ 623a91eb199SMark Brown switch (wm8904->sysclk_src) { 624a91eb199SMark Brown case WM8904_CLK_MCLK: 625a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate); 626a91eb199SMark Brown 627a91eb199SMark Brown clock2 &= ~WM8904_SYSCLK_SRC; 628a91eb199SMark Brown rate = wm8904->mclk_rate; 629a91eb199SMark Brown 630a91eb199SMark Brown /* Ensure the FLL is stopped */ 631a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 632a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 633a91eb199SMark Brown break; 634a91eb199SMark Brown 635a91eb199SMark Brown case WM8904_CLK_FLL: 636a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz FLL clock\n", 637a91eb199SMark Brown wm8904->fll_fout); 638a91eb199SMark Brown 639a91eb199SMark Brown clock2 |= WM8904_SYSCLK_SRC; 640a91eb199SMark Brown rate = wm8904->fll_fout; 641a91eb199SMark Brown break; 642a91eb199SMark Brown 643a91eb199SMark Brown default: 644a91eb199SMark Brown dev_err(codec->dev, "System clock not configured\n"); 645a91eb199SMark Brown return -EINVAL; 646a91eb199SMark Brown } 647a91eb199SMark Brown 648a91eb199SMark Brown /* SYSCLK shouldn't be over 13.5MHz */ 649a91eb199SMark Brown if (rate > 13500000) { 650a91eb199SMark Brown clock0 = WM8904_MCLK_DIV; 651a91eb199SMark Brown wm8904->sysclk_rate = rate / 2; 652a91eb199SMark Brown } else { 653a91eb199SMark Brown clock0 = 0; 654a91eb199SMark Brown wm8904->sysclk_rate = rate; 655a91eb199SMark Brown } 656a91eb199SMark Brown 657a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV, 658a91eb199SMark Brown clock0); 659a91eb199SMark Brown 660a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 661a91eb199SMark Brown WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2); 662a91eb199SMark Brown 663a91eb199SMark Brown dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate); 664a91eb199SMark Brown 665a91eb199SMark Brown return 0; 666a91eb199SMark Brown } 667a91eb199SMark Brown 668a91eb199SMark Brown static void wm8904_set_drc(struct snd_soc_codec *codec) 669a91eb199SMark Brown { 670b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 671a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 672a91eb199SMark Brown int save, i; 673a91eb199SMark Brown 674a91eb199SMark Brown /* Save any enables; the configuration should clear them. */ 675a91eb199SMark Brown save = snd_soc_read(codec, WM8904_DRC_0); 676a91eb199SMark Brown 677a91eb199SMark Brown for (i = 0; i < WM8904_DRC_REGS; i++) 678a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff, 679a91eb199SMark Brown pdata->drc_cfgs[wm8904->drc_cfg].regs[i]); 680a91eb199SMark Brown 681a91eb199SMark Brown /* Reenable the DRC */ 682a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0, 683a91eb199SMark Brown WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save); 684a91eb199SMark Brown } 685a91eb199SMark Brown 686a91eb199SMark Brown static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 687a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 688a91eb199SMark Brown { 689a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 690b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 691a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 692a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 693a91eb199SMark Brown 694a91eb199SMark Brown if (value >= pdata->num_drc_cfgs) 695a91eb199SMark Brown return -EINVAL; 696a91eb199SMark Brown 697a91eb199SMark Brown wm8904->drc_cfg = value; 698a91eb199SMark Brown 699a91eb199SMark Brown wm8904_set_drc(codec); 700a91eb199SMark Brown 701a91eb199SMark Brown return 0; 702a91eb199SMark Brown } 703a91eb199SMark Brown 704a91eb199SMark Brown static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 705a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 706a91eb199SMark Brown { 707a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 708b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 709a91eb199SMark Brown 710a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 711a91eb199SMark Brown 712a91eb199SMark Brown return 0; 713a91eb199SMark Brown } 714a91eb199SMark Brown 715a91eb199SMark Brown static void wm8904_set_retune_mobile(struct snd_soc_codec *codec) 716a91eb199SMark Brown { 717b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 718a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 719a91eb199SMark Brown int best, best_val, save, i, cfg; 720a91eb199SMark Brown 721a91eb199SMark Brown if (!pdata || !wm8904->num_retune_mobile_texts) 722a91eb199SMark Brown return; 723a91eb199SMark Brown 724a91eb199SMark Brown /* Find the version of the currently selected configuration 725a91eb199SMark Brown * with the nearest sample rate. */ 726a91eb199SMark Brown cfg = wm8904->retune_mobile_cfg; 727a91eb199SMark Brown best = 0; 728a91eb199SMark Brown best_val = INT_MAX; 729a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 730a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 731a91eb199SMark Brown wm8904->retune_mobile_texts[cfg]) == 0 && 732a91eb199SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 733a91eb199SMark Brown - wm8904->fs) < best_val) { 734a91eb199SMark Brown best = i; 735a91eb199SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 736a91eb199SMark Brown - wm8904->fs); 737a91eb199SMark Brown } 738a91eb199SMark Brown } 739a91eb199SMark Brown 740a91eb199SMark Brown dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n", 741a91eb199SMark Brown pdata->retune_mobile_cfgs[best].name, 742a91eb199SMark Brown pdata->retune_mobile_cfgs[best].rate, 743a91eb199SMark Brown wm8904->fs); 744a91eb199SMark Brown 745a91eb199SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 746a91eb199SMark Brown * current configuration. 747a91eb199SMark Brown */ 748a91eb199SMark Brown save = snd_soc_read(codec, WM8904_EQ1); 749a91eb199SMark Brown 750a91eb199SMark Brown for (i = 0; i < WM8904_EQ_REGS; i++) 751a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff, 752a91eb199SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 753a91eb199SMark Brown 754a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save); 755a91eb199SMark Brown } 756a91eb199SMark Brown 757a91eb199SMark Brown static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 758a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 759a91eb199SMark Brown { 760a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 761b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 762a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 763a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 764a91eb199SMark Brown 765a91eb199SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 766a91eb199SMark Brown return -EINVAL; 767a91eb199SMark Brown 768a91eb199SMark Brown wm8904->retune_mobile_cfg = value; 769a91eb199SMark Brown 770a91eb199SMark Brown wm8904_set_retune_mobile(codec); 771a91eb199SMark Brown 772a91eb199SMark Brown return 0; 773a91eb199SMark Brown } 774a91eb199SMark Brown 775a91eb199SMark Brown static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 776a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 777a91eb199SMark Brown { 778a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 779b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 780a91eb199SMark Brown 781a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 782a91eb199SMark Brown 783a91eb199SMark Brown return 0; 784a91eb199SMark Brown } 785a91eb199SMark Brown 786a91eb199SMark Brown static int deemph_settings[] = { 0, 32000, 44100, 48000 }; 787a91eb199SMark Brown 788a91eb199SMark Brown static int wm8904_set_deemph(struct snd_soc_codec *codec) 789a91eb199SMark Brown { 790b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 791a91eb199SMark Brown int val, i, best; 792a91eb199SMark Brown 793a91eb199SMark Brown /* If we're using deemphasis select the nearest available sample 794a91eb199SMark Brown * rate. 795a91eb199SMark Brown */ 796a91eb199SMark Brown if (wm8904->deemph) { 797a91eb199SMark Brown best = 1; 798a91eb199SMark Brown for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 799a91eb199SMark Brown if (abs(deemph_settings[i] - wm8904->fs) < 800a91eb199SMark Brown abs(deemph_settings[best] - wm8904->fs)) 801a91eb199SMark Brown best = i; 802a91eb199SMark Brown } 803a91eb199SMark Brown 804a91eb199SMark Brown val = best << WM8904_DEEMPH_SHIFT; 805a91eb199SMark Brown } else { 806a91eb199SMark Brown val = 0; 807a91eb199SMark Brown } 808a91eb199SMark Brown 809a91eb199SMark Brown dev_dbg(codec->dev, "Set deemphasis %d\n", val); 810a91eb199SMark Brown 811a91eb199SMark Brown return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 812a91eb199SMark Brown WM8904_DEEMPH_MASK, val); 813a91eb199SMark Brown } 814a91eb199SMark Brown 815a91eb199SMark Brown static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 816a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 817a91eb199SMark Brown { 818a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 819b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 820a91eb199SMark Brown 821a91eb199SMark Brown return wm8904->deemph; 822a91eb199SMark Brown } 823a91eb199SMark Brown 824a91eb199SMark Brown static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 825a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 826a91eb199SMark Brown { 827a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 828b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 829a91eb199SMark Brown int deemph = ucontrol->value.enumerated.item[0]; 830a91eb199SMark Brown 831a91eb199SMark Brown if (deemph > 1) 832a91eb199SMark Brown return -EINVAL; 833a91eb199SMark Brown 834a91eb199SMark Brown wm8904->deemph = deemph; 835a91eb199SMark Brown 836a91eb199SMark Brown return wm8904_set_deemph(codec); 837a91eb199SMark Brown } 838a91eb199SMark Brown 839a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0); 840a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 841a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 842a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); 843a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 844a91eb199SMark Brown 845a91eb199SMark Brown static const char *input_mode_text[] = { 846a91eb199SMark Brown "Single-Ended", "Differential Line", "Differential Mic" 847a91eb199SMark Brown }; 848a91eb199SMark Brown 849a91eb199SMark Brown static const struct soc_enum lin_mode = 850a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text); 851a91eb199SMark Brown 852a91eb199SMark Brown static const struct soc_enum rin_mode = 853a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text); 854a91eb199SMark Brown 855a91eb199SMark Brown static const char *hpf_mode_text[] = { 856a91eb199SMark Brown "Hi-fi", "Voice 1", "Voice 2", "Voice 3" 857a91eb199SMark Brown }; 858a91eb199SMark Brown 859a91eb199SMark Brown static const struct soc_enum hpf_mode = 860a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ADC_DIGITAL_0, 5, 4, hpf_mode_text); 861a91eb199SMark Brown 862a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { 863a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, 864a91eb199SMark Brown WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), 865a91eb199SMark Brown 866a91eb199SMark Brown SOC_ENUM("Left Caputure Mode", lin_mode), 867a91eb199SMark Brown SOC_ENUM("Right Capture Mode", rin_mode), 868a91eb199SMark Brown 869a91eb199SMark Brown /* No TLV since it depends on mode */ 870a91eb199SMark Brown SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, 871a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), 872a91eb199SMark Brown SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, 873a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 0), 874a91eb199SMark Brown 875a91eb199SMark Brown SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), 876a91eb199SMark Brown SOC_ENUM("High Pass Filter Mode", hpf_mode), 877a91eb199SMark Brown 878a91eb199SMark Brown SOC_SINGLE("ADC 128x OSR Switch", WM8904_ANALOGUE_ADC_0, 0, 1, 0), 879a91eb199SMark Brown }; 880a91eb199SMark Brown 881a91eb199SMark Brown static const char *drc_path_text[] = { 882a91eb199SMark Brown "ADC", "DAC" 883a91eb199SMark Brown }; 884a91eb199SMark Brown 885a91eb199SMark Brown static const struct soc_enum drc_path = 886a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DRC_0, 14, 2, drc_path_text); 887a91eb199SMark Brown 888a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_dac_snd_controls[] = { 889a91eb199SMark Brown SOC_SINGLE_TLV("Digital Playback Boost Volume", 890a91eb199SMark Brown WM8904_AUDIO_INTERFACE_0, 9, 3, 0, dac_boost_tlv), 891a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8904_DAC_DIGITAL_VOLUME_LEFT, 892a91eb199SMark Brown WM8904_DAC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv), 893a91eb199SMark Brown 894a91eb199SMark Brown SOC_DOUBLE_R_TLV("Headphone Volume", WM8904_ANALOGUE_OUT1_LEFT, 895a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 0, 63, 0, out_tlv), 896a91eb199SMark Brown SOC_DOUBLE_R("Headphone Switch", WM8904_ANALOGUE_OUT1_LEFT, 897a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 8, 1, 1), 898a91eb199SMark Brown SOC_DOUBLE_R("Headphone ZC Switch", WM8904_ANALOGUE_OUT1_LEFT, 899a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 6, 1, 0), 900a91eb199SMark Brown 901a91eb199SMark Brown SOC_DOUBLE_R_TLV("Line Output Volume", WM8904_ANALOGUE_OUT2_LEFT, 902a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 0, 63, 0, out_tlv), 903a91eb199SMark Brown SOC_DOUBLE_R("Line Output Switch", WM8904_ANALOGUE_OUT2_LEFT, 904a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 8, 1, 1), 905a91eb199SMark Brown SOC_DOUBLE_R("Line Output ZC Switch", WM8904_ANALOGUE_OUT2_LEFT, 906a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 6, 1, 0), 907a91eb199SMark Brown 908a91eb199SMark Brown SOC_SINGLE("EQ Switch", WM8904_EQ1, 0, 1, 0), 909a91eb199SMark Brown SOC_SINGLE("DRC Switch", WM8904_DRC_0, 15, 1, 0), 910a91eb199SMark Brown SOC_ENUM("DRC Path", drc_path), 911a91eb199SMark Brown SOC_SINGLE("DAC OSRx2 Switch", WM8904_DAC_DIGITAL_1, 6, 1, 0), 912a91eb199SMark Brown SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 913a91eb199SMark Brown wm8904_get_deemph, wm8904_put_deemph), 914a91eb199SMark Brown }; 915a91eb199SMark Brown 916a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_snd_controls[] = { 917a91eb199SMark Brown SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8904_DAC_DIGITAL_0, 4, 8, 15, 0, 918a91eb199SMark Brown sidetone_tlv), 919a91eb199SMark Brown }; 920a91eb199SMark Brown 921a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_eq_controls[] = { 922a91eb199SMark Brown SOC_SINGLE_TLV("EQ1 Volume", WM8904_EQ2, 0, 24, 0, eq_tlv), 923a91eb199SMark Brown SOC_SINGLE_TLV("EQ2 Volume", WM8904_EQ3, 0, 24, 0, eq_tlv), 924a91eb199SMark Brown SOC_SINGLE_TLV("EQ3 Volume", WM8904_EQ4, 0, 24, 0, eq_tlv), 925a91eb199SMark Brown SOC_SINGLE_TLV("EQ4 Volume", WM8904_EQ5, 0, 24, 0, eq_tlv), 926a91eb199SMark Brown SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), 927a91eb199SMark Brown }; 928a91eb199SMark Brown 929a91eb199SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 930a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 931a91eb199SMark Brown { 932a91eb199SMark Brown BUG_ON(event != SND_SOC_DAPM_POST_PMU); 933a91eb199SMark Brown 934a91eb199SMark Brown /* Maximum startup time */ 935a91eb199SMark Brown udelay(500); 936a91eb199SMark Brown 937a91eb199SMark Brown return 0; 938a91eb199SMark Brown } 939a91eb199SMark Brown 940a91eb199SMark Brown static int sysclk_event(struct snd_soc_dapm_widget *w, 941a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 942a91eb199SMark Brown { 943a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 944b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 945a91eb199SMark Brown 946a91eb199SMark Brown switch (event) { 947a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMU: 948a91eb199SMark Brown /* If we're using the FLL then we only start it when 949a91eb199SMark Brown * required; we assume that the configuration has been 950a91eb199SMark Brown * done previously and all we need to do is kick it 951a91eb199SMark Brown * off. 952a91eb199SMark Brown */ 953a91eb199SMark Brown switch (wm8904->sysclk_src) { 954a91eb199SMark Brown case WM8904_CLK_FLL: 955a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 956a91eb199SMark Brown WM8904_FLL_OSC_ENA, 957a91eb199SMark Brown WM8904_FLL_OSC_ENA); 958a91eb199SMark Brown 959a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 960a91eb199SMark Brown WM8904_FLL_ENA, 961a91eb199SMark Brown WM8904_FLL_ENA); 962a91eb199SMark Brown break; 963a91eb199SMark Brown 964a91eb199SMark Brown default: 965a91eb199SMark Brown break; 966a91eb199SMark Brown } 967a91eb199SMark Brown break; 968a91eb199SMark Brown 969a91eb199SMark Brown case SND_SOC_DAPM_POST_PMD: 970a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 971a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 972a91eb199SMark Brown break; 973a91eb199SMark Brown } 974a91eb199SMark Brown 975a91eb199SMark Brown return 0; 976a91eb199SMark Brown } 977a91eb199SMark Brown 978a91eb199SMark Brown static int out_pga_event(struct snd_soc_dapm_widget *w, 979a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 980a91eb199SMark Brown { 981a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 982b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 983a91eb199SMark Brown int reg, val; 984a91eb199SMark Brown int dcs_mask; 985a91eb199SMark Brown int dcs_l, dcs_r; 986a91eb199SMark Brown int dcs_l_reg, dcs_r_reg; 987a91eb199SMark Brown int timeout; 988e4bc6696SMark Brown int pwr_reg; 989a91eb199SMark Brown 990a91eb199SMark Brown /* This code is shared between HP and LINEOUT; we do all our 991a91eb199SMark Brown * power management in stereo pairs to avoid latency issues so 992a91eb199SMark Brown * we reuse shift to identify which rather than strcmp() the 993a91eb199SMark Brown * name. */ 994a91eb199SMark Brown reg = w->shift; 995a91eb199SMark Brown 996a91eb199SMark Brown switch (reg) { 997a91eb199SMark Brown case WM8904_ANALOGUE_HP_0: 998e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_2; 999a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; 1000a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_8; 1001a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_9; 1002a91eb199SMark Brown dcs_l = 0; 1003a91eb199SMark Brown dcs_r = 1; 1004a91eb199SMark Brown break; 1005a91eb199SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 1006e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_3; 1007a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; 1008a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_6; 1009a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_7; 1010a91eb199SMark Brown dcs_l = 2; 1011a91eb199SMark Brown dcs_r = 3; 1012a91eb199SMark Brown break; 1013a91eb199SMark Brown default: 1014a91eb199SMark Brown BUG(); 1015a91eb199SMark Brown return -EINVAL; 1016a91eb199SMark Brown } 1017a91eb199SMark Brown 1018a91eb199SMark Brown switch (event) { 1019e4bc6696SMark Brown case SND_SOC_DAPM_PRE_PMU: 1020e4bc6696SMark Brown /* Power on the PGAs */ 1021e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 1022e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 1023e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA); 1024e4bc6696SMark Brown 1025a91eb199SMark Brown /* Power on the amplifier */ 1026a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1027a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA, 1028a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA); 1029a91eb199SMark Brown 1030e4bc6696SMark Brown 1031a91eb199SMark Brown /* Enable the first stage */ 1032a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1033a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY, 1034a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY); 1035a91eb199SMark Brown 1036a91eb199SMark Brown /* Power up the DC servo */ 1037a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 1038a91eb199SMark Brown dcs_mask, dcs_mask); 1039a91eb199SMark Brown 1040a91eb199SMark Brown /* Either calibrate the DC servo or restore cached state 1041a91eb199SMark Brown * if we have that. 1042a91eb199SMark Brown */ 1043a91eb199SMark Brown if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) { 1044a91eb199SMark Brown dev_dbg(codec->dev, "Restoring DC servo state\n"); 1045a91eb199SMark Brown 1046a91eb199SMark Brown snd_soc_write(codec, dcs_l_reg, 1047a91eb199SMark Brown wm8904->dcs_state[dcs_l]); 1048a91eb199SMark Brown snd_soc_write(codec, dcs_r_reg, 1049a91eb199SMark Brown wm8904->dcs_state[dcs_r]); 1050a91eb199SMark Brown 1051a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask); 1052a91eb199SMark Brown 1053a91eb199SMark Brown timeout = 20; 1054a91eb199SMark Brown } else { 1055a91eb199SMark Brown dev_dbg(codec->dev, "Calibrating DC servo\n"); 1056a91eb199SMark Brown 1057a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, 1058a91eb199SMark Brown dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT); 1059a91eb199SMark Brown 1060a91eb199SMark Brown timeout = 500; 1061a91eb199SMark Brown } 1062a91eb199SMark Brown 1063a91eb199SMark Brown /* Wait for DC servo to complete */ 1064a91eb199SMark Brown dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; 1065a91eb199SMark Brown do { 1066a91eb199SMark Brown val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0); 1067a91eb199SMark Brown if ((val & dcs_mask) == dcs_mask) 1068a91eb199SMark Brown break; 1069a91eb199SMark Brown 1070a91eb199SMark Brown msleep(1); 1071a91eb199SMark Brown } while (--timeout); 1072a91eb199SMark Brown 1073a91eb199SMark Brown if ((val & dcs_mask) != dcs_mask) 1074a91eb199SMark Brown dev_warn(codec->dev, "DC servo timed out\n"); 1075a91eb199SMark Brown else 1076a91eb199SMark Brown dev_dbg(codec->dev, "DC servo ready\n"); 1077a91eb199SMark Brown 1078a91eb199SMark Brown /* Enable the output stage */ 1079a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1080a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 1081a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); 1082e4bc6696SMark Brown break; 1083a91eb199SMark Brown 1084e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMU: 1085a91eb199SMark Brown /* Unshort the output itself */ 1086a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1087a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1088a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 1089a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1090a91eb199SMark Brown WM8904_HPR_RMV_SHORT); 1091a91eb199SMark Brown 1092a91eb199SMark Brown break; 1093a91eb199SMark Brown 1094a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMD: 1095a91eb199SMark Brown /* Short the output */ 1096a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1097a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1098a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 0); 1099e4bc6696SMark Brown break; 1100a91eb199SMark Brown 1101e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMD: 1102a91eb199SMark Brown /* Cache the DC servo configuration; this will be 1103a91eb199SMark Brown * invalidated if we change the configuration. */ 1104a91eb199SMark Brown wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg); 1105a91eb199SMark Brown wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg); 1106a91eb199SMark Brown 1107a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 1108a91eb199SMark Brown dcs_mask, 0); 1109a91eb199SMark Brown 1110a91eb199SMark Brown /* Disable the amplifier input and output stages */ 1111a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1112a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA | 1113a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY | 1114a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 1115a91eb199SMark Brown 0); 1116e4bc6696SMark Brown 1117e4bc6696SMark Brown /* PGAs too */ 1118e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 1119e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 1120e4bc6696SMark Brown 0); 1121a91eb199SMark Brown break; 1122a91eb199SMark Brown } 1123a91eb199SMark Brown 1124a91eb199SMark Brown return 0; 1125a91eb199SMark Brown } 1126a91eb199SMark Brown 1127a91eb199SMark Brown static const char *lin_text[] = { 1128a91eb199SMark Brown "IN1L", "IN2L", "IN3L" 1129a91eb199SMark Brown }; 1130a91eb199SMark Brown 1131a91eb199SMark Brown static const struct soc_enum lin_enum = 1132a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 2, 3, lin_text); 1133a91eb199SMark Brown 1134a91eb199SMark Brown static const struct snd_kcontrol_new lin_mux = 1135a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Mux", lin_enum); 1136a91eb199SMark Brown 1137a91eb199SMark Brown static const struct soc_enum lin_inv_enum = 1138a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 4, 3, lin_text); 1139a91eb199SMark Brown 1140a91eb199SMark Brown static const struct snd_kcontrol_new lin_inv_mux = 1141a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); 1142a91eb199SMark Brown 1143a91eb199SMark Brown static const char *rin_text[] = { 1144a91eb199SMark Brown "IN1R", "IN2R", "IN3R" 1145a91eb199SMark Brown }; 1146a91eb199SMark Brown 1147a91eb199SMark Brown static const struct soc_enum rin_enum = 1148a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 2, 3, rin_text); 1149a91eb199SMark Brown 1150a91eb199SMark Brown static const struct snd_kcontrol_new rin_mux = 1151a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Mux", rin_enum); 1152a91eb199SMark Brown 1153a91eb199SMark Brown static const struct soc_enum rin_inv_enum = 1154a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 4, 3, rin_text); 1155a91eb199SMark Brown 1156a91eb199SMark Brown static const struct snd_kcontrol_new rin_inv_mux = 1157a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); 1158a91eb199SMark Brown 1159a91eb199SMark Brown static const char *aif_text[] = { 1160a91eb199SMark Brown "Left", "Right" 1161a91eb199SMark Brown }; 1162a91eb199SMark Brown 1163a91eb199SMark Brown static const struct soc_enum aifoutl_enum = 1164a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 7, 2, aif_text); 1165a91eb199SMark Brown 1166a91eb199SMark Brown static const struct snd_kcontrol_new aifoutl_mux = 1167a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum); 1168a91eb199SMark Brown 1169a91eb199SMark Brown static const struct soc_enum aifoutr_enum = 1170a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 6, 2, aif_text); 1171a91eb199SMark Brown 1172a91eb199SMark Brown static const struct snd_kcontrol_new aifoutr_mux = 1173a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum); 1174a91eb199SMark Brown 1175a91eb199SMark Brown static const struct soc_enum aifinl_enum = 1176a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 5, 2, aif_text); 1177a91eb199SMark Brown 1178a91eb199SMark Brown static const struct snd_kcontrol_new aifinl_mux = 1179a91eb199SMark Brown SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum); 1180a91eb199SMark Brown 1181a91eb199SMark Brown static const struct soc_enum aifinr_enum = 1182a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 4, 2, aif_text); 1183a91eb199SMark Brown 1184a91eb199SMark Brown static const struct snd_kcontrol_new aifinr_mux = 1185a91eb199SMark Brown SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum); 1186a91eb199SMark Brown 1187a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_core_dapm_widgets[] = { 1188a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("SYSCLK", WM8904_CLOCK_RATES_2, 2, 0, sysclk_event, 1189a91eb199SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1190a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8904_CLOCK_RATES_2, 1, 0, NULL, 0), 1191a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("TOCLK", WM8904_CLOCK_RATES_2, 0, 0, NULL, 0), 1192a91eb199SMark Brown }; 1193a91eb199SMark Brown 1194a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_adc_dapm_widgets[] = { 1195a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1L"), 1196a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1R"), 1197a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2L"), 1198a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2R"), 1199a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3L"), 1200a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3R"), 1201a91eb199SMark Brown 1202a91eb199SMark Brown SND_SOC_DAPM_MICBIAS("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0), 1203a91eb199SMark Brown 1204a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), 1205a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 1206a91eb199SMark Brown &lin_inv_mux), 1207a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), 1208a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 1209a91eb199SMark Brown &rin_inv_mux), 1210a91eb199SMark Brown 1211a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, 1212a91eb199SMark Brown NULL, 0), 1213a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Capture PGA", WM8904_POWER_MANAGEMENT_0, 0, 0, 1214a91eb199SMark Brown NULL, 0), 1215a91eb199SMark Brown 1216a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8904_POWER_MANAGEMENT_6, 1, 0), 1217a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8904_POWER_MANAGEMENT_6, 0, 0), 1218a91eb199SMark Brown 1219a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux), 1220a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux), 1221a91eb199SMark Brown 1222a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 1223a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 1224a91eb199SMark Brown }; 1225a91eb199SMark Brown 1226a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dac_dapm_widgets[] = { 1227a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 1228a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 1229a91eb199SMark Brown 1230a91eb199SMark Brown SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux), 1231a91eb199SMark Brown SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux), 1232a91eb199SMark Brown 1233a91eb199SMark Brown SND_SOC_DAPM_DAC("DACL", NULL, WM8904_POWER_MANAGEMENT_6, 3, 0), 1234a91eb199SMark Brown SND_SOC_DAPM_DAC("DACR", NULL, WM8904_POWER_MANAGEMENT_6, 2, 0), 1235a91eb199SMark Brown 1236a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Charge pump", WM8904_CHARGE_PUMP_0, 0, 0, cp_event, 1237a91eb199SMark Brown SND_SOC_DAPM_POST_PMU), 1238a91eb199SMark Brown 1239e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 1240e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPR PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 1241a91eb199SMark Brown 1242e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINEL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 1243e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINER PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 1244a91eb199SMark Brown 1245a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Headphone Output", SND_SOC_NOPM, WM8904_ANALOGUE_HP_0, 1246a91eb199SMark Brown 0, NULL, 0, out_pga_event, 1247e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 1248e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 1249a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Line Output", SND_SOC_NOPM, WM8904_ANALOGUE_LINEOUT_0, 1250a91eb199SMark Brown 0, NULL, 0, out_pga_event, 1251e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 1252e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 1253a91eb199SMark Brown 1254a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTL"), 1255a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTR"), 1256a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTL"), 1257a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTR"), 1258a91eb199SMark Brown }; 1259a91eb199SMark Brown 1260a91eb199SMark Brown static const char *out_mux_text[] = { 1261a91eb199SMark Brown "DAC", "Bypass" 1262a91eb199SMark Brown }; 1263a91eb199SMark Brown 1264a91eb199SMark Brown static const struct soc_enum hpl_enum = 1265a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 3, 2, out_mux_text); 1266a91eb199SMark Brown 1267a91eb199SMark Brown static const struct snd_kcontrol_new hpl_mux = 1268a91eb199SMark Brown SOC_DAPM_ENUM("HPL Mux", hpl_enum); 1269a91eb199SMark Brown 1270a91eb199SMark Brown static const struct soc_enum hpr_enum = 1271a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 2, 2, out_mux_text); 1272a91eb199SMark Brown 1273a91eb199SMark Brown static const struct snd_kcontrol_new hpr_mux = 1274a91eb199SMark Brown SOC_DAPM_ENUM("HPR Mux", hpr_enum); 1275a91eb199SMark Brown 1276a91eb199SMark Brown static const struct soc_enum linel_enum = 1277a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 1, 2, out_mux_text); 1278a91eb199SMark Brown 1279a91eb199SMark Brown static const struct snd_kcontrol_new linel_mux = 1280a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", linel_enum); 1281a91eb199SMark Brown 1282a91eb199SMark Brown static const struct soc_enum liner_enum = 1283a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 0, 2, out_mux_text); 1284a91eb199SMark Brown 1285a91eb199SMark Brown static const struct snd_kcontrol_new liner_mux = 1286a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", liner_enum); 1287a91eb199SMark Brown 1288a91eb199SMark Brown static const char *sidetone_text[] = { 1289a91eb199SMark Brown "None", "Left", "Right" 1290a91eb199SMark Brown }; 1291a91eb199SMark Brown 1292a91eb199SMark Brown static const struct soc_enum dacl_sidetone_enum = 1293a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 2, 3, sidetone_text); 1294a91eb199SMark Brown 1295a91eb199SMark Brown static const struct snd_kcontrol_new dacl_sidetone_mux = 1296a91eb199SMark Brown SOC_DAPM_ENUM("Left Sidetone Mux", dacl_sidetone_enum); 1297a91eb199SMark Brown 1298a91eb199SMark Brown static const struct soc_enum dacr_sidetone_enum = 1299a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 0, 3, sidetone_text); 1300a91eb199SMark Brown 1301a91eb199SMark Brown static const struct snd_kcontrol_new dacr_sidetone_mux = 1302a91eb199SMark Brown SOC_DAPM_ENUM("Right Sidetone Mux", dacr_sidetone_enum); 1303a91eb199SMark Brown 1304a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dapm_widgets[] = { 1305a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Class G", WM8904_CLASS_W_0, 0, 1, NULL, 0), 1306a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1307a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1308a91eb199SMark Brown 1309a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &dacl_sidetone_mux), 1310a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &dacr_sidetone_mux), 1311a91eb199SMark Brown 1312a91eb199SMark Brown SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1313a91eb199SMark Brown SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), 1314a91eb199SMark Brown SND_SOC_DAPM_MUX("LINEL Mux", SND_SOC_NOPM, 0, 0, &linel_mux), 1315a91eb199SMark Brown SND_SOC_DAPM_MUX("LINER Mux", SND_SOC_NOPM, 0, 0, &liner_mux), 1316a91eb199SMark Brown }; 1317a91eb199SMark Brown 1318a91eb199SMark Brown static const struct snd_soc_dapm_route core_intercon[] = { 1319a91eb199SMark Brown { "CLK_DSP", NULL, "SYSCLK" }, 1320a91eb199SMark Brown { "TOCLK", NULL, "SYSCLK" }, 1321a91eb199SMark Brown }; 1322a91eb199SMark Brown 1323a91eb199SMark Brown static const struct snd_soc_dapm_route adc_intercon[] = { 1324a91eb199SMark Brown { "Left Capture Mux", "IN1L", "IN1L" }, 1325a91eb199SMark Brown { "Left Capture Mux", "IN2L", "IN2L" }, 1326a91eb199SMark Brown { "Left Capture Mux", "IN3L", "IN3L" }, 1327a91eb199SMark Brown 1328a91eb199SMark Brown { "Left Capture Inverting Mux", "IN1L", "IN1L" }, 1329a91eb199SMark Brown { "Left Capture Inverting Mux", "IN2L", "IN2L" }, 1330a91eb199SMark Brown { "Left Capture Inverting Mux", "IN3L", "IN3L" }, 1331a91eb199SMark Brown 1332a91eb199SMark Brown { "Right Capture Mux", "IN1R", "IN1R" }, 1333a91eb199SMark Brown { "Right Capture Mux", "IN2R", "IN2R" }, 1334a91eb199SMark Brown { "Right Capture Mux", "IN3R", "IN3R" }, 1335a91eb199SMark Brown 1336a91eb199SMark Brown { "Right Capture Inverting Mux", "IN1R", "IN1R" }, 1337a91eb199SMark Brown { "Right Capture Inverting Mux", "IN2R", "IN2R" }, 1338a91eb199SMark Brown { "Right Capture Inverting Mux", "IN3R", "IN3R" }, 1339a91eb199SMark Brown 1340a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Mux" }, 1341a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, 1342a91eb199SMark Brown 1343a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Mux" }, 1344a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, 1345a91eb199SMark Brown 1346a91eb199SMark Brown { "AIFOUTL", "Left", "ADCL" }, 1347a91eb199SMark Brown { "AIFOUTL", "Right", "ADCR" }, 1348a91eb199SMark Brown { "AIFOUTR", "Left", "ADCL" }, 1349a91eb199SMark Brown { "AIFOUTR", "Right", "ADCR" }, 1350a91eb199SMark Brown 1351a91eb199SMark Brown { "ADCL", NULL, "CLK_DSP" }, 1352a91eb199SMark Brown { "ADCL", NULL, "Left Capture PGA" }, 1353a91eb199SMark Brown 1354a91eb199SMark Brown { "ADCR", NULL, "CLK_DSP" }, 1355a91eb199SMark Brown { "ADCR", NULL, "Right Capture PGA" }, 1356a91eb199SMark Brown }; 1357a91eb199SMark Brown 1358a91eb199SMark Brown static const struct snd_soc_dapm_route dac_intercon[] = { 1359a91eb199SMark Brown { "DACL", "Right", "AIFINR" }, 1360a91eb199SMark Brown { "DACL", "Left", "AIFINL" }, 1361a91eb199SMark Brown { "DACL", NULL, "CLK_DSP" }, 1362a91eb199SMark Brown 1363a91eb199SMark Brown { "DACR", "Right", "AIFINR" }, 1364a91eb199SMark Brown { "DACR", "Left", "AIFINL" }, 1365a91eb199SMark Brown { "DACR", NULL, "CLK_DSP" }, 1366a91eb199SMark Brown 1367a91eb199SMark Brown { "Charge pump", NULL, "SYSCLK" }, 1368a91eb199SMark Brown 1369a91eb199SMark Brown { "Headphone Output", NULL, "HPL PGA" }, 1370a91eb199SMark Brown { "Headphone Output", NULL, "HPR PGA" }, 1371a91eb199SMark Brown { "Headphone Output", NULL, "Charge pump" }, 1372a91eb199SMark Brown { "Headphone Output", NULL, "TOCLK" }, 1373a91eb199SMark Brown 1374a91eb199SMark Brown { "Line Output", NULL, "LINEL PGA" }, 1375a91eb199SMark Brown { "Line Output", NULL, "LINER PGA" }, 1376a91eb199SMark Brown { "Line Output", NULL, "Charge pump" }, 1377a91eb199SMark Brown { "Line Output", NULL, "TOCLK" }, 1378a91eb199SMark Brown 1379a91eb199SMark Brown { "HPOUTL", NULL, "Headphone Output" }, 1380a91eb199SMark Brown { "HPOUTR", NULL, "Headphone Output" }, 1381a91eb199SMark Brown 1382a91eb199SMark Brown { "LINEOUTL", NULL, "Line Output" }, 1383a91eb199SMark Brown { "LINEOUTR", NULL, "Line Output" }, 1384a91eb199SMark Brown }; 1385a91eb199SMark Brown 1386a91eb199SMark Brown static const struct snd_soc_dapm_route wm8904_intercon[] = { 1387a91eb199SMark Brown { "Left Sidetone", "Left", "ADCL" }, 1388a91eb199SMark Brown { "Left Sidetone", "Right", "ADCR" }, 1389a91eb199SMark Brown { "DACL", NULL, "Left Sidetone" }, 1390a91eb199SMark Brown 1391a91eb199SMark Brown { "Right Sidetone", "Left", "ADCL" }, 1392a91eb199SMark Brown { "Right Sidetone", "Right", "ADCR" }, 1393a91eb199SMark Brown { "DACR", NULL, "Right Sidetone" }, 1394a91eb199SMark Brown 1395a91eb199SMark Brown { "Left Bypass", NULL, "Class G" }, 1396a91eb199SMark Brown { "Left Bypass", NULL, "Left Capture PGA" }, 1397a91eb199SMark Brown 1398a91eb199SMark Brown { "Right Bypass", NULL, "Class G" }, 1399a91eb199SMark Brown { "Right Bypass", NULL, "Right Capture PGA" }, 1400a91eb199SMark Brown 1401a91eb199SMark Brown { "HPL Mux", "DAC", "DACL" }, 1402a91eb199SMark Brown { "HPL Mux", "Bypass", "Left Bypass" }, 1403a91eb199SMark Brown 1404a91eb199SMark Brown { "HPR Mux", "DAC", "DACR" }, 1405a91eb199SMark Brown { "HPR Mux", "Bypass", "Right Bypass" }, 1406a91eb199SMark Brown 1407a91eb199SMark Brown { "LINEL Mux", "DAC", "DACL" }, 1408a91eb199SMark Brown { "LINEL Mux", "Bypass", "Left Bypass" }, 1409a91eb199SMark Brown 1410a91eb199SMark Brown { "LINER Mux", "DAC", "DACR" }, 1411a91eb199SMark Brown { "LINER Mux", "Bypass", "Right Bypass" }, 1412a91eb199SMark Brown 1413a91eb199SMark Brown { "HPL PGA", NULL, "HPL Mux" }, 1414a91eb199SMark Brown { "HPR PGA", NULL, "HPR Mux" }, 1415a91eb199SMark Brown 1416a91eb199SMark Brown { "LINEL PGA", NULL, "LINEL Mux" }, 1417a91eb199SMark Brown { "LINER PGA", NULL, "LINER Mux" }, 1418a91eb199SMark Brown }; 1419a91eb199SMark Brown 14208c126474SMark Brown static const struct snd_soc_dapm_route wm8912_intercon[] = { 14218c126474SMark Brown { "HPL PGA", NULL, "DACL" }, 14228c126474SMark Brown { "HPR PGA", NULL, "DACR" }, 14238c126474SMark Brown 14248c126474SMark Brown { "LINEL PGA", NULL, "DACL" }, 14258c126474SMark Brown { "LINER PGA", NULL, "DACR" }, 14268c126474SMark Brown }; 14278c126474SMark Brown 1428a91eb199SMark Brown static int wm8904_add_widgets(struct snd_soc_codec *codec) 1429a91eb199SMark Brown { 1430b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 14318c126474SMark Brown 14328c126474SMark Brown snd_soc_dapm_new_controls(codec, wm8904_core_dapm_widgets, 14338c126474SMark Brown ARRAY_SIZE(wm8904_core_dapm_widgets)); 14348c126474SMark Brown snd_soc_dapm_add_routes(codec, core_intercon, 14358c126474SMark Brown ARRAY_SIZE(core_intercon)); 14368c126474SMark Brown 14378c126474SMark Brown switch (wm8904->devtype) { 14388c126474SMark Brown case WM8904: 1439a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_adc_snd_controls, 1440a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_snd_controls)); 1441a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_dac_snd_controls, 1442a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 1443a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_snd_controls, 1444a91eb199SMark Brown ARRAY_SIZE(wm8904_snd_controls)); 1445a91eb199SMark Brown 1446a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_adc_dapm_widgets, 1447a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_dapm_widgets)); 1448a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_dac_dapm_widgets, 1449a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 1450a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_dapm_widgets, 1451a91eb199SMark Brown ARRAY_SIZE(wm8904_dapm_widgets)); 1452a91eb199SMark Brown 1453a91eb199SMark Brown snd_soc_dapm_add_routes(codec, core_intercon, 1454a91eb199SMark Brown ARRAY_SIZE(core_intercon)); 14558c126474SMark Brown snd_soc_dapm_add_routes(codec, adc_intercon, 14568c126474SMark Brown ARRAY_SIZE(adc_intercon)); 14578c126474SMark Brown snd_soc_dapm_add_routes(codec, dac_intercon, 14588c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1459a91eb199SMark Brown snd_soc_dapm_add_routes(codec, wm8904_intercon, 1460a91eb199SMark Brown ARRAY_SIZE(wm8904_intercon)); 14618c126474SMark Brown break; 14628c126474SMark Brown 14638c126474SMark Brown case WM8912: 14648c126474SMark Brown snd_soc_add_controls(codec, wm8904_dac_snd_controls, 14658c126474SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 14668c126474SMark Brown 14678c126474SMark Brown snd_soc_dapm_new_controls(codec, wm8904_dac_dapm_widgets, 14688c126474SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 14698c126474SMark Brown 14708c126474SMark Brown snd_soc_dapm_add_routes(codec, dac_intercon, 14718c126474SMark Brown ARRAY_SIZE(dac_intercon)); 14728c126474SMark Brown snd_soc_dapm_add_routes(codec, wm8912_intercon, 14738c126474SMark Brown ARRAY_SIZE(wm8912_intercon)); 14748c126474SMark Brown break; 14758c126474SMark Brown } 1476a91eb199SMark Brown 1477a91eb199SMark Brown snd_soc_dapm_new_widgets(codec); 1478a91eb199SMark Brown return 0; 1479a91eb199SMark Brown } 1480a91eb199SMark Brown 1481a91eb199SMark Brown static struct { 1482a91eb199SMark Brown int ratio; 1483a91eb199SMark Brown unsigned int clk_sys_rate; 1484a91eb199SMark Brown } clk_sys_rates[] = { 1485a91eb199SMark Brown { 64, 0 }, 1486a91eb199SMark Brown { 128, 1 }, 1487a91eb199SMark Brown { 192, 2 }, 1488a91eb199SMark Brown { 256, 3 }, 1489a91eb199SMark Brown { 384, 4 }, 1490a91eb199SMark Brown { 512, 5 }, 1491a91eb199SMark Brown { 786, 6 }, 1492a91eb199SMark Brown { 1024, 7 }, 1493a91eb199SMark Brown { 1408, 8 }, 1494a91eb199SMark Brown { 1536, 9 }, 1495a91eb199SMark Brown }; 1496a91eb199SMark Brown 1497a91eb199SMark Brown static struct { 1498a91eb199SMark Brown int rate; 1499a91eb199SMark Brown int sample_rate; 1500a91eb199SMark Brown } sample_rates[] = { 1501a91eb199SMark Brown { 8000, 0 }, 1502a91eb199SMark Brown { 11025, 1 }, 1503a91eb199SMark Brown { 12000, 1 }, 1504a91eb199SMark Brown { 16000, 2 }, 1505a91eb199SMark Brown { 22050, 3 }, 1506a91eb199SMark Brown { 24000, 3 }, 1507a91eb199SMark Brown { 32000, 4 }, 1508a91eb199SMark Brown { 44100, 5 }, 1509a91eb199SMark Brown { 48000, 5 }, 1510a91eb199SMark Brown }; 1511a91eb199SMark Brown 1512a91eb199SMark Brown static struct { 1513a91eb199SMark Brown int div; /* *10 due to .5s */ 1514a91eb199SMark Brown int bclk_div; 1515a91eb199SMark Brown } bclk_divs[] = { 1516a91eb199SMark Brown { 10, 0 }, 1517a91eb199SMark Brown { 15, 1 }, 1518a91eb199SMark Brown { 20, 2 }, 1519a91eb199SMark Brown { 30, 3 }, 1520a91eb199SMark Brown { 40, 4 }, 1521a91eb199SMark Brown { 50, 5 }, 1522a91eb199SMark Brown { 55, 6 }, 1523a91eb199SMark Brown { 60, 7 }, 1524a91eb199SMark Brown { 80, 8 }, 1525a91eb199SMark Brown { 100, 9 }, 1526a91eb199SMark Brown { 110, 10 }, 1527a91eb199SMark Brown { 120, 11 }, 1528a91eb199SMark Brown { 160, 12 }, 1529a91eb199SMark Brown { 200, 13 }, 1530a91eb199SMark Brown { 220, 14 }, 1531a91eb199SMark Brown { 240, 16 }, 1532a91eb199SMark Brown { 200, 17 }, 1533a91eb199SMark Brown { 320, 18 }, 1534a91eb199SMark Brown { 440, 19 }, 1535a91eb199SMark Brown { 480, 20 }, 1536a91eb199SMark Brown }; 1537a91eb199SMark Brown 1538a91eb199SMark Brown 1539a91eb199SMark Brown static int wm8904_hw_params(struct snd_pcm_substream *substream, 1540a91eb199SMark Brown struct snd_pcm_hw_params *params, 1541a91eb199SMark Brown struct snd_soc_dai *dai) 1542a91eb199SMark Brown { 1543a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1544b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1545a91eb199SMark Brown int ret, i, best, best_val, cur_val; 1546a91eb199SMark Brown unsigned int aif1 = 0; 1547a91eb199SMark Brown unsigned int aif2 = 0; 1548a91eb199SMark Brown unsigned int aif3 = 0; 1549a91eb199SMark Brown unsigned int clock1 = 0; 1550a91eb199SMark Brown unsigned int dac_digital1 = 0; 1551a91eb199SMark Brown 1552a91eb199SMark Brown /* What BCLK do we need? */ 1553a91eb199SMark Brown wm8904->fs = params_rate(params); 1554a91eb199SMark Brown if (wm8904->tdm_slots) { 1555a91eb199SMark Brown dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n", 1556a91eb199SMark Brown wm8904->tdm_slots, wm8904->tdm_width); 1557a91eb199SMark Brown wm8904->bclk = snd_soc_calc_bclk(wm8904->fs, 1558a91eb199SMark Brown wm8904->tdm_width, 2, 1559a91eb199SMark Brown wm8904->tdm_slots); 1560a91eb199SMark Brown } else { 1561a91eb199SMark Brown wm8904->bclk = snd_soc_params_to_bclk(params); 1562a91eb199SMark Brown } 1563a91eb199SMark Brown 156456927eb0SMark Brown switch (params_format(params)) { 156556927eb0SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 156656927eb0SMark Brown break; 156756927eb0SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 156856927eb0SMark Brown aif1 |= 0x40; 156956927eb0SMark Brown break; 157056927eb0SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 157156927eb0SMark Brown aif1 |= 0x80; 157256927eb0SMark Brown break; 157356927eb0SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 157456927eb0SMark Brown aif1 |= 0xc0; 157556927eb0SMark Brown break; 157656927eb0SMark Brown default: 157756927eb0SMark Brown return -EINVAL; 157856927eb0SMark Brown } 157956927eb0SMark Brown 158056927eb0SMark Brown 1581a91eb199SMark Brown dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk); 1582a91eb199SMark Brown 1583a91eb199SMark Brown ret = wm8904_configure_clocking(codec); 1584a91eb199SMark Brown if (ret != 0) 1585a91eb199SMark Brown return ret; 1586a91eb199SMark Brown 1587a91eb199SMark Brown /* Select nearest CLK_SYS_RATE */ 1588a91eb199SMark Brown best = 0; 1589a91eb199SMark Brown best_val = abs((wm8904->sysclk_rate / clk_sys_rates[0].ratio) 1590a91eb199SMark Brown - wm8904->fs); 1591a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { 1592a91eb199SMark Brown cur_val = abs((wm8904->sysclk_rate / 1593a91eb199SMark Brown clk_sys_rates[i].ratio) - wm8904->fs);; 1594a91eb199SMark Brown if (cur_val < best_val) { 1595a91eb199SMark Brown best = i; 1596a91eb199SMark Brown best_val = cur_val; 1597a91eb199SMark Brown } 1598a91eb199SMark Brown } 1599a91eb199SMark Brown dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1600a91eb199SMark Brown clk_sys_rates[best].ratio); 1601a91eb199SMark Brown clock1 |= (clk_sys_rates[best].clk_sys_rate 1602a91eb199SMark Brown << WM8904_CLK_SYS_RATE_SHIFT); 1603a91eb199SMark Brown 1604a91eb199SMark Brown /* SAMPLE_RATE */ 1605a91eb199SMark Brown best = 0; 1606a91eb199SMark Brown best_val = abs(wm8904->fs - sample_rates[0].rate); 1607a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 1608a91eb199SMark Brown /* Closest match */ 1609a91eb199SMark Brown cur_val = abs(wm8904->fs - sample_rates[i].rate); 1610a91eb199SMark Brown if (cur_val < best_val) { 1611a91eb199SMark Brown best = i; 1612a91eb199SMark Brown best_val = cur_val; 1613a91eb199SMark Brown } 1614a91eb199SMark Brown } 1615a91eb199SMark Brown dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1616a91eb199SMark Brown sample_rates[best].rate); 1617a91eb199SMark Brown clock1 |= (sample_rates[best].sample_rate 1618a91eb199SMark Brown << WM8904_SAMPLE_RATE_SHIFT); 1619a91eb199SMark Brown 1620a91eb199SMark Brown /* Enable sloping stopband filter for low sample rates */ 1621a91eb199SMark Brown if (wm8904->fs <= 24000) 1622a91eb199SMark Brown dac_digital1 |= WM8904_DAC_SB_FILT; 1623a91eb199SMark Brown 1624a91eb199SMark Brown /* BCLK_DIV */ 1625a91eb199SMark Brown best = 0; 1626a91eb199SMark Brown best_val = INT_MAX; 1627a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1628a91eb199SMark Brown cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) 1629a91eb199SMark Brown - wm8904->bclk; 1630a91eb199SMark Brown if (cur_val < 0) /* Table is sorted */ 1631a91eb199SMark Brown break; 1632a91eb199SMark Brown if (cur_val < best_val) { 1633a91eb199SMark Brown best = i; 1634a91eb199SMark Brown best_val = cur_val; 1635a91eb199SMark Brown } 1636a91eb199SMark Brown } 1637a91eb199SMark Brown wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; 1638a91eb199SMark Brown dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1639a91eb199SMark Brown bclk_divs[best].div, wm8904->bclk); 1640a91eb199SMark Brown aif2 |= bclk_divs[best].bclk_div; 1641a91eb199SMark Brown 1642a91eb199SMark Brown /* LRCLK is a simple fraction of BCLK */ 1643a91eb199SMark Brown dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs); 1644a91eb199SMark Brown aif3 |= wm8904->bclk / wm8904->fs; 1645a91eb199SMark Brown 1646a91eb199SMark Brown /* Apply the settings */ 1647a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 1648a91eb199SMark Brown WM8904_DAC_SB_FILT, dac_digital1); 1649a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1650a91eb199SMark Brown WM8904_AIF_WL_MASK, aif1); 1651a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2, 1652a91eb199SMark Brown WM8904_BCLK_DIV_MASK, aif2); 1653a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1654a91eb199SMark Brown WM8904_LRCLK_RATE_MASK, aif3); 1655a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1, 1656a91eb199SMark Brown WM8904_SAMPLE_RATE_MASK | 1657a91eb199SMark Brown WM8904_CLK_SYS_RATE_MASK, clock1); 1658a91eb199SMark Brown 1659a91eb199SMark Brown /* Update filters for the new settings */ 1660a91eb199SMark Brown wm8904_set_retune_mobile(codec); 1661a91eb199SMark Brown wm8904_set_deemph(codec); 1662a91eb199SMark Brown 1663a91eb199SMark Brown return 0; 1664a91eb199SMark Brown } 1665a91eb199SMark Brown 1666a91eb199SMark Brown 1667a91eb199SMark Brown static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, 1668a91eb199SMark Brown unsigned int freq, int dir) 1669a91eb199SMark Brown { 1670a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1671b2c812e2SMark Brown struct wm8904_priv *priv = snd_soc_codec_get_drvdata(codec); 1672a91eb199SMark Brown 1673a91eb199SMark Brown switch (clk_id) { 1674a91eb199SMark Brown case WM8904_CLK_MCLK: 1675a91eb199SMark Brown priv->sysclk_src = clk_id; 1676a91eb199SMark Brown priv->mclk_rate = freq; 1677a91eb199SMark Brown break; 1678a91eb199SMark Brown 1679a91eb199SMark Brown case WM8904_CLK_FLL: 1680a91eb199SMark Brown priv->sysclk_src = clk_id; 1681a91eb199SMark Brown break; 1682a91eb199SMark Brown 1683a91eb199SMark Brown default: 1684a91eb199SMark Brown return -EINVAL; 1685a91eb199SMark Brown } 1686a91eb199SMark Brown 1687a91eb199SMark Brown dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); 1688a91eb199SMark Brown 1689a91eb199SMark Brown wm8904_configure_clocking(codec); 1690a91eb199SMark Brown 1691a91eb199SMark Brown return 0; 1692a91eb199SMark Brown } 1693a91eb199SMark Brown 1694a91eb199SMark Brown static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1695a91eb199SMark Brown { 1696a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1697a91eb199SMark Brown unsigned int aif1 = 0; 1698a91eb199SMark Brown unsigned int aif3 = 0; 1699a91eb199SMark Brown 1700a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1701a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1702a91eb199SMark Brown break; 1703a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1704a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1705a91eb199SMark Brown break; 1706a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1707a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1708a91eb199SMark Brown break; 1709a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1710a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1711a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1712a91eb199SMark Brown break; 1713a91eb199SMark Brown default: 1714a91eb199SMark Brown return -EINVAL; 1715a91eb199SMark Brown } 1716a91eb199SMark Brown 1717a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1718a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1719a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1720a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1721a91eb199SMark Brown aif1 |= 0x3; 1722a91eb199SMark Brown break; 1723a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1724a91eb199SMark Brown aif1 |= 0x2; 1725a91eb199SMark Brown break; 1726a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1727a91eb199SMark Brown break; 1728a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1729a91eb199SMark Brown aif1 |= 0x1; 1730a91eb199SMark Brown break; 1731a91eb199SMark Brown default: 1732a91eb199SMark Brown return -EINVAL; 1733a91eb199SMark Brown } 1734a91eb199SMark Brown 1735a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1736a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1737a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1738a91eb199SMark Brown /* frame inversion not valid for DSP modes */ 1739a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1740a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1741a91eb199SMark Brown break; 1742a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1743a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1744a91eb199SMark Brown break; 1745a91eb199SMark Brown default: 1746a91eb199SMark Brown return -EINVAL; 1747a91eb199SMark Brown } 1748a91eb199SMark Brown break; 1749a91eb199SMark Brown 1750a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1751a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1752a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1753a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1754a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1755a91eb199SMark Brown break; 1756a91eb199SMark Brown case SND_SOC_DAIFMT_IB_IF: 1757a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV; 1758a91eb199SMark Brown break; 1759a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1760a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1761a91eb199SMark Brown break; 1762a91eb199SMark Brown case SND_SOC_DAIFMT_NB_IF: 1763a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1764a91eb199SMark Brown break; 1765a91eb199SMark Brown default: 1766a91eb199SMark Brown return -EINVAL; 1767a91eb199SMark Brown } 1768a91eb199SMark Brown break; 1769a91eb199SMark Brown default: 1770a91eb199SMark Brown return -EINVAL; 1771a91eb199SMark Brown } 1772a91eb199SMark Brown 1773a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1774a91eb199SMark Brown WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV | 1775a91eb199SMark Brown WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1); 1776a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1777a91eb199SMark Brown WM8904_LRCLK_DIR, aif3); 1778a91eb199SMark Brown 1779a91eb199SMark Brown return 0; 1780a91eb199SMark Brown } 1781a91eb199SMark Brown 1782a91eb199SMark Brown 1783a91eb199SMark Brown static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 1784a91eb199SMark Brown unsigned int rx_mask, int slots, int slot_width) 1785a91eb199SMark Brown { 1786a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1787b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1788a91eb199SMark Brown int aif1 = 0; 1789a91eb199SMark Brown 1790a91eb199SMark Brown /* Don't need to validate anything if we're turning off TDM */ 1791a91eb199SMark Brown if (slots == 0) 1792a91eb199SMark Brown goto out; 1793a91eb199SMark Brown 1794a91eb199SMark Brown /* Note that we allow configurations we can't handle ourselves - 1795a91eb199SMark Brown * for example, we can generate clocks for slots 2 and up even if 1796a91eb199SMark Brown * we can't use those slots ourselves. 1797a91eb199SMark Brown */ 1798a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM | WM8904_AIFDAC_TDM; 1799a91eb199SMark Brown 1800a91eb199SMark Brown switch (rx_mask) { 1801a91eb199SMark Brown case 3: 1802a91eb199SMark Brown break; 1803a91eb199SMark Brown case 0xc: 1804a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM_CHAN; 1805a91eb199SMark Brown break; 1806a91eb199SMark Brown default: 1807a91eb199SMark Brown return -EINVAL; 1808a91eb199SMark Brown } 1809a91eb199SMark Brown 1810a91eb199SMark Brown 1811a91eb199SMark Brown switch (tx_mask) { 1812a91eb199SMark Brown case 3: 1813a91eb199SMark Brown break; 1814a91eb199SMark Brown case 0xc: 1815a91eb199SMark Brown aif1 |= WM8904_AIFDAC_TDM_CHAN; 1816a91eb199SMark Brown break; 1817a91eb199SMark Brown default: 1818a91eb199SMark Brown return -EINVAL; 1819a91eb199SMark Brown } 1820a91eb199SMark Brown 1821a91eb199SMark Brown out: 1822a91eb199SMark Brown wm8904->tdm_width = slot_width; 1823a91eb199SMark Brown wm8904->tdm_slots = slots / 2; 1824a91eb199SMark Brown 1825a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1826a91eb199SMark Brown WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN | 1827a91eb199SMark Brown WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1); 1828a91eb199SMark Brown 1829a91eb199SMark Brown return 0; 1830a91eb199SMark Brown } 1831a91eb199SMark Brown 1832a91eb199SMark Brown struct _fll_div { 1833a91eb199SMark Brown u16 fll_fratio; 1834a91eb199SMark Brown u16 fll_outdiv; 1835a91eb199SMark Brown u16 fll_clk_ref_div; 1836a91eb199SMark Brown u16 n; 1837a91eb199SMark Brown u16 k; 1838a91eb199SMark Brown }; 1839a91eb199SMark Brown 1840a91eb199SMark Brown /* The size in bits of the FLL divide multiplied by 10 1841a91eb199SMark Brown * to allow rounding later */ 1842a91eb199SMark Brown #define FIXED_FLL_SIZE ((1 << 16) * 10) 1843a91eb199SMark Brown 1844a91eb199SMark Brown static struct { 1845a91eb199SMark Brown unsigned int min; 1846a91eb199SMark Brown unsigned int max; 1847a91eb199SMark Brown u16 fll_fratio; 1848a91eb199SMark Brown int ratio; 1849a91eb199SMark Brown } fll_fratios[] = { 1850a91eb199SMark Brown { 0, 64000, 4, 16 }, 1851a91eb199SMark Brown { 64000, 128000, 3, 8 }, 1852a91eb199SMark Brown { 128000, 256000, 2, 4 }, 1853a91eb199SMark Brown { 256000, 1000000, 1, 2 }, 1854a91eb199SMark Brown { 1000000, 13500000, 0, 1 }, 1855a91eb199SMark Brown }; 1856a91eb199SMark Brown 1857a91eb199SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1858a91eb199SMark Brown unsigned int Fout) 1859a91eb199SMark Brown { 1860a91eb199SMark Brown u64 Kpart; 1861a91eb199SMark Brown unsigned int K, Ndiv, Nmod, target; 1862a91eb199SMark Brown unsigned int div; 1863a91eb199SMark Brown int i; 1864a91eb199SMark Brown 1865a91eb199SMark Brown /* Fref must be <=13.5MHz */ 1866a91eb199SMark Brown div = 1; 1867a91eb199SMark Brown fll_div->fll_clk_ref_div = 0; 1868a91eb199SMark Brown while ((Fref / div) > 13500000) { 1869a91eb199SMark Brown div *= 2; 1870a91eb199SMark Brown fll_div->fll_clk_ref_div++; 1871a91eb199SMark Brown 1872a91eb199SMark Brown if (div > 8) { 1873a91eb199SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1874a91eb199SMark Brown Fref); 1875a91eb199SMark Brown return -EINVAL; 1876a91eb199SMark Brown } 1877a91eb199SMark Brown } 1878a91eb199SMark Brown 1879a91eb199SMark Brown pr_debug("Fref=%u Fout=%u\n", Fref, Fout); 1880a91eb199SMark Brown 1881a91eb199SMark Brown /* Apply the division for our remaining calculations */ 1882a91eb199SMark Brown Fref /= div; 1883a91eb199SMark Brown 1884a91eb199SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1885a91eb199SMark Brown div = 4; 1886a91eb199SMark Brown while (Fout * div < 90000000) { 1887a91eb199SMark Brown div++; 1888a91eb199SMark Brown if (div > 64) { 1889a91eb199SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1890a91eb199SMark Brown Fout); 1891a91eb199SMark Brown return -EINVAL; 1892a91eb199SMark Brown } 1893a91eb199SMark Brown } 1894a91eb199SMark Brown target = Fout * div; 1895a91eb199SMark Brown fll_div->fll_outdiv = div - 1; 1896a91eb199SMark Brown 1897a91eb199SMark Brown pr_debug("Fvco=%dHz\n", target); 1898a91eb199SMark Brown 1899a91eb199SMark Brown /* Find an appropraite FLL_FRATIO and factor it out of the target */ 1900a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1901a91eb199SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1902a91eb199SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1903a91eb199SMark Brown target /= fll_fratios[i].ratio; 1904a91eb199SMark Brown break; 1905a91eb199SMark Brown } 1906a91eb199SMark Brown } 1907a91eb199SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1908a91eb199SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1909a91eb199SMark Brown return -EINVAL; 1910a91eb199SMark Brown } 1911a91eb199SMark Brown 1912a91eb199SMark Brown /* Now, calculate N.K */ 1913a91eb199SMark Brown Ndiv = target / Fref; 1914a91eb199SMark Brown 1915a91eb199SMark Brown fll_div->n = Ndiv; 1916a91eb199SMark Brown Nmod = target % Fref; 1917a91eb199SMark Brown pr_debug("Nmod=%d\n", Nmod); 1918a91eb199SMark Brown 1919a91eb199SMark Brown /* Calculate fractional part - scale up so we can round. */ 1920a91eb199SMark Brown Kpart = FIXED_FLL_SIZE * (long long)Nmod; 1921a91eb199SMark Brown 1922a91eb199SMark Brown do_div(Kpart, Fref); 1923a91eb199SMark Brown 1924a91eb199SMark Brown K = Kpart & 0xFFFFFFFF; 1925a91eb199SMark Brown 1926a91eb199SMark Brown if ((K % 10) >= 5) 1927a91eb199SMark Brown K += 5; 1928a91eb199SMark Brown 1929a91eb199SMark Brown /* Move down to proper range now rounding is done */ 1930a91eb199SMark Brown fll_div->k = K / 10; 1931a91eb199SMark Brown 1932a91eb199SMark Brown pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", 1933a91eb199SMark Brown fll_div->n, fll_div->k, 1934a91eb199SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 1935a91eb199SMark Brown fll_div->fll_clk_ref_div); 1936a91eb199SMark Brown 1937a91eb199SMark Brown return 0; 1938a91eb199SMark Brown } 1939a91eb199SMark Brown 1940a91eb199SMark Brown static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source, 1941a91eb199SMark Brown unsigned int Fref, unsigned int Fout) 1942a91eb199SMark Brown { 1943a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1944b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1945a91eb199SMark Brown struct _fll_div fll_div; 1946a91eb199SMark Brown int ret, val; 1947a91eb199SMark Brown int clock2, fll1; 1948a91eb199SMark Brown 1949a91eb199SMark Brown /* Any change? */ 1950a91eb199SMark Brown if (source == wm8904->fll_src && Fref == wm8904->fll_fref && 1951a91eb199SMark Brown Fout == wm8904->fll_fout) 1952a91eb199SMark Brown return 0; 1953a91eb199SMark Brown 195418240b67SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 195518240b67SMark Brown 1956a91eb199SMark Brown if (Fout == 0) { 1957a91eb199SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 1958a91eb199SMark Brown 1959a91eb199SMark Brown wm8904->fll_fref = 0; 1960a91eb199SMark Brown wm8904->fll_fout = 0; 1961a91eb199SMark Brown 1962a91eb199SMark Brown /* Gate SYSCLK to avoid glitches */ 1963a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1964a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1965a91eb199SMark Brown 1966a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1967a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1968a91eb199SMark Brown 1969a91eb199SMark Brown goto out; 1970a91eb199SMark Brown } 1971a91eb199SMark Brown 1972a91eb199SMark Brown /* Validate the FLL ID */ 1973a91eb199SMark Brown switch (source) { 1974a91eb199SMark Brown case WM8904_FLL_MCLK: 1975a91eb199SMark Brown case WM8904_FLL_LRCLK: 1976a91eb199SMark Brown case WM8904_FLL_BCLK: 1977a91eb199SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 1978a91eb199SMark Brown if (ret != 0) 1979a91eb199SMark Brown return ret; 1980a91eb199SMark Brown break; 1981a91eb199SMark Brown 1982a91eb199SMark Brown case WM8904_FLL_FREE_RUNNING: 1983a91eb199SMark Brown dev_dbg(codec->dev, "Using free running FLL\n"); 1984a91eb199SMark Brown /* Force 12MHz and output/4 for now */ 1985a91eb199SMark Brown Fout = 12000000; 1986a91eb199SMark Brown Fref = 12000000; 1987a91eb199SMark Brown 1988a91eb199SMark Brown memset(&fll_div, 0, sizeof(fll_div)); 1989a91eb199SMark Brown fll_div.fll_outdiv = 3; 1990a91eb199SMark Brown break; 1991a91eb199SMark Brown 1992a91eb199SMark Brown default: 1993a91eb199SMark Brown dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 1994a91eb199SMark Brown return -EINVAL; 1995a91eb199SMark Brown } 1996a91eb199SMark Brown 1997a91eb199SMark Brown /* Save current state then disable the FLL and SYSCLK to avoid 1998a91eb199SMark Brown * misclocking */ 1999a91eb199SMark Brown fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1); 2000a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 2001a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 2002a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 2003a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 2004a91eb199SMark Brown 2005a91eb199SMark Brown /* Unlock forced oscilator control to switch it on/off */ 2006a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 2007a91eb199SMark Brown WM8904_USER_KEY, WM8904_USER_KEY); 2008a91eb199SMark Brown 2009a91eb199SMark Brown if (fll_id == WM8904_FLL_FREE_RUNNING) { 2010a91eb199SMark Brown val = WM8904_FLL_FRC_NCO; 2011a91eb199SMark Brown } else { 2012a91eb199SMark Brown val = 0; 2013a91eb199SMark Brown } 2014a91eb199SMark Brown 2015a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO, 2016a91eb199SMark Brown val); 2017a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 2018a91eb199SMark Brown WM8904_USER_KEY, 0); 2019a91eb199SMark Brown 2020a91eb199SMark Brown switch (fll_id) { 2021a91eb199SMark Brown case WM8904_FLL_MCLK: 2022a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 2023a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 0); 2024a91eb199SMark Brown break; 2025a91eb199SMark Brown 2026a91eb199SMark Brown case WM8904_FLL_LRCLK: 2027a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 2028a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 1); 2029a91eb199SMark Brown break; 2030a91eb199SMark Brown 2031a91eb199SMark Brown case WM8904_FLL_BCLK: 2032a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 2033a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 2); 2034a91eb199SMark Brown break; 2035a91eb199SMark Brown } 2036a91eb199SMark Brown 2037a91eb199SMark Brown if (fll_div.k) 2038a91eb199SMark Brown val = WM8904_FLL_FRACN_ENA; 2039a91eb199SMark Brown else 2040a91eb199SMark Brown val = 0; 2041a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 2042a91eb199SMark Brown WM8904_FLL_FRACN_ENA, val); 2043a91eb199SMark Brown 2044a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2, 2045a91eb199SMark Brown WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK, 2046a91eb199SMark Brown (fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) | 2047a91eb199SMark Brown (fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT)); 2048a91eb199SMark Brown 2049a91eb199SMark Brown snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k); 2050a91eb199SMark Brown 2051a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK, 2052a91eb199SMark Brown fll_div.n << WM8904_FLL_N_SHIFT); 2053a91eb199SMark Brown 2054a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 2055a91eb199SMark Brown WM8904_FLL_CLK_REF_DIV_MASK, 2056a91eb199SMark Brown fll_div.fll_clk_ref_div 2057a91eb199SMark Brown << WM8904_FLL_CLK_REF_DIV_SHIFT); 2058a91eb199SMark Brown 2059a91eb199SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 2060a91eb199SMark Brown 2061a91eb199SMark Brown wm8904->fll_fref = Fref; 2062a91eb199SMark Brown wm8904->fll_fout = Fout; 2063a91eb199SMark Brown wm8904->fll_src = source; 2064a91eb199SMark Brown 2065a91eb199SMark Brown /* Enable the FLL if it was previously active */ 2066a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 2067a91eb199SMark Brown WM8904_FLL_OSC_ENA, fll1); 2068a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 2069a91eb199SMark Brown WM8904_FLL_ENA, fll1); 2070a91eb199SMark Brown 2071a91eb199SMark Brown out: 2072a91eb199SMark Brown /* Reenable SYSCLK if it was previously active */ 2073a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 2074a91eb199SMark Brown WM8904_CLK_SYS_ENA, clock2); 2075a91eb199SMark Brown 2076a91eb199SMark Brown return 0; 2077a91eb199SMark Brown } 2078a91eb199SMark Brown 2079a91eb199SMark Brown static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) 2080a91eb199SMark Brown { 2081a91eb199SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 2082a91eb199SMark Brown int val; 2083a91eb199SMark Brown 2084a91eb199SMark Brown if (mute) 2085a91eb199SMark Brown val = WM8904_DAC_MUTE; 2086a91eb199SMark Brown else 2087a91eb199SMark Brown val = 0; 2088a91eb199SMark Brown 2089a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val); 2090a91eb199SMark Brown 2091a91eb199SMark Brown return 0; 2092a91eb199SMark Brown } 2093a91eb199SMark Brown 2094c1334218SMark Brown static void wm8904_sync_cache(struct snd_soc_codec *codec) 2095c1334218SMark Brown { 2096b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2097c1334218SMark Brown int i; 2098c1334218SMark Brown 2099c1334218SMark Brown if (!codec->cache_sync) 2100c1334218SMark Brown return; 2101c1334218SMark Brown 2102c1334218SMark Brown codec->cache_only = 0; 2103c1334218SMark Brown 2104c1334218SMark Brown /* Sync back cached values if they're different from the 2105c1334218SMark Brown * hardware default. 2106c1334218SMark Brown */ 2107c1334218SMark Brown for (i = 1; i < ARRAY_SIZE(wm8904->reg_cache); i++) { 2108c1334218SMark Brown if (!wm8904_access[i].writable) 2109c1334218SMark Brown continue; 2110c1334218SMark Brown 2111c1334218SMark Brown if (wm8904->reg_cache[i] == wm8904_reg[i]) 2112c1334218SMark Brown continue; 2113c1334218SMark Brown 2114c1334218SMark Brown snd_soc_write(codec, i, wm8904->reg_cache[i]); 2115c1334218SMark Brown } 2116c1334218SMark Brown 2117c1334218SMark Brown codec->cache_sync = 0; 2118c1334218SMark Brown } 2119c1334218SMark Brown 2120a91eb199SMark Brown static int wm8904_set_bias_level(struct snd_soc_codec *codec, 2121a91eb199SMark Brown enum snd_soc_bias_level level) 2122a91eb199SMark Brown { 2123b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2124c1334218SMark Brown int ret; 2125a91eb199SMark Brown 2126a91eb199SMark Brown switch (level) { 2127a91eb199SMark Brown case SND_SOC_BIAS_ON: 2128a91eb199SMark Brown break; 2129a91eb199SMark Brown 2130a91eb199SMark Brown case SND_SOC_BIAS_PREPARE: 2131a91eb199SMark Brown /* VMID resistance 2*50k */ 2132a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2133a91eb199SMark Brown WM8904_VMID_RES_MASK, 2134a91eb199SMark Brown 0x1 << WM8904_VMID_RES_SHIFT); 2135a91eb199SMark Brown 2136a91eb199SMark Brown /* Normal bias current */ 2137a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2138a91eb199SMark Brown WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT); 2139a91eb199SMark Brown break; 2140a91eb199SMark Brown 2141a91eb199SMark Brown case SND_SOC_BIAS_STANDBY: 2142a91eb199SMark Brown if (codec->bias_level == SND_SOC_BIAS_OFF) { 2143a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2144a91eb199SMark Brown wm8904->supplies); 2145a91eb199SMark Brown if (ret != 0) { 2146a91eb199SMark Brown dev_err(codec->dev, 2147a91eb199SMark Brown "Failed to enable supplies: %d\n", 2148a91eb199SMark Brown ret); 2149a91eb199SMark Brown return ret; 2150a91eb199SMark Brown } 2151a91eb199SMark Brown 2152c1334218SMark Brown wm8904_sync_cache(codec); 2153a91eb199SMark Brown 2154a91eb199SMark Brown /* Enable bias */ 2155a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2156a91eb199SMark Brown WM8904_BIAS_ENA, WM8904_BIAS_ENA); 2157a91eb199SMark Brown 2158a91eb199SMark Brown /* Enable VMID, VMID buffering, 2*5k resistance */ 2159a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2160a91eb199SMark Brown WM8904_VMID_ENA | 2161a91eb199SMark Brown WM8904_VMID_RES_MASK, 2162a91eb199SMark Brown WM8904_VMID_ENA | 2163a91eb199SMark Brown 0x3 << WM8904_VMID_RES_SHIFT); 2164a91eb199SMark Brown 2165a91eb199SMark Brown /* Let VMID ramp */ 2166a91eb199SMark Brown msleep(1); 2167a91eb199SMark Brown } 2168a91eb199SMark Brown 2169a91eb199SMark Brown /* Maintain VMID with 2*250k */ 2170a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2171a91eb199SMark Brown WM8904_VMID_RES_MASK, 2172a91eb199SMark Brown 0x2 << WM8904_VMID_RES_SHIFT); 2173a91eb199SMark Brown 2174a91eb199SMark Brown /* Bias current *0.5 */ 2175a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2176a91eb199SMark Brown WM8904_ISEL_MASK, 0); 2177a91eb199SMark Brown break; 2178a91eb199SMark Brown 2179a91eb199SMark Brown case SND_SOC_BIAS_OFF: 2180a91eb199SMark Brown /* Turn off VMID */ 2181a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2182a91eb199SMark Brown WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0); 2183a91eb199SMark Brown 2184a91eb199SMark Brown /* Stop bias generation */ 2185a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2186a91eb199SMark Brown WM8904_BIAS_ENA, 0); 2187a91eb199SMark Brown 2188c1334218SMark Brown #ifdef CONFIG_REGULATOR 2189c1334218SMark Brown /* Post 2.6.34 we will be able to get a callback when 2190c1334218SMark Brown * the regulators are disabled which we can use but 2191c1334218SMark Brown * for now just assume that the power will be cut if 2192c1334218SMark Brown * the regulator API is in use. 2193c1334218SMark Brown */ 2194c1334218SMark Brown codec->cache_sync = 1; 2195c1334218SMark Brown #endif 2196c1334218SMark Brown 2197a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), 2198a91eb199SMark Brown wm8904->supplies); 2199a91eb199SMark Brown break; 2200a91eb199SMark Brown } 2201a91eb199SMark Brown codec->bias_level = level; 2202a91eb199SMark Brown return 0; 2203a91eb199SMark Brown } 2204a91eb199SMark Brown 2205a91eb199SMark Brown #define WM8904_RATES SNDRV_PCM_RATE_8000_96000 2206a91eb199SMark Brown 2207a91eb199SMark Brown #define WM8904_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 2208a91eb199SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 2209a91eb199SMark Brown 2210a91eb199SMark Brown static struct snd_soc_dai_ops wm8904_dai_ops = { 2211a91eb199SMark Brown .set_sysclk = wm8904_set_sysclk, 2212a91eb199SMark Brown .set_fmt = wm8904_set_fmt, 2213a91eb199SMark Brown .set_tdm_slot = wm8904_set_tdm_slot, 2214a91eb199SMark Brown .set_pll = wm8904_set_fll, 2215a91eb199SMark Brown .hw_params = wm8904_hw_params, 2216a91eb199SMark Brown .digital_mute = wm8904_digital_mute, 2217a91eb199SMark Brown }; 2218a91eb199SMark Brown 2219f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8904_dai = { 2220f0fba2adSLiam Girdwood .name = "wm8904-hifi", 2221a91eb199SMark Brown .playback = { 2222a91eb199SMark Brown .stream_name = "Playback", 2223a91eb199SMark Brown .channels_min = 2, 2224a91eb199SMark Brown .channels_max = 2, 2225a91eb199SMark Brown .rates = WM8904_RATES, 2226a91eb199SMark Brown .formats = WM8904_FORMATS, 2227a91eb199SMark Brown }, 2228a91eb199SMark Brown .capture = { 2229a91eb199SMark Brown .stream_name = "Capture", 2230a91eb199SMark Brown .channels_min = 2, 2231a91eb199SMark Brown .channels_max = 2, 2232a91eb199SMark Brown .rates = WM8904_RATES, 2233a91eb199SMark Brown .formats = WM8904_FORMATS, 2234a91eb199SMark Brown }, 2235a91eb199SMark Brown .ops = &wm8904_dai_ops, 2236a91eb199SMark Brown .symmetric_rates = 1, 2237a91eb199SMark Brown }; 2238a91eb199SMark Brown 2239a91eb199SMark Brown #ifdef CONFIG_PM 2240f0fba2adSLiam Girdwood static int wm8904_suspend(struct snd_soc_codec *codec, pm_message_t state) 2241a91eb199SMark Brown { 2242a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_OFF); 2243a91eb199SMark Brown 2244a91eb199SMark Brown return 0; 2245a91eb199SMark Brown } 2246a91eb199SMark Brown 2247f0fba2adSLiam Girdwood static int wm8904_resume(struct snd_soc_codec *codec) 2248a91eb199SMark Brown { 2249a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2250a91eb199SMark Brown 2251a91eb199SMark Brown return 0; 2252a91eb199SMark Brown } 2253a91eb199SMark Brown #else 2254a91eb199SMark Brown #define wm8904_suspend NULL 2255a91eb199SMark Brown #define wm8904_resume NULL 2256a91eb199SMark Brown #endif 2257a91eb199SMark Brown 2258f0fba2adSLiam Girdwood static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec) 2259a91eb199SMark Brown { 2260f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2261a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2262a91eb199SMark Brown struct snd_kcontrol_new control = 2263a91eb199SMark Brown SOC_ENUM_EXT("EQ Mode", 2264a91eb199SMark Brown wm8904->retune_mobile_enum, 2265a91eb199SMark Brown wm8904_get_retune_mobile_enum, 2266a91eb199SMark Brown wm8904_put_retune_mobile_enum); 2267a91eb199SMark Brown int ret, i, j; 2268a91eb199SMark Brown const char **t; 2269a91eb199SMark Brown 2270a91eb199SMark Brown /* We need an array of texts for the enum API but the number 2271a91eb199SMark Brown * of texts is likely to be less than the number of 2272a91eb199SMark Brown * configurations due to the sample rate dependency of the 2273a91eb199SMark Brown * configurations. */ 2274a91eb199SMark Brown wm8904->num_retune_mobile_texts = 0; 2275a91eb199SMark Brown wm8904->retune_mobile_texts = NULL; 2276a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 2277a91eb199SMark Brown for (j = 0; j < wm8904->num_retune_mobile_texts; j++) { 2278a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 2279a91eb199SMark Brown wm8904->retune_mobile_texts[j]) == 0) 2280a91eb199SMark Brown break; 2281a91eb199SMark Brown } 2282a91eb199SMark Brown 2283a91eb199SMark Brown if (j != wm8904->num_retune_mobile_texts) 2284a91eb199SMark Brown continue; 2285a91eb199SMark Brown 2286a91eb199SMark Brown /* Expand the array... */ 2287a91eb199SMark Brown t = krealloc(wm8904->retune_mobile_texts, 2288a91eb199SMark Brown sizeof(char *) * 2289a91eb199SMark Brown (wm8904->num_retune_mobile_texts + 1), 2290a91eb199SMark Brown GFP_KERNEL); 2291a91eb199SMark Brown if (t == NULL) 2292a91eb199SMark Brown continue; 2293a91eb199SMark Brown 2294a91eb199SMark Brown /* ...store the new entry... */ 2295a91eb199SMark Brown t[wm8904->num_retune_mobile_texts] = 2296a91eb199SMark Brown pdata->retune_mobile_cfgs[i].name; 2297a91eb199SMark Brown 2298a91eb199SMark Brown /* ...and remember the new version. */ 2299a91eb199SMark Brown wm8904->num_retune_mobile_texts++; 2300a91eb199SMark Brown wm8904->retune_mobile_texts = t; 2301a91eb199SMark Brown } 2302a91eb199SMark Brown 2303a91eb199SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 2304a91eb199SMark Brown wm8904->num_retune_mobile_texts); 2305a91eb199SMark Brown 2306a91eb199SMark Brown wm8904->retune_mobile_enum.max = wm8904->num_retune_mobile_texts; 2307a91eb199SMark Brown wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts; 2308a91eb199SMark Brown 2309f0fba2adSLiam Girdwood ret = snd_soc_add_controls(codec, &control, 1); 2310a91eb199SMark Brown if (ret != 0) 2311f0fba2adSLiam Girdwood dev_err(codec->dev, 2312a91eb199SMark Brown "Failed to add ReTune Mobile control: %d\n", ret); 2313a91eb199SMark Brown } 2314a91eb199SMark Brown 2315f0fba2adSLiam Girdwood static void wm8904_handle_pdata(struct snd_soc_codec *codec) 2316a91eb199SMark Brown { 2317f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2318a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2319a91eb199SMark Brown int ret, i; 2320a91eb199SMark Brown 2321a91eb199SMark Brown if (!pdata) { 2322f0fba2adSLiam Girdwood snd_soc_add_controls(codec, wm8904_eq_controls, 2323a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2324a91eb199SMark Brown return; 2325a91eb199SMark Brown } 2326a91eb199SMark Brown 2327a91eb199SMark Brown dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); 2328a91eb199SMark Brown 2329a91eb199SMark Brown if (pdata->num_drc_cfgs) { 2330a91eb199SMark Brown struct snd_kcontrol_new control = 2331a91eb199SMark Brown SOC_ENUM_EXT("DRC Mode", wm8904->drc_enum, 2332a91eb199SMark Brown wm8904_get_drc_enum, wm8904_put_drc_enum); 2333a91eb199SMark Brown 2334a91eb199SMark Brown /* We need an array of texts for the enum API */ 2335a91eb199SMark Brown wm8904->drc_texts = kmalloc(sizeof(char *) 2336a91eb199SMark Brown * pdata->num_drc_cfgs, GFP_KERNEL); 2337a91eb199SMark Brown if (!wm8904->drc_texts) { 2338f0fba2adSLiam Girdwood dev_err(codec->dev, 2339a91eb199SMark Brown "Failed to allocate %d DRC config texts\n", 2340a91eb199SMark Brown pdata->num_drc_cfgs); 2341a91eb199SMark Brown return; 2342a91eb199SMark Brown } 2343a91eb199SMark Brown 2344a91eb199SMark Brown for (i = 0; i < pdata->num_drc_cfgs; i++) 2345a91eb199SMark Brown wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; 2346a91eb199SMark Brown 2347a91eb199SMark Brown wm8904->drc_enum.max = pdata->num_drc_cfgs; 2348a91eb199SMark Brown wm8904->drc_enum.texts = wm8904->drc_texts; 2349a91eb199SMark Brown 2350f0fba2adSLiam Girdwood ret = snd_soc_add_controls(codec, &control, 1); 2351a91eb199SMark Brown if (ret != 0) 2352f0fba2adSLiam Girdwood dev_err(codec->dev, 2353a91eb199SMark Brown "Failed to add DRC mode control: %d\n", ret); 2354a91eb199SMark Brown 2355a91eb199SMark Brown wm8904_set_drc(codec); 2356a91eb199SMark Brown } 2357a91eb199SMark Brown 2358a91eb199SMark Brown dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", 2359a91eb199SMark Brown pdata->num_retune_mobile_cfgs); 2360a91eb199SMark Brown 2361a91eb199SMark Brown if (pdata->num_retune_mobile_cfgs) 2362f0fba2adSLiam Girdwood wm8904_handle_retune_mobile_pdata(codec); 2363a91eb199SMark Brown else 2364f0fba2adSLiam Girdwood snd_soc_add_controls(codec, wm8904_eq_controls, 2365a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2366a91eb199SMark Brown } 2367a91eb199SMark Brown 2368f0fba2adSLiam Girdwood 2369f0fba2adSLiam Girdwood static int wm8904_probe(struct snd_soc_codec *codec) 2370a91eb199SMark Brown { 2371f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2372cdce4e9bSMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2373f0fba2adSLiam Girdwood int ret, i; 2374a91eb199SMark Brown 2375c1334218SMark Brown codec->cache_sync = 1; 2376c1334218SMark Brown codec->idle_bias_off = 1; 2377a91eb199SMark Brown 23788c126474SMark Brown switch (wm8904->devtype) { 23798c126474SMark Brown case WM8904: 23808c126474SMark Brown break; 23818c126474SMark Brown case WM8912: 23828c126474SMark Brown memset(&wm8904_dai.capture, 0, sizeof(wm8904_dai.capture)); 23838c126474SMark Brown break; 23848c126474SMark Brown default: 23858c126474SMark Brown dev_err(codec->dev, "Unknown device type %d\n", 23868c126474SMark Brown wm8904->devtype); 2387f0fba2adSLiam Girdwood return -EINVAL; 23888c126474SMark Brown } 23898c126474SMark Brown 2390f0fba2adSLiam Girdwood ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); 2391a91eb199SMark Brown if (ret != 0) { 2392a91eb199SMark Brown dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 2393f0fba2adSLiam Girdwood return ret; 2394a91eb199SMark Brown } 2395a91eb199SMark Brown 2396a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(wm8904->supplies); i++) 2397a91eb199SMark Brown wm8904->supplies[i].supply = wm8904_supply_names[i]; 2398a91eb199SMark Brown 2399a91eb199SMark Brown ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8904->supplies), 2400a91eb199SMark Brown wm8904->supplies); 2401a91eb199SMark Brown if (ret != 0) { 2402a91eb199SMark Brown dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 2403f0fba2adSLiam Girdwood return ret; 2404a91eb199SMark Brown } 2405a91eb199SMark Brown 2406a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2407a91eb199SMark Brown wm8904->supplies); 2408a91eb199SMark Brown if (ret != 0) { 2409a91eb199SMark Brown dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 2410a91eb199SMark Brown goto err_get; 2411a91eb199SMark Brown } 2412a91eb199SMark Brown 2413a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_SW_RESET_AND_ID); 2414a91eb199SMark Brown if (ret < 0) { 2415a91eb199SMark Brown dev_err(codec->dev, "Failed to read ID register\n"); 2416a91eb199SMark Brown goto err_enable; 2417a91eb199SMark Brown } 2418a91eb199SMark Brown if (ret != wm8904_reg[WM8904_SW_RESET_AND_ID]) { 2419a91eb199SMark Brown dev_err(codec->dev, "Device is not a WM8904, ID is %x\n", ret); 2420a91eb199SMark Brown ret = -EINVAL; 2421a91eb199SMark Brown goto err_enable; 2422a91eb199SMark Brown } 2423a91eb199SMark Brown 2424a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_REVISION); 2425a91eb199SMark Brown if (ret < 0) { 2426a91eb199SMark Brown dev_err(codec->dev, "Failed to read device revision: %d\n", 2427a91eb199SMark Brown ret); 2428a91eb199SMark Brown goto err_enable; 2429a91eb199SMark Brown } 2430a91eb199SMark Brown dev_info(codec->dev, "revision %c\n", ret + 'A'); 2431a91eb199SMark Brown 2432a91eb199SMark Brown ret = wm8904_reset(codec); 2433a91eb199SMark Brown if (ret < 0) { 2434a91eb199SMark Brown dev_err(codec->dev, "Failed to issue reset\n"); 2435a91eb199SMark Brown goto err_enable; 2436a91eb199SMark Brown } 2437a91eb199SMark Brown 2438a91eb199SMark Brown /* Change some default settings - latch VU and enable ZC */ 2439a91eb199SMark Brown wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU; 2440a91eb199SMark Brown wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU; 2441a91eb199SMark Brown wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU; 2442a91eb199SMark Brown wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU; 2443a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU | 2444a91eb199SMark Brown WM8904_HPOUTLZC; 2445a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU | 2446a91eb199SMark Brown WM8904_HPOUTRZC; 2447a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU | 2448a91eb199SMark Brown WM8904_LINEOUTLZC; 2449a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU | 2450a91eb199SMark Brown WM8904_LINEOUTRZC; 2451a91eb199SMark Brown wm8904->reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE; 2452a91eb199SMark Brown 2453cdce4e9bSMark Brown /* Apply configuration from the platform data. */ 2454cdce4e9bSMark Brown if (wm8904->pdata) { 2455cdce4e9bSMark Brown for (i = 0; i < WM8904_GPIO_REGS; i++) { 2456cdce4e9bSMark Brown if (!pdata->gpio_cfg[i]) 2457cdce4e9bSMark Brown continue; 2458cdce4e9bSMark Brown 2459cdce4e9bSMark Brown wm8904->reg_cache[WM8904_GPIO_CONTROL_1 + i] 2460cdce4e9bSMark Brown = pdata->gpio_cfg[i] & 0xffff; 2461cdce4e9bSMark Brown } 2462fbc2dae8SMark Brown 2463fbc2dae8SMark Brown /* Zero is the default value for these anyway */ 2464fbc2dae8SMark Brown for (i = 0; i < WM8904_MIC_REGS; i++) 2465fbc2dae8SMark Brown wm8904->reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i] 2466fbc2dae8SMark Brown = pdata->mic_cfg[i]; 2467cdce4e9bSMark Brown } 2468cdce4e9bSMark Brown 2469a91eb199SMark Brown /* Set Class W by default - this will be managed by the Class 2470a91eb199SMark Brown * G widget at runtime where bypass paths are available. 2471a91eb199SMark Brown */ 2472a91eb199SMark Brown wm8904->reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR; 2473a91eb199SMark Brown 2474a91eb199SMark Brown /* Use normal bias source */ 2475a91eb199SMark Brown wm8904->reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL; 2476a91eb199SMark Brown 2477a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2478a91eb199SMark Brown 2479a91eb199SMark Brown /* Bias level configuration will have done an extra enable */ 2480a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2481a91eb199SMark Brown 2482f0fba2adSLiam Girdwood wm8904_handle_pdata(codec); 2483a91eb199SMark Brown 2484f0fba2adSLiam Girdwood wm8904_add_widgets(codec); 2485a91eb199SMark Brown 2486a91eb199SMark Brown return 0; 2487a91eb199SMark Brown 2488a91eb199SMark Brown err_enable: 2489a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2490a91eb199SMark Brown err_get: 2491a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2492a91eb199SMark Brown return ret; 2493a91eb199SMark Brown } 2494a91eb199SMark Brown 2495f0fba2adSLiam Girdwood static int wm8904_remove(struct snd_soc_codec *codec) 2496a91eb199SMark Brown { 2497f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2498f0fba2adSLiam Girdwood 2499f0fba2adSLiam Girdwood wm8904_set_bias_level(codec, SND_SOC_BIAS_OFF); 2500a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2501*cd70978cSAxel Lin kfree(wm8904->retune_mobile_texts); 2502*cd70978cSAxel Lin kfree(wm8904->drc_texts); 2503f0fba2adSLiam Girdwood 2504f0fba2adSLiam Girdwood return 0; 2505a91eb199SMark Brown } 2506a91eb199SMark Brown 2507f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8904 = { 2508f0fba2adSLiam Girdwood .probe = wm8904_probe, 2509f0fba2adSLiam Girdwood .remove = wm8904_remove, 2510f0fba2adSLiam Girdwood .suspend = wm8904_suspend, 2511f0fba2adSLiam Girdwood .resume = wm8904_resume, 2512f0fba2adSLiam Girdwood .set_bias_level = wm8904_set_bias_level, 2513f0fba2adSLiam Girdwood .reg_cache_size = ARRAY_SIZE(wm8904_reg), 2514f0fba2adSLiam Girdwood .reg_word_size = sizeof(u16), 2515f0fba2adSLiam Girdwood .reg_cache_default = wm8904_reg, 2516f0fba2adSLiam Girdwood .volatile_register = wm8904_volatile_register, 2517f0fba2adSLiam Girdwood }; 2518f0fba2adSLiam Girdwood 2519a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2520a91eb199SMark Brown static __devinit int wm8904_i2c_probe(struct i2c_client *i2c, 2521a91eb199SMark Brown const struct i2c_device_id *id) 2522a91eb199SMark Brown { 2523a91eb199SMark Brown struct wm8904_priv *wm8904; 2524f0fba2adSLiam Girdwood int ret; 2525a91eb199SMark Brown 2526a91eb199SMark Brown wm8904 = kzalloc(sizeof(struct wm8904_priv), GFP_KERNEL); 2527a91eb199SMark Brown if (wm8904 == NULL) 2528a91eb199SMark Brown return -ENOMEM; 2529a91eb199SMark Brown 25308c126474SMark Brown wm8904->devtype = id->driver_data; 2531a91eb199SMark Brown i2c_set_clientdata(i2c, wm8904); 2532f0fba2adSLiam Girdwood wm8904->control_data = i2c; 2533a91eb199SMark Brown wm8904->pdata = i2c->dev.platform_data; 2534a91eb199SMark Brown 2535f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 2536f0fba2adSLiam Girdwood &soc_codec_dev_wm8904, &wm8904_dai, 1); 2537f0fba2adSLiam Girdwood if (ret < 0) 2538f0fba2adSLiam Girdwood kfree(wm8904); 2539f0fba2adSLiam Girdwood return ret; 2540a91eb199SMark Brown } 2541a91eb199SMark Brown 2542a91eb199SMark Brown static __devexit int wm8904_i2c_remove(struct i2c_client *client) 2543a91eb199SMark Brown { 2544f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 2545f0fba2adSLiam Girdwood kfree(i2c_get_clientdata(client)); 2546a91eb199SMark Brown return 0; 2547a91eb199SMark Brown } 2548a91eb199SMark Brown 2549a91eb199SMark Brown static const struct i2c_device_id wm8904_i2c_id[] = { 25508c126474SMark Brown { "wm8904", WM8904 }, 25518c126474SMark Brown { "wm8912", WM8912 }, 2552a91eb199SMark Brown { } 2553a91eb199SMark Brown }; 2554a91eb199SMark Brown MODULE_DEVICE_TABLE(i2c, wm8904_i2c_id); 2555a91eb199SMark Brown 2556a91eb199SMark Brown static struct i2c_driver wm8904_i2c_driver = { 2557a91eb199SMark Brown .driver = { 2558f0fba2adSLiam Girdwood .name = "wm8904-codec", 2559a91eb199SMark Brown .owner = THIS_MODULE, 2560a91eb199SMark Brown }, 2561a91eb199SMark Brown .probe = wm8904_i2c_probe, 2562a91eb199SMark Brown .remove = __devexit_p(wm8904_i2c_remove), 2563a91eb199SMark Brown .id_table = wm8904_i2c_id, 2564a91eb199SMark Brown }; 2565a91eb199SMark Brown #endif 2566a91eb199SMark Brown 2567a91eb199SMark Brown static int __init wm8904_modinit(void) 2568a91eb199SMark Brown { 2569f0fba2adSLiam Girdwood int ret = 0; 2570a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2571a91eb199SMark Brown ret = i2c_add_driver(&wm8904_i2c_driver); 2572a91eb199SMark Brown if (ret != 0) { 2573f0fba2adSLiam Girdwood printk(KERN_ERR "Failed to register wm8904 I2C driver: %d\n", 2574a91eb199SMark Brown ret); 2575a91eb199SMark Brown } 2576a91eb199SMark Brown #endif 2577f0fba2adSLiam Girdwood return ret; 2578a91eb199SMark Brown } 2579a91eb199SMark Brown module_init(wm8904_modinit); 2580a91eb199SMark Brown 2581a91eb199SMark Brown static void __exit wm8904_exit(void) 2582a91eb199SMark Brown { 2583a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2584a91eb199SMark Brown i2c_del_driver(&wm8904_i2c_driver); 2585a91eb199SMark Brown #endif 2586a91eb199SMark Brown } 2587a91eb199SMark Brown module_exit(wm8904_exit); 2588a91eb199SMark Brown 2589a91eb199SMark Brown MODULE_DESCRIPTION("ASoC WM8904 driver"); 2590a91eb199SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 2591a91eb199SMark Brown MODULE_LICENSE("GPL"); 2592