1*a91eb199SMark Brown /* 2*a91eb199SMark Brown * wm8904.c -- WM8904 ALSA SoC Audio driver 3*a91eb199SMark Brown * 4*a91eb199SMark Brown * Copyright 2009 Wolfson Microelectronics plc 5*a91eb199SMark Brown * 6*a91eb199SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7*a91eb199SMark Brown * 8*a91eb199SMark Brown * 9*a91eb199SMark Brown * This program is free software; you can redistribute it and/or modify 10*a91eb199SMark Brown * it under the terms of the GNU General Public License version 2 as 11*a91eb199SMark Brown * published by the Free Software Foundation. 12*a91eb199SMark Brown */ 13*a91eb199SMark Brown 14*a91eb199SMark Brown #include <linux/module.h> 15*a91eb199SMark Brown #include <linux/moduleparam.h> 16*a91eb199SMark Brown #include <linux/init.h> 17*a91eb199SMark Brown #include <linux/delay.h> 18*a91eb199SMark Brown #include <linux/pm.h> 19*a91eb199SMark Brown #include <linux/i2c.h> 20*a91eb199SMark Brown #include <linux/platform_device.h> 21*a91eb199SMark Brown #include <linux/regulator/consumer.h> 22*a91eb199SMark Brown #include <sound/core.h> 23*a91eb199SMark Brown #include <sound/pcm.h> 24*a91eb199SMark Brown #include <sound/pcm_params.h> 25*a91eb199SMark Brown #include <sound/soc.h> 26*a91eb199SMark Brown #include <sound/soc-dapm.h> 27*a91eb199SMark Brown #include <sound/initval.h> 28*a91eb199SMark Brown #include <sound/tlv.h> 29*a91eb199SMark Brown #include <sound/wm8904.h> 30*a91eb199SMark Brown 31*a91eb199SMark Brown #include "wm8904.h" 32*a91eb199SMark Brown 33*a91eb199SMark Brown static struct snd_soc_codec *wm8904_codec; 34*a91eb199SMark Brown struct snd_soc_codec_device soc_codec_dev_wm8904; 35*a91eb199SMark Brown 36*a91eb199SMark Brown #define WM8904_NUM_DCS_CHANNELS 4 37*a91eb199SMark Brown 38*a91eb199SMark Brown #define WM8904_NUM_SUPPLIES 5 39*a91eb199SMark Brown static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { 40*a91eb199SMark Brown "DCVDD", 41*a91eb199SMark Brown "DBVDD", 42*a91eb199SMark Brown "AVDD", 43*a91eb199SMark Brown "CPVDD", 44*a91eb199SMark Brown "MICVDD", 45*a91eb199SMark Brown }; 46*a91eb199SMark Brown 47*a91eb199SMark Brown /* codec private data */ 48*a91eb199SMark Brown struct wm8904_priv { 49*a91eb199SMark Brown struct snd_soc_codec codec; 50*a91eb199SMark Brown u16 reg_cache[WM8904_MAX_REGISTER + 1]; 51*a91eb199SMark Brown 52*a91eb199SMark Brown struct regulator_bulk_data supplies[WM8904_NUM_SUPPLIES]; 53*a91eb199SMark Brown 54*a91eb199SMark Brown struct wm8904_pdata *pdata; 55*a91eb199SMark Brown 56*a91eb199SMark Brown int deemph; 57*a91eb199SMark Brown 58*a91eb199SMark Brown /* Platform provided DRC configuration */ 59*a91eb199SMark Brown const char **drc_texts; 60*a91eb199SMark Brown int drc_cfg; 61*a91eb199SMark Brown struct soc_enum drc_enum; 62*a91eb199SMark Brown 63*a91eb199SMark Brown /* Platform provided ReTune mobile configuration */ 64*a91eb199SMark Brown int num_retune_mobile_texts; 65*a91eb199SMark Brown const char **retune_mobile_texts; 66*a91eb199SMark Brown int retune_mobile_cfg; 67*a91eb199SMark Brown struct soc_enum retune_mobile_enum; 68*a91eb199SMark Brown 69*a91eb199SMark Brown /* FLL setup */ 70*a91eb199SMark Brown int fll_src; 71*a91eb199SMark Brown int fll_fref; 72*a91eb199SMark Brown int fll_fout; 73*a91eb199SMark Brown 74*a91eb199SMark Brown /* Clocking configuration */ 75*a91eb199SMark Brown unsigned int mclk_rate; 76*a91eb199SMark Brown int sysclk_src; 77*a91eb199SMark Brown unsigned int sysclk_rate; 78*a91eb199SMark Brown 79*a91eb199SMark Brown int tdm_width; 80*a91eb199SMark Brown int tdm_slots; 81*a91eb199SMark Brown int bclk; 82*a91eb199SMark Brown int fs; 83*a91eb199SMark Brown 84*a91eb199SMark Brown /* DC servo configuration - cached offset values */ 85*a91eb199SMark Brown int dcs_state[WM8904_NUM_DCS_CHANNELS]; 86*a91eb199SMark Brown }; 87*a91eb199SMark Brown 88*a91eb199SMark Brown static const u16 wm8904_reg[WM8904_MAX_REGISTER + 1] = { 89*a91eb199SMark Brown 0x8904, /* R0 - SW Reset and ID */ 90*a91eb199SMark Brown 0x0000, /* R1 - Revision */ 91*a91eb199SMark Brown 0x0000, /* R2 */ 92*a91eb199SMark Brown 0x0000, /* R3 */ 93*a91eb199SMark Brown 0x0018, /* R4 - Bias Control 0 */ 94*a91eb199SMark Brown 0x0000, /* R5 - VMID Control 0 */ 95*a91eb199SMark Brown 0x0000, /* R6 - Mic Bias Control 0 */ 96*a91eb199SMark Brown 0x0000, /* R7 - Mic Bias Control 1 */ 97*a91eb199SMark Brown 0x0001, /* R8 - Analogue DAC 0 */ 98*a91eb199SMark Brown 0x9696, /* R9 - mic Filter Control */ 99*a91eb199SMark Brown 0x0001, /* R10 - Analogue ADC 0 */ 100*a91eb199SMark Brown 0x0000, /* R11 */ 101*a91eb199SMark Brown 0x0000, /* R12 - Power Management 0 */ 102*a91eb199SMark Brown 0x0000, /* R13 */ 103*a91eb199SMark Brown 0x0000, /* R14 - Power Management 2 */ 104*a91eb199SMark Brown 0x0000, /* R15 - Power Management 3 */ 105*a91eb199SMark Brown 0x0000, /* R16 */ 106*a91eb199SMark Brown 0x0000, /* R17 */ 107*a91eb199SMark Brown 0x0000, /* R18 - Power Management 6 */ 108*a91eb199SMark Brown 0x0000, /* R19 */ 109*a91eb199SMark Brown 0x945E, /* R20 - Clock Rates 0 */ 110*a91eb199SMark Brown 0x0C05, /* R21 - Clock Rates 1 */ 111*a91eb199SMark Brown 0x0006, /* R22 - Clock Rates 2 */ 112*a91eb199SMark Brown 0x0000, /* R23 */ 113*a91eb199SMark Brown 0x0050, /* R24 - Audio Interface 0 */ 114*a91eb199SMark Brown 0x000A, /* R25 - Audio Interface 1 */ 115*a91eb199SMark Brown 0x00E4, /* R26 - Audio Interface 2 */ 116*a91eb199SMark Brown 0x0040, /* R27 - Audio Interface 3 */ 117*a91eb199SMark Brown 0x0000, /* R28 */ 118*a91eb199SMark Brown 0x0000, /* R29 */ 119*a91eb199SMark Brown 0x00C0, /* R30 - DAC Digital Volume Left */ 120*a91eb199SMark Brown 0x00C0, /* R31 - DAC Digital Volume Right */ 121*a91eb199SMark Brown 0x0000, /* R32 - DAC Digital 0 */ 122*a91eb199SMark Brown 0x0008, /* R33 - DAC Digital 1 */ 123*a91eb199SMark Brown 0x0000, /* R34 */ 124*a91eb199SMark Brown 0x0000, /* R35 */ 125*a91eb199SMark Brown 0x00C0, /* R36 - ADC Digital Volume Left */ 126*a91eb199SMark Brown 0x00C0, /* R37 - ADC Digital Volume Right */ 127*a91eb199SMark Brown 0x0010, /* R38 - ADC Digital 0 */ 128*a91eb199SMark Brown 0x0000, /* R39 - Digital Microphone 0 */ 129*a91eb199SMark Brown 0x01AF, /* R40 - DRC 0 */ 130*a91eb199SMark Brown 0x3248, /* R41 - DRC 1 */ 131*a91eb199SMark Brown 0x0000, /* R42 - DRC 2 */ 132*a91eb199SMark Brown 0x0000, /* R43 - DRC 3 */ 133*a91eb199SMark Brown 0x0085, /* R44 - Analogue Left Input 0 */ 134*a91eb199SMark Brown 0x0085, /* R45 - Analogue Right Input 0 */ 135*a91eb199SMark Brown 0x0044, /* R46 - Analogue Left Input 1 */ 136*a91eb199SMark Brown 0x0044, /* R47 - Analogue Right Input 1 */ 137*a91eb199SMark Brown 0x0000, /* R48 */ 138*a91eb199SMark Brown 0x0000, /* R49 */ 139*a91eb199SMark Brown 0x0000, /* R50 */ 140*a91eb199SMark Brown 0x0000, /* R51 */ 141*a91eb199SMark Brown 0x0000, /* R52 */ 142*a91eb199SMark Brown 0x0000, /* R53 */ 143*a91eb199SMark Brown 0x0000, /* R54 */ 144*a91eb199SMark Brown 0x0000, /* R55 */ 145*a91eb199SMark Brown 0x0000, /* R56 */ 146*a91eb199SMark Brown 0x002D, /* R57 - Analogue OUT1 Left */ 147*a91eb199SMark Brown 0x002D, /* R58 - Analogue OUT1 Right */ 148*a91eb199SMark Brown 0x0039, /* R59 - Analogue OUT2 Left */ 149*a91eb199SMark Brown 0x0039, /* R60 - Analogue OUT2 Right */ 150*a91eb199SMark Brown 0x0000, /* R61 - Analogue OUT12 ZC */ 151*a91eb199SMark Brown 0x0000, /* R62 */ 152*a91eb199SMark Brown 0x0000, /* R63 */ 153*a91eb199SMark Brown 0x0000, /* R64 */ 154*a91eb199SMark Brown 0x0000, /* R65 */ 155*a91eb199SMark Brown 0x0000, /* R66 */ 156*a91eb199SMark Brown 0x0000, /* R67 - DC Servo 0 */ 157*a91eb199SMark Brown 0x0000, /* R68 - DC Servo 1 */ 158*a91eb199SMark Brown 0xAAAA, /* R69 - DC Servo 2 */ 159*a91eb199SMark Brown 0x0000, /* R70 */ 160*a91eb199SMark Brown 0xAAAA, /* R71 - DC Servo 4 */ 161*a91eb199SMark Brown 0xAAAA, /* R72 - DC Servo 5 */ 162*a91eb199SMark Brown 0x0000, /* R73 - DC Servo 6 */ 163*a91eb199SMark Brown 0x0000, /* R74 - DC Servo 7 */ 164*a91eb199SMark Brown 0x0000, /* R75 - DC Servo 8 */ 165*a91eb199SMark Brown 0x0000, /* R76 - DC Servo 9 */ 166*a91eb199SMark Brown 0x0000, /* R77 - DC Servo Readback 0 */ 167*a91eb199SMark Brown 0x0000, /* R78 */ 168*a91eb199SMark Brown 0x0000, /* R79 */ 169*a91eb199SMark Brown 0x0000, /* R80 */ 170*a91eb199SMark Brown 0x0000, /* R81 */ 171*a91eb199SMark Brown 0x0000, /* R82 */ 172*a91eb199SMark Brown 0x0000, /* R83 */ 173*a91eb199SMark Brown 0x0000, /* R84 */ 174*a91eb199SMark Brown 0x0000, /* R85 */ 175*a91eb199SMark Brown 0x0000, /* R86 */ 176*a91eb199SMark Brown 0x0000, /* R87 */ 177*a91eb199SMark Brown 0x0000, /* R88 */ 178*a91eb199SMark Brown 0x0000, /* R89 */ 179*a91eb199SMark Brown 0x0000, /* R90 - Analogue HP 0 */ 180*a91eb199SMark Brown 0x0000, /* R91 */ 181*a91eb199SMark Brown 0x0000, /* R92 */ 182*a91eb199SMark Brown 0x0000, /* R93 */ 183*a91eb199SMark Brown 0x0000, /* R94 - Analogue Lineout 0 */ 184*a91eb199SMark Brown 0x0000, /* R95 */ 185*a91eb199SMark Brown 0x0000, /* R96 */ 186*a91eb199SMark Brown 0x0000, /* R97 */ 187*a91eb199SMark Brown 0x0000, /* R98 - Charge Pump 0 */ 188*a91eb199SMark Brown 0x0000, /* R99 */ 189*a91eb199SMark Brown 0x0000, /* R100 */ 190*a91eb199SMark Brown 0x0000, /* R101 */ 191*a91eb199SMark Brown 0x0000, /* R102 */ 192*a91eb199SMark Brown 0x0000, /* R103 */ 193*a91eb199SMark Brown 0x0004, /* R104 - Class W 0 */ 194*a91eb199SMark Brown 0x0000, /* R105 */ 195*a91eb199SMark Brown 0x0000, /* R106 */ 196*a91eb199SMark Brown 0x0000, /* R107 */ 197*a91eb199SMark Brown 0x0000, /* R108 - Write Sequencer 0 */ 198*a91eb199SMark Brown 0x0000, /* R109 - Write Sequencer 1 */ 199*a91eb199SMark Brown 0x0000, /* R110 - Write Sequencer 2 */ 200*a91eb199SMark Brown 0x0000, /* R111 - Write Sequencer 3 */ 201*a91eb199SMark Brown 0x0000, /* R112 - Write Sequencer 4 */ 202*a91eb199SMark Brown 0x0000, /* R113 */ 203*a91eb199SMark Brown 0x0000, /* R114 */ 204*a91eb199SMark Brown 0x0000, /* R115 */ 205*a91eb199SMark Brown 0x0000, /* R116 - FLL Control 1 */ 206*a91eb199SMark Brown 0x0007, /* R117 - FLL Control 2 */ 207*a91eb199SMark Brown 0x0000, /* R118 - FLL Control 3 */ 208*a91eb199SMark Brown 0x2EE0, /* R119 - FLL Control 4 */ 209*a91eb199SMark Brown 0x0004, /* R120 - FLL Control 5 */ 210*a91eb199SMark Brown 0x0014, /* R121 - GPIO Control 1 */ 211*a91eb199SMark Brown 0x0010, /* R122 - GPIO Control 2 */ 212*a91eb199SMark Brown 0x0010, /* R123 - GPIO Control 3 */ 213*a91eb199SMark Brown 0x0000, /* R124 - GPIO Control 4 */ 214*a91eb199SMark Brown 0x0000, /* R125 */ 215*a91eb199SMark Brown 0x0000, /* R126 - Digital Pulls */ 216*a91eb199SMark Brown 0x0000, /* R127 - Interrupt Status */ 217*a91eb199SMark Brown 0xFFFF, /* R128 - Interrupt Status Mask */ 218*a91eb199SMark Brown 0x0000, /* R129 - Interrupt Polarity */ 219*a91eb199SMark Brown 0x0000, /* R130 - Interrupt Debounce */ 220*a91eb199SMark Brown 0x0000, /* R131 */ 221*a91eb199SMark Brown 0x0000, /* R132 */ 222*a91eb199SMark Brown 0x0000, /* R133 */ 223*a91eb199SMark Brown 0x0000, /* R134 - EQ1 */ 224*a91eb199SMark Brown 0x000C, /* R135 - EQ2 */ 225*a91eb199SMark Brown 0x000C, /* R136 - EQ3 */ 226*a91eb199SMark Brown 0x000C, /* R137 - EQ4 */ 227*a91eb199SMark Brown 0x000C, /* R138 - EQ5 */ 228*a91eb199SMark Brown 0x000C, /* R139 - EQ6 */ 229*a91eb199SMark Brown 0x0FCA, /* R140 - EQ7 */ 230*a91eb199SMark Brown 0x0400, /* R141 - EQ8 */ 231*a91eb199SMark Brown 0x00D8, /* R142 - EQ9 */ 232*a91eb199SMark Brown 0x1EB5, /* R143 - EQ10 */ 233*a91eb199SMark Brown 0xF145, /* R144 - EQ11 */ 234*a91eb199SMark Brown 0x0B75, /* R145 - EQ12 */ 235*a91eb199SMark Brown 0x01C5, /* R146 - EQ13 */ 236*a91eb199SMark Brown 0x1C58, /* R147 - EQ14 */ 237*a91eb199SMark Brown 0xF373, /* R148 - EQ15 */ 238*a91eb199SMark Brown 0x0A54, /* R149 - EQ16 */ 239*a91eb199SMark Brown 0x0558, /* R150 - EQ17 */ 240*a91eb199SMark Brown 0x168E, /* R151 - EQ18 */ 241*a91eb199SMark Brown 0xF829, /* R152 - EQ19 */ 242*a91eb199SMark Brown 0x07AD, /* R153 - EQ20 */ 243*a91eb199SMark Brown 0x1103, /* R154 - EQ21 */ 244*a91eb199SMark Brown 0x0564, /* R155 - EQ22 */ 245*a91eb199SMark Brown 0x0559, /* R156 - EQ23 */ 246*a91eb199SMark Brown 0x4000, /* R157 - EQ24 */ 247*a91eb199SMark Brown 0x0000, /* R158 */ 248*a91eb199SMark Brown 0x0000, /* R159 */ 249*a91eb199SMark Brown 0x0000, /* R160 */ 250*a91eb199SMark Brown 0x0000, /* R161 - Control Interface Test 1 */ 251*a91eb199SMark Brown 0x0000, /* R162 */ 252*a91eb199SMark Brown 0x0000, /* R163 */ 253*a91eb199SMark Brown 0x0000, /* R164 */ 254*a91eb199SMark Brown 0x0000, /* R165 */ 255*a91eb199SMark Brown 0x0000, /* R166 */ 256*a91eb199SMark Brown 0x0000, /* R167 */ 257*a91eb199SMark Brown 0x0000, /* R168 */ 258*a91eb199SMark Brown 0x0000, /* R169 */ 259*a91eb199SMark Brown 0x0000, /* R170 */ 260*a91eb199SMark Brown 0x0000, /* R171 */ 261*a91eb199SMark Brown 0x0000, /* R172 */ 262*a91eb199SMark Brown 0x0000, /* R173 */ 263*a91eb199SMark Brown 0x0000, /* R174 */ 264*a91eb199SMark Brown 0x0000, /* R175 */ 265*a91eb199SMark Brown 0x0000, /* R176 */ 266*a91eb199SMark Brown 0x0000, /* R177 */ 267*a91eb199SMark Brown 0x0000, /* R178 */ 268*a91eb199SMark Brown 0x0000, /* R179 */ 269*a91eb199SMark Brown 0x0000, /* R180 */ 270*a91eb199SMark Brown 0x0000, /* R181 */ 271*a91eb199SMark Brown 0x0000, /* R182 */ 272*a91eb199SMark Brown 0x0000, /* R183 */ 273*a91eb199SMark Brown 0x0000, /* R184 */ 274*a91eb199SMark Brown 0x0000, /* R185 */ 275*a91eb199SMark Brown 0x0000, /* R186 */ 276*a91eb199SMark Brown 0x0000, /* R187 */ 277*a91eb199SMark Brown 0x0000, /* R188 */ 278*a91eb199SMark Brown 0x0000, /* R189 */ 279*a91eb199SMark Brown 0x0000, /* R190 */ 280*a91eb199SMark Brown 0x0000, /* R191 */ 281*a91eb199SMark Brown 0x0000, /* R192 */ 282*a91eb199SMark Brown 0x0000, /* R193 */ 283*a91eb199SMark Brown 0x0000, /* R194 */ 284*a91eb199SMark Brown 0x0000, /* R195 */ 285*a91eb199SMark Brown 0x0000, /* R196 */ 286*a91eb199SMark Brown 0x0000, /* R197 */ 287*a91eb199SMark Brown 0x0000, /* R198 */ 288*a91eb199SMark Brown 0x0000, /* R199 */ 289*a91eb199SMark Brown 0x0000, /* R200 */ 290*a91eb199SMark Brown 0x0000, /* R201 */ 291*a91eb199SMark Brown 0x0000, /* R202 */ 292*a91eb199SMark Brown 0x0000, /* R203 */ 293*a91eb199SMark Brown 0x0000, /* R204 - Analogue Output Bias 0 */ 294*a91eb199SMark Brown 0x0000, /* R205 */ 295*a91eb199SMark Brown 0x0000, /* R206 */ 296*a91eb199SMark Brown 0x0000, /* R207 */ 297*a91eb199SMark Brown 0x0000, /* R208 */ 298*a91eb199SMark Brown 0x0000, /* R209 */ 299*a91eb199SMark Brown 0x0000, /* R210 */ 300*a91eb199SMark Brown 0x0000, /* R211 */ 301*a91eb199SMark Brown 0x0000, /* R212 */ 302*a91eb199SMark Brown 0x0000, /* R213 */ 303*a91eb199SMark Brown 0x0000, /* R214 */ 304*a91eb199SMark Brown 0x0000, /* R215 */ 305*a91eb199SMark Brown 0x0000, /* R216 */ 306*a91eb199SMark Brown 0x0000, /* R217 */ 307*a91eb199SMark Brown 0x0000, /* R218 */ 308*a91eb199SMark Brown 0x0000, /* R219 */ 309*a91eb199SMark Brown 0x0000, /* R220 */ 310*a91eb199SMark Brown 0x0000, /* R221 */ 311*a91eb199SMark Brown 0x0000, /* R222 */ 312*a91eb199SMark Brown 0x0000, /* R223 */ 313*a91eb199SMark Brown 0x0000, /* R224 */ 314*a91eb199SMark Brown 0x0000, /* R225 */ 315*a91eb199SMark Brown 0x0000, /* R226 */ 316*a91eb199SMark Brown 0x0000, /* R227 */ 317*a91eb199SMark Brown 0x0000, /* R228 */ 318*a91eb199SMark Brown 0x0000, /* R229 */ 319*a91eb199SMark Brown 0x0000, /* R230 */ 320*a91eb199SMark Brown 0x0000, /* R231 */ 321*a91eb199SMark Brown 0x0000, /* R232 */ 322*a91eb199SMark Brown 0x0000, /* R233 */ 323*a91eb199SMark Brown 0x0000, /* R234 */ 324*a91eb199SMark Brown 0x0000, /* R235 */ 325*a91eb199SMark Brown 0x0000, /* R236 */ 326*a91eb199SMark Brown 0x0000, /* R237 */ 327*a91eb199SMark Brown 0x0000, /* R238 */ 328*a91eb199SMark Brown 0x0000, /* R239 */ 329*a91eb199SMark Brown 0x0000, /* R240 */ 330*a91eb199SMark Brown 0x0000, /* R241 */ 331*a91eb199SMark Brown 0x0000, /* R242 */ 332*a91eb199SMark Brown 0x0000, /* R243 */ 333*a91eb199SMark Brown 0x0000, /* R244 */ 334*a91eb199SMark Brown 0x0000, /* R245 */ 335*a91eb199SMark Brown 0x0000, /* R246 */ 336*a91eb199SMark Brown 0x0000, /* R247 - FLL NCO Test 0 */ 337*a91eb199SMark Brown 0x0019, /* R248 - FLL NCO Test 1 */ 338*a91eb199SMark Brown }; 339*a91eb199SMark Brown 340*a91eb199SMark Brown static struct { 341*a91eb199SMark Brown int readable; 342*a91eb199SMark Brown int writable; 343*a91eb199SMark Brown int vol; 344*a91eb199SMark Brown } wm8904_access[] = { 345*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 1 }, /* R0 - SW Reset and ID */ 346*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R1 - Revision */ 347*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R2 */ 348*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R3 */ 349*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R4 - Bias Control 0 */ 350*a91eb199SMark Brown { 0x0047, 0x0047, 0 }, /* R5 - VMID Control 0 */ 351*a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R6 - Mic Bias Control 0 */ 352*a91eb199SMark Brown { 0xC007, 0xC007, 0 }, /* R7 - Mic Bias Control 1 */ 353*a91eb199SMark Brown { 0x001E, 0x001E, 0 }, /* R8 - Analogue DAC 0 */ 354*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R9 - mic Filter Control */ 355*a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R10 - Analogue ADC 0 */ 356*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R11 */ 357*a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R12 - Power Management 0 */ 358*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R13 */ 359*a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R14 - Power Management 2 */ 360*a91eb199SMark Brown { 0x0003, 0x0003, 0 }, /* R15 - Power Management 3 */ 361*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R16 */ 362*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R17 */ 363*a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R18 - Power Management 6 */ 364*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R19 */ 365*a91eb199SMark Brown { 0x7001, 0x7001, 0 }, /* R20 - Clock Rates 0 */ 366*a91eb199SMark Brown { 0x3C07, 0x3C07, 0 }, /* R21 - Clock Rates 1 */ 367*a91eb199SMark Brown { 0xD00F, 0xD00F, 0 }, /* R22 - Clock Rates 2 */ 368*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R23 */ 369*a91eb199SMark Brown { 0x1FFF, 0x1FFF, 0 }, /* R24 - Audio Interface 0 */ 370*a91eb199SMark Brown { 0x3DDF, 0x3DDF, 0 }, /* R25 - Audio Interface 1 */ 371*a91eb199SMark Brown { 0x0F1F, 0x0F1F, 0 }, /* R26 - Audio Interface 2 */ 372*a91eb199SMark Brown { 0x0FFF, 0x0FFF, 0 }, /* R27 - Audio Interface 3 */ 373*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R28 */ 374*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R29 */ 375*a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R30 - DAC Digital Volume Left */ 376*a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R31 - DAC Digital Volume Right */ 377*a91eb199SMark Brown { 0x0FFF, 0x0FFF, 0 }, /* R32 - DAC Digital 0 */ 378*a91eb199SMark Brown { 0x1E4E, 0x1E4E, 0 }, /* R33 - DAC Digital 1 */ 379*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R34 */ 380*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R35 */ 381*a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R36 - ADC Digital Volume Left */ 382*a91eb199SMark Brown { 0x00FF, 0x01FF, 0 }, /* R37 - ADC Digital Volume Right */ 383*a91eb199SMark Brown { 0x0073, 0x0073, 0 }, /* R38 - ADC Digital 0 */ 384*a91eb199SMark Brown { 0x1800, 0x1800, 0 }, /* R39 - Digital Microphone 0 */ 385*a91eb199SMark Brown { 0xDFEF, 0xDFEF, 0 }, /* R40 - DRC 0 */ 386*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R41 - DRC 1 */ 387*a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R42 - DRC 2 */ 388*a91eb199SMark Brown { 0x07FF, 0x07FF, 0 }, /* R43 - DRC 3 */ 389*a91eb199SMark Brown { 0x009F, 0x009F, 0 }, /* R44 - Analogue Left Input 0 */ 390*a91eb199SMark Brown { 0x009F, 0x009F, 0 }, /* R45 - Analogue Right Input 0 */ 391*a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R46 - Analogue Left Input 1 */ 392*a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R47 - Analogue Right Input 1 */ 393*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R48 */ 394*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R49 */ 395*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R50 */ 396*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R51 */ 397*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R52 */ 398*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R53 */ 399*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R54 */ 400*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R55 */ 401*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R56 */ 402*a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R57 - Analogue OUT1 Left */ 403*a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R58 - Analogue OUT1 Right */ 404*a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R59 - Analogue OUT2 Left */ 405*a91eb199SMark Brown { 0x017F, 0x01FF, 0 }, /* R60 - Analogue OUT2 Right */ 406*a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R61 - Analogue OUT12 ZC */ 407*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R62 */ 408*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R63 */ 409*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R64 */ 410*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R65 */ 411*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R66 */ 412*a91eb199SMark Brown { 0x000F, 0x000F, 0 }, /* R67 - DC Servo 0 */ 413*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 1 }, /* R68 - DC Servo 1 */ 414*a91eb199SMark Brown { 0x0F0F, 0x0F0F, 0 }, /* R69 - DC Servo 2 */ 415*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R70 */ 416*a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R71 - DC Servo 4 */ 417*a91eb199SMark Brown { 0x007F, 0x007F, 0 }, /* R72 - DC Servo 5 */ 418*a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R73 - DC Servo 6 */ 419*a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R74 - DC Servo 7 */ 420*a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R75 - DC Servo 8 */ 421*a91eb199SMark Brown { 0x00FF, 0x00FF, 1 }, /* R76 - DC Servo 9 */ 422*a91eb199SMark Brown { 0x0FFF, 0x0000, 1 }, /* R77 - DC Servo Readback 0 */ 423*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R78 */ 424*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R79 */ 425*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R80 */ 426*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R81 */ 427*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R82 */ 428*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R83 */ 429*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R84 */ 430*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R85 */ 431*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R86 */ 432*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R87 */ 433*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R88 */ 434*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R89 */ 435*a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R90 - Analogue HP 0 */ 436*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R91 */ 437*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R92 */ 438*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R93 */ 439*a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R94 - Analogue Lineout 0 */ 440*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R95 */ 441*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R96 */ 442*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R97 */ 443*a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R98 - Charge Pump 0 */ 444*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R99 */ 445*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R100 */ 446*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R101 */ 447*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R102 */ 448*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R103 */ 449*a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R104 - Class W 0 */ 450*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R105 */ 451*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R106 */ 452*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R107 */ 453*a91eb199SMark Brown { 0x011F, 0x011F, 0 }, /* R108 - Write Sequencer 0 */ 454*a91eb199SMark Brown { 0x7FFF, 0x7FFF, 0 }, /* R109 - Write Sequencer 1 */ 455*a91eb199SMark Brown { 0x4FFF, 0x4FFF, 0 }, /* R110 - Write Sequencer 2 */ 456*a91eb199SMark Brown { 0x003F, 0x033F, 0 }, /* R111 - Write Sequencer 3 */ 457*a91eb199SMark Brown { 0x03F1, 0x0000, 0 }, /* R112 - Write Sequencer 4 */ 458*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R113 */ 459*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R114 */ 460*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R115 */ 461*a91eb199SMark Brown { 0x0007, 0x0007, 0 }, /* R116 - FLL Control 1 */ 462*a91eb199SMark Brown { 0x3F77, 0x3F77, 0 }, /* R117 - FLL Control 2 */ 463*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R118 - FLL Control 3 */ 464*a91eb199SMark Brown { 0x7FEF, 0x7FEF, 0 }, /* R119 - FLL Control 4 */ 465*a91eb199SMark Brown { 0x001B, 0x001B, 0 }, /* R120 - FLL Control 5 */ 466*a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R121 - GPIO Control 1 */ 467*a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R122 - GPIO Control 2 */ 468*a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R123 - GPIO Control 3 */ 469*a91eb199SMark Brown { 0x038F, 0x038F, 0 }, /* R124 - GPIO Control 4 */ 470*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R125 */ 471*a91eb199SMark Brown { 0x00FF, 0x00FF, 0 }, /* R126 - Digital Pulls */ 472*a91eb199SMark Brown { 0x07FF, 0x03FF, 1 }, /* R127 - Interrupt Status */ 473*a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R128 - Interrupt Status Mask */ 474*a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R129 - Interrupt Polarity */ 475*a91eb199SMark Brown { 0x03FF, 0x03FF, 0 }, /* R130 - Interrupt Debounce */ 476*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R131 */ 477*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R132 */ 478*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R133 */ 479*a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R134 - EQ1 */ 480*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R135 - EQ2 */ 481*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R136 - EQ3 */ 482*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R137 - EQ4 */ 483*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R138 - EQ5 */ 484*a91eb199SMark Brown { 0x001F, 0x001F, 0 }, /* R139 - EQ6 */ 485*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R140 - EQ7 */ 486*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R141 - EQ8 */ 487*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R142 - EQ9 */ 488*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R143 - EQ10 */ 489*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R144 - EQ11 */ 490*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R145 - EQ12 */ 491*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R146 - EQ13 */ 492*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R147 - EQ14 */ 493*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R148 - EQ15 */ 494*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R149 - EQ16 */ 495*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R150 - EQ17 */ 496*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R151wm8523_dai - EQ18 */ 497*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R152 - EQ19 */ 498*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R153 - EQ20 */ 499*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R154 - EQ21 */ 500*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R155 - EQ22 */ 501*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R156 - EQ23 */ 502*a91eb199SMark Brown { 0xFFFF, 0xFFFF, 0 }, /* R157 - EQ24 */ 503*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R158 */ 504*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R159 */ 505*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R160 */ 506*a91eb199SMark Brown { 0x0002, 0x0002, 0 }, /* R161 - Control Interface Test 1 */ 507*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R162 */ 508*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R163 */ 509*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R164 */ 510*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R165 */ 511*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R166 */ 512*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R167 */ 513*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R168 */ 514*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R169 */ 515*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R170 */ 516*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R171 */ 517*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R172 */ 518*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R173 */ 519*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R174 */ 520*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R175 */ 521*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R176 */ 522*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R177 */ 523*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R178 */ 524*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R179 */ 525*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R180 */ 526*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R181 */ 527*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R182 */ 528*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R183 */ 529*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R184 */ 530*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R185 */ 531*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R186 */ 532*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R187 */ 533*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R188 */ 534*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R189 */ 535*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R190 */ 536*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R191 */ 537*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R192 */ 538*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R193 */ 539*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R194 */ 540*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R195 */ 541*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R196 */ 542*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R197 */ 543*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R198 */ 544*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R199 */ 545*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R200 */ 546*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R201 */ 547*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R202 */ 548*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R203 */ 549*a91eb199SMark Brown { 0x0070, 0x0070, 0 }, /* R204 - Analogue Output Bias 0 */ 550*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R205 */ 551*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R206 */ 552*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R207 */ 553*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R208 */ 554*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R209 */ 555*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R210 */ 556*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R211 */ 557*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R212 */ 558*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R213 */ 559*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R214 */ 560*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R215 */ 561*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R216 */ 562*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R217 */ 563*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R218 */ 564*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R219 */ 565*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R220 */ 566*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R221 */ 567*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R222 */ 568*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R223 */ 569*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R224 */ 570*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R225 */ 571*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R226 */ 572*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R227 */ 573*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R228 */ 574*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R229 */ 575*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R230 */ 576*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R231 */ 577*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R232 */ 578*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R233 */ 579*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R234 */ 580*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R235 */ 581*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R236 */ 582*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R237 */ 583*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R238 */ 584*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R239 */ 585*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R240 */ 586*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R241 */ 587*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R242 */ 588*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R243 */ 589*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R244 */ 590*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R245 */ 591*a91eb199SMark Brown { 0x0000, 0x0000, 0 }, /* R246 */ 592*a91eb199SMark Brown { 0x0001, 0x0001, 0 }, /* R247 - FLL NCO Test 0 */ 593*a91eb199SMark Brown { 0x003F, 0x003F, 0 }, /* R248 - FLL NCO Test 1 */ 594*a91eb199SMark Brown }; 595*a91eb199SMark Brown 596*a91eb199SMark Brown static int wm8904_volatile_register(unsigned int reg) 597*a91eb199SMark Brown { 598*a91eb199SMark Brown return wm8904_access[reg].vol; 599*a91eb199SMark Brown } 600*a91eb199SMark Brown 601*a91eb199SMark Brown static int wm8904_reset(struct snd_soc_codec *codec) 602*a91eb199SMark Brown { 603*a91eb199SMark Brown return snd_soc_write(codec, WM8904_SW_RESET_AND_ID, 0); 604*a91eb199SMark Brown } 605*a91eb199SMark Brown 606*a91eb199SMark Brown static int wm8904_configure_clocking(struct snd_soc_codec *codec) 607*a91eb199SMark Brown { 608*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 609*a91eb199SMark Brown unsigned int clock0, clock2, rate; 610*a91eb199SMark Brown 611*a91eb199SMark Brown /* Gate the clock while we're updating to avoid misclocking */ 612*a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 613*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 614*a91eb199SMark Brown WM8904_SYSCLK_SRC, 0); 615*a91eb199SMark Brown 616*a91eb199SMark Brown /* This should be done on init() for bypass paths */ 617*a91eb199SMark Brown switch (wm8904->sysclk_src) { 618*a91eb199SMark Brown case WM8904_CLK_MCLK: 619*a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate); 620*a91eb199SMark Brown 621*a91eb199SMark Brown clock2 &= ~WM8904_SYSCLK_SRC; 622*a91eb199SMark Brown rate = wm8904->mclk_rate; 623*a91eb199SMark Brown 624*a91eb199SMark Brown /* Ensure the FLL is stopped */ 625*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 626*a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 627*a91eb199SMark Brown break; 628*a91eb199SMark Brown 629*a91eb199SMark Brown case WM8904_CLK_FLL: 630*a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz FLL clock\n", 631*a91eb199SMark Brown wm8904->fll_fout); 632*a91eb199SMark Brown 633*a91eb199SMark Brown clock2 |= WM8904_SYSCLK_SRC; 634*a91eb199SMark Brown rate = wm8904->fll_fout; 635*a91eb199SMark Brown break; 636*a91eb199SMark Brown 637*a91eb199SMark Brown default: 638*a91eb199SMark Brown dev_err(codec->dev, "System clock not configured\n"); 639*a91eb199SMark Brown return -EINVAL; 640*a91eb199SMark Brown } 641*a91eb199SMark Brown 642*a91eb199SMark Brown /* SYSCLK shouldn't be over 13.5MHz */ 643*a91eb199SMark Brown if (rate > 13500000) { 644*a91eb199SMark Brown clock0 = WM8904_MCLK_DIV; 645*a91eb199SMark Brown wm8904->sysclk_rate = rate / 2; 646*a91eb199SMark Brown } else { 647*a91eb199SMark Brown clock0 = 0; 648*a91eb199SMark Brown wm8904->sysclk_rate = rate; 649*a91eb199SMark Brown } 650*a91eb199SMark Brown 651*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV, 652*a91eb199SMark Brown clock0); 653*a91eb199SMark Brown 654*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 655*a91eb199SMark Brown WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2); 656*a91eb199SMark Brown 657*a91eb199SMark Brown dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate); 658*a91eb199SMark Brown 659*a91eb199SMark Brown return 0; 660*a91eb199SMark Brown } 661*a91eb199SMark Brown 662*a91eb199SMark Brown static void wm8904_set_drc(struct snd_soc_codec *codec) 663*a91eb199SMark Brown { 664*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 665*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 666*a91eb199SMark Brown int save, i; 667*a91eb199SMark Brown 668*a91eb199SMark Brown /* Save any enables; the configuration should clear them. */ 669*a91eb199SMark Brown save = snd_soc_read(codec, WM8904_DRC_0); 670*a91eb199SMark Brown 671*a91eb199SMark Brown for (i = 0; i < WM8904_DRC_REGS; i++) 672*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff, 673*a91eb199SMark Brown pdata->drc_cfgs[wm8904->drc_cfg].regs[i]); 674*a91eb199SMark Brown 675*a91eb199SMark Brown /* Reenable the DRC */ 676*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0, 677*a91eb199SMark Brown WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save); 678*a91eb199SMark Brown } 679*a91eb199SMark Brown 680*a91eb199SMark Brown static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 681*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 682*a91eb199SMark Brown { 683*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 684*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 685*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 686*a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 687*a91eb199SMark Brown 688*a91eb199SMark Brown if (value >= pdata->num_drc_cfgs) 689*a91eb199SMark Brown return -EINVAL; 690*a91eb199SMark Brown 691*a91eb199SMark Brown wm8904->drc_cfg = value; 692*a91eb199SMark Brown 693*a91eb199SMark Brown wm8904_set_drc(codec); 694*a91eb199SMark Brown 695*a91eb199SMark Brown return 0; 696*a91eb199SMark Brown } 697*a91eb199SMark Brown 698*a91eb199SMark Brown static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 699*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 700*a91eb199SMark Brown { 701*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 702*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 703*a91eb199SMark Brown 704*a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 705*a91eb199SMark Brown 706*a91eb199SMark Brown return 0; 707*a91eb199SMark Brown } 708*a91eb199SMark Brown 709*a91eb199SMark Brown static void wm8904_set_retune_mobile(struct snd_soc_codec *codec) 710*a91eb199SMark Brown { 711*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 712*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 713*a91eb199SMark Brown int best, best_val, save, i, cfg; 714*a91eb199SMark Brown 715*a91eb199SMark Brown if (!pdata || !wm8904->num_retune_mobile_texts) 716*a91eb199SMark Brown return; 717*a91eb199SMark Brown 718*a91eb199SMark Brown /* Find the version of the currently selected configuration 719*a91eb199SMark Brown * with the nearest sample rate. */ 720*a91eb199SMark Brown cfg = wm8904->retune_mobile_cfg; 721*a91eb199SMark Brown best = 0; 722*a91eb199SMark Brown best_val = INT_MAX; 723*a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 724*a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 725*a91eb199SMark Brown wm8904->retune_mobile_texts[cfg]) == 0 && 726*a91eb199SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 727*a91eb199SMark Brown - wm8904->fs) < best_val) { 728*a91eb199SMark Brown best = i; 729*a91eb199SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 730*a91eb199SMark Brown - wm8904->fs); 731*a91eb199SMark Brown } 732*a91eb199SMark Brown } 733*a91eb199SMark Brown 734*a91eb199SMark Brown dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n", 735*a91eb199SMark Brown pdata->retune_mobile_cfgs[best].name, 736*a91eb199SMark Brown pdata->retune_mobile_cfgs[best].rate, 737*a91eb199SMark Brown wm8904->fs); 738*a91eb199SMark Brown 739*a91eb199SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 740*a91eb199SMark Brown * current configuration. 741*a91eb199SMark Brown */ 742*a91eb199SMark Brown save = snd_soc_read(codec, WM8904_EQ1); 743*a91eb199SMark Brown 744*a91eb199SMark Brown for (i = 0; i < WM8904_EQ_REGS; i++) 745*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff, 746*a91eb199SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 747*a91eb199SMark Brown 748*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save); 749*a91eb199SMark Brown } 750*a91eb199SMark Brown 751*a91eb199SMark Brown static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 752*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 753*a91eb199SMark Brown { 754*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 755*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 756*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 757*a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 758*a91eb199SMark Brown 759*a91eb199SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 760*a91eb199SMark Brown return -EINVAL; 761*a91eb199SMark Brown 762*a91eb199SMark Brown wm8904->retune_mobile_cfg = value; 763*a91eb199SMark Brown 764*a91eb199SMark Brown wm8904_set_retune_mobile(codec); 765*a91eb199SMark Brown 766*a91eb199SMark Brown return 0; 767*a91eb199SMark Brown } 768*a91eb199SMark Brown 769*a91eb199SMark Brown static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 770*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 771*a91eb199SMark Brown { 772*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 773*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 774*a91eb199SMark Brown 775*a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 776*a91eb199SMark Brown 777*a91eb199SMark Brown return 0; 778*a91eb199SMark Brown } 779*a91eb199SMark Brown 780*a91eb199SMark Brown static int deemph_settings[] = { 0, 32000, 44100, 48000 }; 781*a91eb199SMark Brown 782*a91eb199SMark Brown static int wm8904_set_deemph(struct snd_soc_codec *codec) 783*a91eb199SMark Brown { 784*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 785*a91eb199SMark Brown int val, i, best; 786*a91eb199SMark Brown 787*a91eb199SMark Brown /* If we're using deemphasis select the nearest available sample 788*a91eb199SMark Brown * rate. 789*a91eb199SMark Brown */ 790*a91eb199SMark Brown if (wm8904->deemph) { 791*a91eb199SMark Brown best = 1; 792*a91eb199SMark Brown for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 793*a91eb199SMark Brown if (abs(deemph_settings[i] - wm8904->fs) < 794*a91eb199SMark Brown abs(deemph_settings[best] - wm8904->fs)) 795*a91eb199SMark Brown best = i; 796*a91eb199SMark Brown } 797*a91eb199SMark Brown 798*a91eb199SMark Brown val = best << WM8904_DEEMPH_SHIFT; 799*a91eb199SMark Brown } else { 800*a91eb199SMark Brown val = 0; 801*a91eb199SMark Brown } 802*a91eb199SMark Brown 803*a91eb199SMark Brown dev_dbg(codec->dev, "Set deemphasis %d\n", val); 804*a91eb199SMark Brown 805*a91eb199SMark Brown return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 806*a91eb199SMark Brown WM8904_DEEMPH_MASK, val); 807*a91eb199SMark Brown } 808*a91eb199SMark Brown 809*a91eb199SMark Brown static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 810*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 811*a91eb199SMark Brown { 812*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 813*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 814*a91eb199SMark Brown 815*a91eb199SMark Brown return wm8904->deemph; 816*a91eb199SMark Brown } 817*a91eb199SMark Brown 818*a91eb199SMark Brown static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 819*a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 820*a91eb199SMark Brown { 821*a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 822*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 823*a91eb199SMark Brown int deemph = ucontrol->value.enumerated.item[0]; 824*a91eb199SMark Brown 825*a91eb199SMark Brown if (deemph > 1) 826*a91eb199SMark Brown return -EINVAL; 827*a91eb199SMark Brown 828*a91eb199SMark Brown wm8904->deemph = deemph; 829*a91eb199SMark Brown 830*a91eb199SMark Brown return wm8904_set_deemph(codec); 831*a91eb199SMark Brown } 832*a91eb199SMark Brown 833*a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0); 834*a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 835*a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 836*a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); 837*a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 838*a91eb199SMark Brown 839*a91eb199SMark Brown static const char *input_mode_text[] = { 840*a91eb199SMark Brown "Single-Ended", "Differential Line", "Differential Mic" 841*a91eb199SMark Brown }; 842*a91eb199SMark Brown 843*a91eb199SMark Brown static const struct soc_enum lin_mode = 844*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text); 845*a91eb199SMark Brown 846*a91eb199SMark Brown static const struct soc_enum rin_mode = 847*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text); 848*a91eb199SMark Brown 849*a91eb199SMark Brown static const char *hpf_mode_text[] = { 850*a91eb199SMark Brown "Hi-fi", "Voice 1", "Voice 2", "Voice 3" 851*a91eb199SMark Brown }; 852*a91eb199SMark Brown 853*a91eb199SMark Brown static const struct soc_enum hpf_mode = 854*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ADC_DIGITAL_0, 5, 4, hpf_mode_text); 855*a91eb199SMark Brown 856*a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { 857*a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, 858*a91eb199SMark Brown WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), 859*a91eb199SMark Brown 860*a91eb199SMark Brown SOC_ENUM("Left Caputure Mode", lin_mode), 861*a91eb199SMark Brown SOC_ENUM("Right Capture Mode", rin_mode), 862*a91eb199SMark Brown 863*a91eb199SMark Brown /* No TLV since it depends on mode */ 864*a91eb199SMark Brown SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, 865*a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), 866*a91eb199SMark Brown SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, 867*a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 0), 868*a91eb199SMark Brown 869*a91eb199SMark Brown SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), 870*a91eb199SMark Brown SOC_ENUM("High Pass Filter Mode", hpf_mode), 871*a91eb199SMark Brown 872*a91eb199SMark Brown SOC_SINGLE("ADC 128x OSR Switch", WM8904_ANALOGUE_ADC_0, 0, 1, 0), 873*a91eb199SMark Brown }; 874*a91eb199SMark Brown 875*a91eb199SMark Brown static const char *drc_path_text[] = { 876*a91eb199SMark Brown "ADC", "DAC" 877*a91eb199SMark Brown }; 878*a91eb199SMark Brown 879*a91eb199SMark Brown static const struct soc_enum drc_path = 880*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DRC_0, 14, 2, drc_path_text); 881*a91eb199SMark Brown 882*a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_dac_snd_controls[] = { 883*a91eb199SMark Brown SOC_SINGLE_TLV("Digital Playback Boost Volume", 884*a91eb199SMark Brown WM8904_AUDIO_INTERFACE_0, 9, 3, 0, dac_boost_tlv), 885*a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8904_DAC_DIGITAL_VOLUME_LEFT, 886*a91eb199SMark Brown WM8904_DAC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv), 887*a91eb199SMark Brown 888*a91eb199SMark Brown SOC_DOUBLE_R_TLV("Headphone Volume", WM8904_ANALOGUE_OUT1_LEFT, 889*a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 0, 63, 0, out_tlv), 890*a91eb199SMark Brown SOC_DOUBLE_R("Headphone Switch", WM8904_ANALOGUE_OUT1_LEFT, 891*a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 8, 1, 1), 892*a91eb199SMark Brown SOC_DOUBLE_R("Headphone ZC Switch", WM8904_ANALOGUE_OUT1_LEFT, 893*a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 6, 1, 0), 894*a91eb199SMark Brown 895*a91eb199SMark Brown SOC_DOUBLE_R_TLV("Line Output Volume", WM8904_ANALOGUE_OUT2_LEFT, 896*a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 0, 63, 0, out_tlv), 897*a91eb199SMark Brown SOC_DOUBLE_R("Line Output Switch", WM8904_ANALOGUE_OUT2_LEFT, 898*a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 8, 1, 1), 899*a91eb199SMark Brown SOC_DOUBLE_R("Line Output ZC Switch", WM8904_ANALOGUE_OUT2_LEFT, 900*a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 6, 1, 0), 901*a91eb199SMark Brown 902*a91eb199SMark Brown SOC_SINGLE("EQ Switch", WM8904_EQ1, 0, 1, 0), 903*a91eb199SMark Brown SOC_SINGLE("DRC Switch", WM8904_DRC_0, 15, 1, 0), 904*a91eb199SMark Brown SOC_ENUM("DRC Path", drc_path), 905*a91eb199SMark Brown SOC_SINGLE("DAC OSRx2 Switch", WM8904_DAC_DIGITAL_1, 6, 1, 0), 906*a91eb199SMark Brown SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 907*a91eb199SMark Brown wm8904_get_deemph, wm8904_put_deemph), 908*a91eb199SMark Brown }; 909*a91eb199SMark Brown 910*a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_snd_controls[] = { 911*a91eb199SMark Brown SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8904_DAC_DIGITAL_0, 4, 8, 15, 0, 912*a91eb199SMark Brown sidetone_tlv), 913*a91eb199SMark Brown }; 914*a91eb199SMark Brown 915*a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_eq_controls[] = { 916*a91eb199SMark Brown SOC_SINGLE_TLV("EQ1 Volume", WM8904_EQ2, 0, 24, 0, eq_tlv), 917*a91eb199SMark Brown SOC_SINGLE_TLV("EQ2 Volume", WM8904_EQ3, 0, 24, 0, eq_tlv), 918*a91eb199SMark Brown SOC_SINGLE_TLV("EQ3 Volume", WM8904_EQ4, 0, 24, 0, eq_tlv), 919*a91eb199SMark Brown SOC_SINGLE_TLV("EQ4 Volume", WM8904_EQ5, 0, 24, 0, eq_tlv), 920*a91eb199SMark Brown SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), 921*a91eb199SMark Brown }; 922*a91eb199SMark Brown 923*a91eb199SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 924*a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 925*a91eb199SMark Brown { 926*a91eb199SMark Brown BUG_ON(event != SND_SOC_DAPM_POST_PMU); 927*a91eb199SMark Brown 928*a91eb199SMark Brown /* Maximum startup time */ 929*a91eb199SMark Brown udelay(500); 930*a91eb199SMark Brown 931*a91eb199SMark Brown return 0; 932*a91eb199SMark Brown } 933*a91eb199SMark Brown 934*a91eb199SMark Brown static int sysclk_event(struct snd_soc_dapm_widget *w, 935*a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 936*a91eb199SMark Brown { 937*a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 938*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 939*a91eb199SMark Brown 940*a91eb199SMark Brown switch (event) { 941*a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMU: 942*a91eb199SMark Brown /* If we're using the FLL then we only start it when 943*a91eb199SMark Brown * required; we assume that the configuration has been 944*a91eb199SMark Brown * done previously and all we need to do is kick it 945*a91eb199SMark Brown * off. 946*a91eb199SMark Brown */ 947*a91eb199SMark Brown switch (wm8904->sysclk_src) { 948*a91eb199SMark Brown case WM8904_CLK_FLL: 949*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 950*a91eb199SMark Brown WM8904_FLL_OSC_ENA, 951*a91eb199SMark Brown WM8904_FLL_OSC_ENA); 952*a91eb199SMark Brown 953*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 954*a91eb199SMark Brown WM8904_FLL_ENA, 955*a91eb199SMark Brown WM8904_FLL_ENA); 956*a91eb199SMark Brown break; 957*a91eb199SMark Brown 958*a91eb199SMark Brown default: 959*a91eb199SMark Brown break; 960*a91eb199SMark Brown } 961*a91eb199SMark Brown break; 962*a91eb199SMark Brown 963*a91eb199SMark Brown case SND_SOC_DAPM_POST_PMD: 964*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 965*a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 966*a91eb199SMark Brown break; 967*a91eb199SMark Brown } 968*a91eb199SMark Brown 969*a91eb199SMark Brown return 0; 970*a91eb199SMark Brown } 971*a91eb199SMark Brown 972*a91eb199SMark Brown static int out_pga_event(struct snd_soc_dapm_widget *w, 973*a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 974*a91eb199SMark Brown { 975*a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 976*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 977*a91eb199SMark Brown int reg, val; 978*a91eb199SMark Brown int dcs_mask; 979*a91eb199SMark Brown int dcs_l, dcs_r; 980*a91eb199SMark Brown int dcs_l_reg, dcs_r_reg; 981*a91eb199SMark Brown int timeout; 982*a91eb199SMark Brown 983*a91eb199SMark Brown /* This code is shared between HP and LINEOUT; we do all our 984*a91eb199SMark Brown * power management in stereo pairs to avoid latency issues so 985*a91eb199SMark Brown * we reuse shift to identify which rather than strcmp() the 986*a91eb199SMark Brown * name. */ 987*a91eb199SMark Brown reg = w->shift; 988*a91eb199SMark Brown 989*a91eb199SMark Brown switch (reg) { 990*a91eb199SMark Brown case WM8904_ANALOGUE_HP_0: 991*a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; 992*a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_8; 993*a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_9; 994*a91eb199SMark Brown dcs_l = 0; 995*a91eb199SMark Brown dcs_r = 1; 996*a91eb199SMark Brown break; 997*a91eb199SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 998*a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; 999*a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_6; 1000*a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_7; 1001*a91eb199SMark Brown dcs_l = 2; 1002*a91eb199SMark Brown dcs_r = 3; 1003*a91eb199SMark Brown break; 1004*a91eb199SMark Brown default: 1005*a91eb199SMark Brown BUG(); 1006*a91eb199SMark Brown return -EINVAL; 1007*a91eb199SMark Brown } 1008*a91eb199SMark Brown 1009*a91eb199SMark Brown switch (event) { 1010*a91eb199SMark Brown case SND_SOC_DAPM_POST_PMU: 1011*a91eb199SMark Brown /* Power on the amplifier */ 1012*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1013*a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA, 1014*a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA); 1015*a91eb199SMark Brown 1016*a91eb199SMark Brown /* Enable the first stage */ 1017*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1018*a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY, 1019*a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY); 1020*a91eb199SMark Brown 1021*a91eb199SMark Brown /* Power up the DC servo */ 1022*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 1023*a91eb199SMark Brown dcs_mask, dcs_mask); 1024*a91eb199SMark Brown 1025*a91eb199SMark Brown /* Either calibrate the DC servo or restore cached state 1026*a91eb199SMark Brown * if we have that. 1027*a91eb199SMark Brown */ 1028*a91eb199SMark Brown if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) { 1029*a91eb199SMark Brown dev_dbg(codec->dev, "Restoring DC servo state\n"); 1030*a91eb199SMark Brown 1031*a91eb199SMark Brown snd_soc_write(codec, dcs_l_reg, 1032*a91eb199SMark Brown wm8904->dcs_state[dcs_l]); 1033*a91eb199SMark Brown snd_soc_write(codec, dcs_r_reg, 1034*a91eb199SMark Brown wm8904->dcs_state[dcs_r]); 1035*a91eb199SMark Brown 1036*a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask); 1037*a91eb199SMark Brown 1038*a91eb199SMark Brown timeout = 20; 1039*a91eb199SMark Brown } else { 1040*a91eb199SMark Brown dev_dbg(codec->dev, "Calibrating DC servo\n"); 1041*a91eb199SMark Brown 1042*a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, 1043*a91eb199SMark Brown dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT); 1044*a91eb199SMark Brown 1045*a91eb199SMark Brown timeout = 500; 1046*a91eb199SMark Brown } 1047*a91eb199SMark Brown 1048*a91eb199SMark Brown /* Wait for DC servo to complete */ 1049*a91eb199SMark Brown dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; 1050*a91eb199SMark Brown do { 1051*a91eb199SMark Brown val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0); 1052*a91eb199SMark Brown if ((val & dcs_mask) == dcs_mask) 1053*a91eb199SMark Brown break; 1054*a91eb199SMark Brown 1055*a91eb199SMark Brown msleep(1); 1056*a91eb199SMark Brown } while (--timeout); 1057*a91eb199SMark Brown 1058*a91eb199SMark Brown if ((val & dcs_mask) != dcs_mask) 1059*a91eb199SMark Brown dev_warn(codec->dev, "DC servo timed out\n"); 1060*a91eb199SMark Brown else 1061*a91eb199SMark Brown dev_dbg(codec->dev, "DC servo ready\n"); 1062*a91eb199SMark Brown 1063*a91eb199SMark Brown /* Enable the output stage */ 1064*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1065*a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 1066*a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); 1067*a91eb199SMark Brown 1068*a91eb199SMark Brown /* Unshort the output itself */ 1069*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1070*a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1071*a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 1072*a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1073*a91eb199SMark Brown WM8904_HPR_RMV_SHORT); 1074*a91eb199SMark Brown 1075*a91eb199SMark Brown break; 1076*a91eb199SMark Brown 1077*a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMD: 1078*a91eb199SMark Brown /* Short the output */ 1079*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1080*a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 1081*a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 0); 1082*a91eb199SMark Brown 1083*a91eb199SMark Brown /* Cache the DC servo configuration; this will be 1084*a91eb199SMark Brown * invalidated if we change the configuration. */ 1085*a91eb199SMark Brown wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg); 1086*a91eb199SMark Brown wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg); 1087*a91eb199SMark Brown 1088*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 1089*a91eb199SMark Brown dcs_mask, 0); 1090*a91eb199SMark Brown 1091*a91eb199SMark Brown /* Disable the amplifier input and output stages */ 1092*a91eb199SMark Brown snd_soc_update_bits(codec, reg, 1093*a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA | 1094*a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY | 1095*a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 1096*a91eb199SMark Brown 0); 1097*a91eb199SMark Brown break; 1098*a91eb199SMark Brown } 1099*a91eb199SMark Brown 1100*a91eb199SMark Brown return 0; 1101*a91eb199SMark Brown } 1102*a91eb199SMark Brown 1103*a91eb199SMark Brown static const char *lin_text[] = { 1104*a91eb199SMark Brown "IN1L", "IN2L", "IN3L" 1105*a91eb199SMark Brown }; 1106*a91eb199SMark Brown 1107*a91eb199SMark Brown static const struct soc_enum lin_enum = 1108*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 2, 3, lin_text); 1109*a91eb199SMark Brown 1110*a91eb199SMark Brown static const struct snd_kcontrol_new lin_mux = 1111*a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Mux", lin_enum); 1112*a91eb199SMark Brown 1113*a91eb199SMark Brown static const struct soc_enum lin_inv_enum = 1114*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 4, 3, lin_text); 1115*a91eb199SMark Brown 1116*a91eb199SMark Brown static const struct snd_kcontrol_new lin_inv_mux = 1117*a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); 1118*a91eb199SMark Brown 1119*a91eb199SMark Brown static const char *rin_text[] = { 1120*a91eb199SMark Brown "IN1R", "IN2R", "IN3R" 1121*a91eb199SMark Brown }; 1122*a91eb199SMark Brown 1123*a91eb199SMark Brown static const struct soc_enum rin_enum = 1124*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 2, 3, rin_text); 1125*a91eb199SMark Brown 1126*a91eb199SMark Brown static const struct snd_kcontrol_new rin_mux = 1127*a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Mux", rin_enum); 1128*a91eb199SMark Brown 1129*a91eb199SMark Brown static const struct soc_enum rin_inv_enum = 1130*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 4, 3, rin_text); 1131*a91eb199SMark Brown 1132*a91eb199SMark Brown static const struct snd_kcontrol_new rin_inv_mux = 1133*a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); 1134*a91eb199SMark Brown 1135*a91eb199SMark Brown static const char *aif_text[] = { 1136*a91eb199SMark Brown "Left", "Right" 1137*a91eb199SMark Brown }; 1138*a91eb199SMark Brown 1139*a91eb199SMark Brown static const struct soc_enum aifoutl_enum = 1140*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 7, 2, aif_text); 1141*a91eb199SMark Brown 1142*a91eb199SMark Brown static const struct snd_kcontrol_new aifoutl_mux = 1143*a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum); 1144*a91eb199SMark Brown 1145*a91eb199SMark Brown static const struct soc_enum aifoutr_enum = 1146*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 6, 2, aif_text); 1147*a91eb199SMark Brown 1148*a91eb199SMark Brown static const struct snd_kcontrol_new aifoutr_mux = 1149*a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum); 1150*a91eb199SMark Brown 1151*a91eb199SMark Brown static const struct soc_enum aifinl_enum = 1152*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 5, 2, aif_text); 1153*a91eb199SMark Brown 1154*a91eb199SMark Brown static const struct snd_kcontrol_new aifinl_mux = 1155*a91eb199SMark Brown SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum); 1156*a91eb199SMark Brown 1157*a91eb199SMark Brown static const struct soc_enum aifinr_enum = 1158*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 4, 2, aif_text); 1159*a91eb199SMark Brown 1160*a91eb199SMark Brown static const struct snd_kcontrol_new aifinr_mux = 1161*a91eb199SMark Brown SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum); 1162*a91eb199SMark Brown 1163*a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_core_dapm_widgets[] = { 1164*a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("SYSCLK", WM8904_CLOCK_RATES_2, 2, 0, sysclk_event, 1165*a91eb199SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1166*a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8904_CLOCK_RATES_2, 1, 0, NULL, 0), 1167*a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("TOCLK", WM8904_CLOCK_RATES_2, 0, 0, NULL, 0), 1168*a91eb199SMark Brown }; 1169*a91eb199SMark Brown 1170*a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_adc_dapm_widgets[] = { 1171*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1L"), 1172*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1R"), 1173*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2L"), 1174*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2R"), 1175*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3L"), 1176*a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3R"), 1177*a91eb199SMark Brown 1178*a91eb199SMark Brown SND_SOC_DAPM_MICBIAS("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0), 1179*a91eb199SMark Brown 1180*a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), 1181*a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 1182*a91eb199SMark Brown &lin_inv_mux), 1183*a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), 1184*a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 1185*a91eb199SMark Brown &rin_inv_mux), 1186*a91eb199SMark Brown 1187*a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, 1188*a91eb199SMark Brown NULL, 0), 1189*a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Capture PGA", WM8904_POWER_MANAGEMENT_0, 0, 0, 1190*a91eb199SMark Brown NULL, 0), 1191*a91eb199SMark Brown 1192*a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8904_POWER_MANAGEMENT_6, 1, 0), 1193*a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8904_POWER_MANAGEMENT_6, 0, 0), 1194*a91eb199SMark Brown 1195*a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux), 1196*a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux), 1197*a91eb199SMark Brown 1198*a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 1199*a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 1200*a91eb199SMark Brown }; 1201*a91eb199SMark Brown 1202*a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dac_dapm_widgets[] = { 1203*a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 1204*a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 1205*a91eb199SMark Brown 1206*a91eb199SMark Brown SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux), 1207*a91eb199SMark Brown SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux), 1208*a91eb199SMark Brown 1209*a91eb199SMark Brown SND_SOC_DAPM_DAC("DACL", NULL, WM8904_POWER_MANAGEMENT_6, 3, 0), 1210*a91eb199SMark Brown SND_SOC_DAPM_DAC("DACR", NULL, WM8904_POWER_MANAGEMENT_6, 2, 0), 1211*a91eb199SMark Brown 1212*a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Charge pump", WM8904_CHARGE_PUMP_0, 0, 0, cp_event, 1213*a91eb199SMark Brown SND_SOC_DAPM_POST_PMU), 1214*a91eb199SMark Brown 1215*a91eb199SMark Brown SND_SOC_DAPM_PGA("HPL PGA", WM8904_POWER_MANAGEMENT_2, 1, 0, NULL, 0), 1216*a91eb199SMark Brown SND_SOC_DAPM_PGA("HPR PGA", WM8904_POWER_MANAGEMENT_2, 0, 0, NULL, 0), 1217*a91eb199SMark Brown 1218*a91eb199SMark Brown SND_SOC_DAPM_PGA("LINEL PGA", WM8904_POWER_MANAGEMENT_3, 1, 0, NULL, 0), 1219*a91eb199SMark Brown SND_SOC_DAPM_PGA("LINER PGA", WM8904_POWER_MANAGEMENT_3, 0, 0, NULL, 0), 1220*a91eb199SMark Brown 1221*a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Headphone Output", SND_SOC_NOPM, WM8904_ANALOGUE_HP_0, 1222*a91eb199SMark Brown 0, NULL, 0, out_pga_event, 1223*a91eb199SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1224*a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Line Output", SND_SOC_NOPM, WM8904_ANALOGUE_LINEOUT_0, 1225*a91eb199SMark Brown 0, NULL, 0, out_pga_event, 1226*a91eb199SMark Brown SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 1227*a91eb199SMark Brown 1228*a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTL"), 1229*a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTR"), 1230*a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTL"), 1231*a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTR"), 1232*a91eb199SMark Brown }; 1233*a91eb199SMark Brown 1234*a91eb199SMark Brown static const char *out_mux_text[] = { 1235*a91eb199SMark Brown "DAC", "Bypass" 1236*a91eb199SMark Brown }; 1237*a91eb199SMark Brown 1238*a91eb199SMark Brown static const struct soc_enum hpl_enum = 1239*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 3, 2, out_mux_text); 1240*a91eb199SMark Brown 1241*a91eb199SMark Brown static const struct snd_kcontrol_new hpl_mux = 1242*a91eb199SMark Brown SOC_DAPM_ENUM("HPL Mux", hpl_enum); 1243*a91eb199SMark Brown 1244*a91eb199SMark Brown static const struct soc_enum hpr_enum = 1245*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 2, 2, out_mux_text); 1246*a91eb199SMark Brown 1247*a91eb199SMark Brown static const struct snd_kcontrol_new hpr_mux = 1248*a91eb199SMark Brown SOC_DAPM_ENUM("HPR Mux", hpr_enum); 1249*a91eb199SMark Brown 1250*a91eb199SMark Brown static const struct soc_enum linel_enum = 1251*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 1, 2, out_mux_text); 1252*a91eb199SMark Brown 1253*a91eb199SMark Brown static const struct snd_kcontrol_new linel_mux = 1254*a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", linel_enum); 1255*a91eb199SMark Brown 1256*a91eb199SMark Brown static const struct soc_enum liner_enum = 1257*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 0, 2, out_mux_text); 1258*a91eb199SMark Brown 1259*a91eb199SMark Brown static const struct snd_kcontrol_new liner_mux = 1260*a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", liner_enum); 1261*a91eb199SMark Brown 1262*a91eb199SMark Brown static const char *sidetone_text[] = { 1263*a91eb199SMark Brown "None", "Left", "Right" 1264*a91eb199SMark Brown }; 1265*a91eb199SMark Brown 1266*a91eb199SMark Brown static const struct soc_enum dacl_sidetone_enum = 1267*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 2, 3, sidetone_text); 1268*a91eb199SMark Brown 1269*a91eb199SMark Brown static const struct snd_kcontrol_new dacl_sidetone_mux = 1270*a91eb199SMark Brown SOC_DAPM_ENUM("Left Sidetone Mux", dacl_sidetone_enum); 1271*a91eb199SMark Brown 1272*a91eb199SMark Brown static const struct soc_enum dacr_sidetone_enum = 1273*a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 0, 3, sidetone_text); 1274*a91eb199SMark Brown 1275*a91eb199SMark Brown static const struct snd_kcontrol_new dacr_sidetone_mux = 1276*a91eb199SMark Brown SOC_DAPM_ENUM("Right Sidetone Mux", dacr_sidetone_enum); 1277*a91eb199SMark Brown 1278*a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dapm_widgets[] = { 1279*a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Class G", WM8904_CLASS_W_0, 0, 1, NULL, 0), 1280*a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1281*a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1282*a91eb199SMark Brown 1283*a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &dacl_sidetone_mux), 1284*a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &dacr_sidetone_mux), 1285*a91eb199SMark Brown 1286*a91eb199SMark Brown SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1287*a91eb199SMark Brown SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), 1288*a91eb199SMark Brown SND_SOC_DAPM_MUX("LINEL Mux", SND_SOC_NOPM, 0, 0, &linel_mux), 1289*a91eb199SMark Brown SND_SOC_DAPM_MUX("LINER Mux", SND_SOC_NOPM, 0, 0, &liner_mux), 1290*a91eb199SMark Brown }; 1291*a91eb199SMark Brown 1292*a91eb199SMark Brown static const struct snd_soc_dapm_route core_intercon[] = { 1293*a91eb199SMark Brown { "CLK_DSP", NULL, "SYSCLK" }, 1294*a91eb199SMark Brown { "TOCLK", NULL, "SYSCLK" }, 1295*a91eb199SMark Brown }; 1296*a91eb199SMark Brown 1297*a91eb199SMark Brown static const struct snd_soc_dapm_route adc_intercon[] = { 1298*a91eb199SMark Brown { "Left Capture Mux", "IN1L", "IN1L" }, 1299*a91eb199SMark Brown { "Left Capture Mux", "IN2L", "IN2L" }, 1300*a91eb199SMark Brown { "Left Capture Mux", "IN3L", "IN3L" }, 1301*a91eb199SMark Brown 1302*a91eb199SMark Brown { "Left Capture Inverting Mux", "IN1L", "IN1L" }, 1303*a91eb199SMark Brown { "Left Capture Inverting Mux", "IN2L", "IN2L" }, 1304*a91eb199SMark Brown { "Left Capture Inverting Mux", "IN3L", "IN3L" }, 1305*a91eb199SMark Brown 1306*a91eb199SMark Brown { "Right Capture Mux", "IN1R", "IN1R" }, 1307*a91eb199SMark Brown { "Right Capture Mux", "IN2R", "IN2R" }, 1308*a91eb199SMark Brown { "Right Capture Mux", "IN3R", "IN3R" }, 1309*a91eb199SMark Brown 1310*a91eb199SMark Brown { "Right Capture Inverting Mux", "IN1R", "IN1R" }, 1311*a91eb199SMark Brown { "Right Capture Inverting Mux", "IN2R", "IN2R" }, 1312*a91eb199SMark Brown { "Right Capture Inverting Mux", "IN3R", "IN3R" }, 1313*a91eb199SMark Brown 1314*a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Mux" }, 1315*a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, 1316*a91eb199SMark Brown 1317*a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Mux" }, 1318*a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, 1319*a91eb199SMark Brown 1320*a91eb199SMark Brown { "AIFOUTL", "Left", "ADCL" }, 1321*a91eb199SMark Brown { "AIFOUTL", "Right", "ADCR" }, 1322*a91eb199SMark Brown { "AIFOUTR", "Left", "ADCL" }, 1323*a91eb199SMark Brown { "AIFOUTR", "Right", "ADCR" }, 1324*a91eb199SMark Brown 1325*a91eb199SMark Brown { "ADCL", NULL, "CLK_DSP" }, 1326*a91eb199SMark Brown { "ADCL", NULL, "Left Capture PGA" }, 1327*a91eb199SMark Brown 1328*a91eb199SMark Brown { "ADCR", NULL, "CLK_DSP" }, 1329*a91eb199SMark Brown { "ADCR", NULL, "Right Capture PGA" }, 1330*a91eb199SMark Brown }; 1331*a91eb199SMark Brown 1332*a91eb199SMark Brown static const struct snd_soc_dapm_route dac_intercon[] = { 1333*a91eb199SMark Brown { "DACL", "Right", "AIFINR" }, 1334*a91eb199SMark Brown { "DACL", "Left", "AIFINL" }, 1335*a91eb199SMark Brown { "DACL", NULL, "CLK_DSP" }, 1336*a91eb199SMark Brown 1337*a91eb199SMark Brown { "DACR", "Right", "AIFINR" }, 1338*a91eb199SMark Brown { "DACR", "Left", "AIFINL" }, 1339*a91eb199SMark Brown { "DACR", NULL, "CLK_DSP" }, 1340*a91eb199SMark Brown 1341*a91eb199SMark Brown { "Charge pump", NULL, "SYSCLK" }, 1342*a91eb199SMark Brown 1343*a91eb199SMark Brown { "Headphone Output", NULL, "HPL PGA" }, 1344*a91eb199SMark Brown { "Headphone Output", NULL, "HPR PGA" }, 1345*a91eb199SMark Brown { "Headphone Output", NULL, "Charge pump" }, 1346*a91eb199SMark Brown { "Headphone Output", NULL, "TOCLK" }, 1347*a91eb199SMark Brown 1348*a91eb199SMark Brown { "Line Output", NULL, "LINEL PGA" }, 1349*a91eb199SMark Brown { "Line Output", NULL, "LINER PGA" }, 1350*a91eb199SMark Brown { "Line Output", NULL, "Charge pump" }, 1351*a91eb199SMark Brown { "Line Output", NULL, "TOCLK" }, 1352*a91eb199SMark Brown 1353*a91eb199SMark Brown { "HPOUTL", NULL, "Headphone Output" }, 1354*a91eb199SMark Brown { "HPOUTR", NULL, "Headphone Output" }, 1355*a91eb199SMark Brown 1356*a91eb199SMark Brown { "LINEOUTL", NULL, "Line Output" }, 1357*a91eb199SMark Brown { "LINEOUTR", NULL, "Line Output" }, 1358*a91eb199SMark Brown }; 1359*a91eb199SMark Brown 1360*a91eb199SMark Brown static const struct snd_soc_dapm_route wm8904_intercon[] = { 1361*a91eb199SMark Brown { "Left Sidetone", "Left", "ADCL" }, 1362*a91eb199SMark Brown { "Left Sidetone", "Right", "ADCR" }, 1363*a91eb199SMark Brown { "DACL", NULL, "Left Sidetone" }, 1364*a91eb199SMark Brown 1365*a91eb199SMark Brown { "Right Sidetone", "Left", "ADCL" }, 1366*a91eb199SMark Brown { "Right Sidetone", "Right", "ADCR" }, 1367*a91eb199SMark Brown { "DACR", NULL, "Right Sidetone" }, 1368*a91eb199SMark Brown 1369*a91eb199SMark Brown { "Left Bypass", NULL, "Class G" }, 1370*a91eb199SMark Brown { "Left Bypass", NULL, "Left Capture PGA" }, 1371*a91eb199SMark Brown 1372*a91eb199SMark Brown { "Right Bypass", NULL, "Class G" }, 1373*a91eb199SMark Brown { "Right Bypass", NULL, "Right Capture PGA" }, 1374*a91eb199SMark Brown 1375*a91eb199SMark Brown { "HPL Mux", "DAC", "DACL" }, 1376*a91eb199SMark Brown { "HPL Mux", "Bypass", "Left Bypass" }, 1377*a91eb199SMark Brown 1378*a91eb199SMark Brown { "HPR Mux", "DAC", "DACR" }, 1379*a91eb199SMark Brown { "HPR Mux", "Bypass", "Right Bypass" }, 1380*a91eb199SMark Brown 1381*a91eb199SMark Brown { "LINEL Mux", "DAC", "DACL" }, 1382*a91eb199SMark Brown { "LINEL Mux", "Bypass", "Left Bypass" }, 1383*a91eb199SMark Brown 1384*a91eb199SMark Brown { "LINER Mux", "DAC", "DACR" }, 1385*a91eb199SMark Brown { "LINER Mux", "Bypass", "Right Bypass" }, 1386*a91eb199SMark Brown 1387*a91eb199SMark Brown { "HPL PGA", NULL, "HPL Mux" }, 1388*a91eb199SMark Brown { "HPR PGA", NULL, "HPR Mux" }, 1389*a91eb199SMark Brown 1390*a91eb199SMark Brown { "LINEL PGA", NULL, "LINEL Mux" }, 1391*a91eb199SMark Brown { "LINER PGA", NULL, "LINER Mux" }, 1392*a91eb199SMark Brown }; 1393*a91eb199SMark Brown 1394*a91eb199SMark Brown static int wm8904_add_widgets(struct snd_soc_codec *codec) 1395*a91eb199SMark Brown { 1396*a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_adc_snd_controls, 1397*a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_snd_controls)); 1398*a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_dac_snd_controls, 1399*a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 1400*a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_snd_controls, 1401*a91eb199SMark Brown ARRAY_SIZE(wm8904_snd_controls)); 1402*a91eb199SMark Brown 1403*a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_core_dapm_widgets, 1404*a91eb199SMark Brown ARRAY_SIZE(wm8904_core_dapm_widgets)); 1405*a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_adc_dapm_widgets, 1406*a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_dapm_widgets)); 1407*a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_dac_dapm_widgets, 1408*a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 1409*a91eb199SMark Brown snd_soc_dapm_new_controls(codec, wm8904_dapm_widgets, 1410*a91eb199SMark Brown ARRAY_SIZE(wm8904_dapm_widgets)); 1411*a91eb199SMark Brown 1412*a91eb199SMark Brown snd_soc_dapm_add_routes(codec, core_intercon, 1413*a91eb199SMark Brown ARRAY_SIZE(core_intercon)); 1414*a91eb199SMark Brown snd_soc_dapm_add_routes(codec, adc_intercon, ARRAY_SIZE(adc_intercon)); 1415*a91eb199SMark Brown snd_soc_dapm_add_routes(codec, dac_intercon, ARRAY_SIZE(dac_intercon)); 1416*a91eb199SMark Brown snd_soc_dapm_add_routes(codec, wm8904_intercon, 1417*a91eb199SMark Brown ARRAY_SIZE(wm8904_intercon)); 1418*a91eb199SMark Brown 1419*a91eb199SMark Brown snd_soc_dapm_new_widgets(codec); 1420*a91eb199SMark Brown return 0; 1421*a91eb199SMark Brown } 1422*a91eb199SMark Brown 1423*a91eb199SMark Brown static struct { 1424*a91eb199SMark Brown int ratio; 1425*a91eb199SMark Brown unsigned int clk_sys_rate; 1426*a91eb199SMark Brown } clk_sys_rates[] = { 1427*a91eb199SMark Brown { 64, 0 }, 1428*a91eb199SMark Brown { 128, 1 }, 1429*a91eb199SMark Brown { 192, 2 }, 1430*a91eb199SMark Brown { 256, 3 }, 1431*a91eb199SMark Brown { 384, 4 }, 1432*a91eb199SMark Brown { 512, 5 }, 1433*a91eb199SMark Brown { 786, 6 }, 1434*a91eb199SMark Brown { 1024, 7 }, 1435*a91eb199SMark Brown { 1408, 8 }, 1436*a91eb199SMark Brown { 1536, 9 }, 1437*a91eb199SMark Brown }; 1438*a91eb199SMark Brown 1439*a91eb199SMark Brown static struct { 1440*a91eb199SMark Brown int rate; 1441*a91eb199SMark Brown int sample_rate; 1442*a91eb199SMark Brown } sample_rates[] = { 1443*a91eb199SMark Brown { 8000, 0 }, 1444*a91eb199SMark Brown { 11025, 1 }, 1445*a91eb199SMark Brown { 12000, 1 }, 1446*a91eb199SMark Brown { 16000, 2 }, 1447*a91eb199SMark Brown { 22050, 3 }, 1448*a91eb199SMark Brown { 24000, 3 }, 1449*a91eb199SMark Brown { 32000, 4 }, 1450*a91eb199SMark Brown { 44100, 5 }, 1451*a91eb199SMark Brown { 48000, 5 }, 1452*a91eb199SMark Brown }; 1453*a91eb199SMark Brown 1454*a91eb199SMark Brown static struct { 1455*a91eb199SMark Brown int div; /* *10 due to .5s */ 1456*a91eb199SMark Brown int bclk_div; 1457*a91eb199SMark Brown } bclk_divs[] = { 1458*a91eb199SMark Brown { 10, 0 }, 1459*a91eb199SMark Brown { 15, 1 }, 1460*a91eb199SMark Brown { 20, 2 }, 1461*a91eb199SMark Brown { 30, 3 }, 1462*a91eb199SMark Brown { 40, 4 }, 1463*a91eb199SMark Brown { 50, 5 }, 1464*a91eb199SMark Brown { 55, 6 }, 1465*a91eb199SMark Brown { 60, 7 }, 1466*a91eb199SMark Brown { 80, 8 }, 1467*a91eb199SMark Brown { 100, 9 }, 1468*a91eb199SMark Brown { 110, 10 }, 1469*a91eb199SMark Brown { 120, 11 }, 1470*a91eb199SMark Brown { 160, 12 }, 1471*a91eb199SMark Brown { 200, 13 }, 1472*a91eb199SMark Brown { 220, 14 }, 1473*a91eb199SMark Brown { 240, 16 }, 1474*a91eb199SMark Brown { 200, 17 }, 1475*a91eb199SMark Brown { 320, 18 }, 1476*a91eb199SMark Brown { 440, 19 }, 1477*a91eb199SMark Brown { 480, 20 }, 1478*a91eb199SMark Brown }; 1479*a91eb199SMark Brown 1480*a91eb199SMark Brown 1481*a91eb199SMark Brown static int wm8904_hw_params(struct snd_pcm_substream *substream, 1482*a91eb199SMark Brown struct snd_pcm_hw_params *params, 1483*a91eb199SMark Brown struct snd_soc_dai *dai) 1484*a91eb199SMark Brown { 1485*a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1486*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 1487*a91eb199SMark Brown int ret, i, best, best_val, cur_val; 1488*a91eb199SMark Brown unsigned int aif1 = 0; 1489*a91eb199SMark Brown unsigned int aif2 = 0; 1490*a91eb199SMark Brown unsigned int aif3 = 0; 1491*a91eb199SMark Brown unsigned int clock1 = 0; 1492*a91eb199SMark Brown unsigned int dac_digital1 = 0; 1493*a91eb199SMark Brown 1494*a91eb199SMark Brown /* What BCLK do we need? */ 1495*a91eb199SMark Brown wm8904->fs = params_rate(params); 1496*a91eb199SMark Brown if (wm8904->tdm_slots) { 1497*a91eb199SMark Brown dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n", 1498*a91eb199SMark Brown wm8904->tdm_slots, wm8904->tdm_width); 1499*a91eb199SMark Brown wm8904->bclk = snd_soc_calc_bclk(wm8904->fs, 1500*a91eb199SMark Brown wm8904->tdm_width, 2, 1501*a91eb199SMark Brown wm8904->tdm_slots); 1502*a91eb199SMark Brown } else { 1503*a91eb199SMark Brown wm8904->bclk = snd_soc_params_to_bclk(params); 1504*a91eb199SMark Brown } 1505*a91eb199SMark Brown 1506*a91eb199SMark Brown dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk); 1507*a91eb199SMark Brown 1508*a91eb199SMark Brown ret = wm8904_configure_clocking(codec); 1509*a91eb199SMark Brown if (ret != 0) 1510*a91eb199SMark Brown return ret; 1511*a91eb199SMark Brown 1512*a91eb199SMark Brown /* Select nearest CLK_SYS_RATE */ 1513*a91eb199SMark Brown best = 0; 1514*a91eb199SMark Brown best_val = abs((wm8904->sysclk_rate / clk_sys_rates[0].ratio) 1515*a91eb199SMark Brown - wm8904->fs); 1516*a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { 1517*a91eb199SMark Brown cur_val = abs((wm8904->sysclk_rate / 1518*a91eb199SMark Brown clk_sys_rates[i].ratio) - wm8904->fs);; 1519*a91eb199SMark Brown if (cur_val < best_val) { 1520*a91eb199SMark Brown best = i; 1521*a91eb199SMark Brown best_val = cur_val; 1522*a91eb199SMark Brown } 1523*a91eb199SMark Brown } 1524*a91eb199SMark Brown dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1525*a91eb199SMark Brown clk_sys_rates[best].ratio); 1526*a91eb199SMark Brown clock1 |= (clk_sys_rates[best].clk_sys_rate 1527*a91eb199SMark Brown << WM8904_CLK_SYS_RATE_SHIFT); 1528*a91eb199SMark Brown 1529*a91eb199SMark Brown /* SAMPLE_RATE */ 1530*a91eb199SMark Brown best = 0; 1531*a91eb199SMark Brown best_val = abs(wm8904->fs - sample_rates[0].rate); 1532*a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 1533*a91eb199SMark Brown /* Closest match */ 1534*a91eb199SMark Brown cur_val = abs(wm8904->fs - sample_rates[i].rate); 1535*a91eb199SMark Brown if (cur_val < best_val) { 1536*a91eb199SMark Brown best = i; 1537*a91eb199SMark Brown best_val = cur_val; 1538*a91eb199SMark Brown } 1539*a91eb199SMark Brown } 1540*a91eb199SMark Brown dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1541*a91eb199SMark Brown sample_rates[best].rate); 1542*a91eb199SMark Brown clock1 |= (sample_rates[best].sample_rate 1543*a91eb199SMark Brown << WM8904_SAMPLE_RATE_SHIFT); 1544*a91eb199SMark Brown 1545*a91eb199SMark Brown /* Enable sloping stopband filter for low sample rates */ 1546*a91eb199SMark Brown if (wm8904->fs <= 24000) 1547*a91eb199SMark Brown dac_digital1 |= WM8904_DAC_SB_FILT; 1548*a91eb199SMark Brown 1549*a91eb199SMark Brown /* BCLK_DIV */ 1550*a91eb199SMark Brown best = 0; 1551*a91eb199SMark Brown best_val = INT_MAX; 1552*a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1553*a91eb199SMark Brown cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) 1554*a91eb199SMark Brown - wm8904->bclk; 1555*a91eb199SMark Brown if (cur_val < 0) /* Table is sorted */ 1556*a91eb199SMark Brown break; 1557*a91eb199SMark Brown if (cur_val < best_val) { 1558*a91eb199SMark Brown best = i; 1559*a91eb199SMark Brown best_val = cur_val; 1560*a91eb199SMark Brown } 1561*a91eb199SMark Brown } 1562*a91eb199SMark Brown wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; 1563*a91eb199SMark Brown dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1564*a91eb199SMark Brown bclk_divs[best].div, wm8904->bclk); 1565*a91eb199SMark Brown aif2 |= bclk_divs[best].bclk_div; 1566*a91eb199SMark Brown 1567*a91eb199SMark Brown /* LRCLK is a simple fraction of BCLK */ 1568*a91eb199SMark Brown dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs); 1569*a91eb199SMark Brown aif3 |= wm8904->bclk / wm8904->fs; 1570*a91eb199SMark Brown 1571*a91eb199SMark Brown /* Apply the settings */ 1572*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 1573*a91eb199SMark Brown WM8904_DAC_SB_FILT, dac_digital1); 1574*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1575*a91eb199SMark Brown WM8904_AIF_WL_MASK, aif1); 1576*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2, 1577*a91eb199SMark Brown WM8904_BCLK_DIV_MASK, aif2); 1578*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1579*a91eb199SMark Brown WM8904_LRCLK_RATE_MASK, aif3); 1580*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1, 1581*a91eb199SMark Brown WM8904_SAMPLE_RATE_MASK | 1582*a91eb199SMark Brown WM8904_CLK_SYS_RATE_MASK, clock1); 1583*a91eb199SMark Brown 1584*a91eb199SMark Brown /* Update filters for the new settings */ 1585*a91eb199SMark Brown wm8904_set_retune_mobile(codec); 1586*a91eb199SMark Brown wm8904_set_deemph(codec); 1587*a91eb199SMark Brown 1588*a91eb199SMark Brown return 0; 1589*a91eb199SMark Brown } 1590*a91eb199SMark Brown 1591*a91eb199SMark Brown 1592*a91eb199SMark Brown static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, 1593*a91eb199SMark Brown unsigned int freq, int dir) 1594*a91eb199SMark Brown { 1595*a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1596*a91eb199SMark Brown struct wm8904_priv *priv = codec->private_data; 1597*a91eb199SMark Brown 1598*a91eb199SMark Brown switch (clk_id) { 1599*a91eb199SMark Brown case WM8904_CLK_MCLK: 1600*a91eb199SMark Brown priv->sysclk_src = clk_id; 1601*a91eb199SMark Brown priv->mclk_rate = freq; 1602*a91eb199SMark Brown break; 1603*a91eb199SMark Brown 1604*a91eb199SMark Brown case WM8904_CLK_FLL: 1605*a91eb199SMark Brown priv->sysclk_src = clk_id; 1606*a91eb199SMark Brown break; 1607*a91eb199SMark Brown 1608*a91eb199SMark Brown default: 1609*a91eb199SMark Brown return -EINVAL; 1610*a91eb199SMark Brown } 1611*a91eb199SMark Brown 1612*a91eb199SMark Brown dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); 1613*a91eb199SMark Brown 1614*a91eb199SMark Brown wm8904_configure_clocking(codec); 1615*a91eb199SMark Brown 1616*a91eb199SMark Brown return 0; 1617*a91eb199SMark Brown } 1618*a91eb199SMark Brown 1619*a91eb199SMark Brown static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1620*a91eb199SMark Brown { 1621*a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1622*a91eb199SMark Brown unsigned int aif1 = 0; 1623*a91eb199SMark Brown unsigned int aif3 = 0; 1624*a91eb199SMark Brown 1625*a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1626*a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1627*a91eb199SMark Brown break; 1628*a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1629*a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1630*a91eb199SMark Brown break; 1631*a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1632*a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1633*a91eb199SMark Brown break; 1634*a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1635*a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1636*a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1637*a91eb199SMark Brown break; 1638*a91eb199SMark Brown default: 1639*a91eb199SMark Brown return -EINVAL; 1640*a91eb199SMark Brown } 1641*a91eb199SMark Brown 1642*a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1643*a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1644*a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1645*a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1646*a91eb199SMark Brown aif1 |= 0x3; 1647*a91eb199SMark Brown break; 1648*a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1649*a91eb199SMark Brown aif1 |= 0x2; 1650*a91eb199SMark Brown break; 1651*a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1652*a91eb199SMark Brown break; 1653*a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1654*a91eb199SMark Brown aif1 |= 0x1; 1655*a91eb199SMark Brown break; 1656*a91eb199SMark Brown default: 1657*a91eb199SMark Brown return -EINVAL; 1658*a91eb199SMark Brown } 1659*a91eb199SMark Brown 1660*a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1661*a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1662*a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1663*a91eb199SMark Brown /* frame inversion not valid for DSP modes */ 1664*a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1665*a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1666*a91eb199SMark Brown break; 1667*a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1668*a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1669*a91eb199SMark Brown break; 1670*a91eb199SMark Brown default: 1671*a91eb199SMark Brown return -EINVAL; 1672*a91eb199SMark Brown } 1673*a91eb199SMark Brown break; 1674*a91eb199SMark Brown 1675*a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1676*a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1677*a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1678*a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1679*a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1680*a91eb199SMark Brown break; 1681*a91eb199SMark Brown case SND_SOC_DAIFMT_IB_IF: 1682*a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV; 1683*a91eb199SMark Brown break; 1684*a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1685*a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1686*a91eb199SMark Brown break; 1687*a91eb199SMark Brown case SND_SOC_DAIFMT_NB_IF: 1688*a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1689*a91eb199SMark Brown break; 1690*a91eb199SMark Brown default: 1691*a91eb199SMark Brown return -EINVAL; 1692*a91eb199SMark Brown } 1693*a91eb199SMark Brown break; 1694*a91eb199SMark Brown default: 1695*a91eb199SMark Brown return -EINVAL; 1696*a91eb199SMark Brown } 1697*a91eb199SMark Brown 1698*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1699*a91eb199SMark Brown WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV | 1700*a91eb199SMark Brown WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1); 1701*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1702*a91eb199SMark Brown WM8904_LRCLK_DIR, aif3); 1703*a91eb199SMark Brown 1704*a91eb199SMark Brown return 0; 1705*a91eb199SMark Brown } 1706*a91eb199SMark Brown 1707*a91eb199SMark Brown 1708*a91eb199SMark Brown static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 1709*a91eb199SMark Brown unsigned int rx_mask, int slots, int slot_width) 1710*a91eb199SMark Brown { 1711*a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1712*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 1713*a91eb199SMark Brown int aif1 = 0; 1714*a91eb199SMark Brown 1715*a91eb199SMark Brown /* Don't need to validate anything if we're turning off TDM */ 1716*a91eb199SMark Brown if (slots == 0) 1717*a91eb199SMark Brown goto out; 1718*a91eb199SMark Brown 1719*a91eb199SMark Brown /* Note that we allow configurations we can't handle ourselves - 1720*a91eb199SMark Brown * for example, we can generate clocks for slots 2 and up even if 1721*a91eb199SMark Brown * we can't use those slots ourselves. 1722*a91eb199SMark Brown */ 1723*a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM | WM8904_AIFDAC_TDM; 1724*a91eb199SMark Brown 1725*a91eb199SMark Brown switch (rx_mask) { 1726*a91eb199SMark Brown case 3: 1727*a91eb199SMark Brown break; 1728*a91eb199SMark Brown case 0xc: 1729*a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM_CHAN; 1730*a91eb199SMark Brown break; 1731*a91eb199SMark Brown default: 1732*a91eb199SMark Brown return -EINVAL; 1733*a91eb199SMark Brown } 1734*a91eb199SMark Brown 1735*a91eb199SMark Brown 1736*a91eb199SMark Brown switch (tx_mask) { 1737*a91eb199SMark Brown case 3: 1738*a91eb199SMark Brown break; 1739*a91eb199SMark Brown case 0xc: 1740*a91eb199SMark Brown aif1 |= WM8904_AIFDAC_TDM_CHAN; 1741*a91eb199SMark Brown break; 1742*a91eb199SMark Brown default: 1743*a91eb199SMark Brown return -EINVAL; 1744*a91eb199SMark Brown } 1745*a91eb199SMark Brown 1746*a91eb199SMark Brown out: 1747*a91eb199SMark Brown wm8904->tdm_width = slot_width; 1748*a91eb199SMark Brown wm8904->tdm_slots = slots / 2; 1749*a91eb199SMark Brown 1750*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1751*a91eb199SMark Brown WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN | 1752*a91eb199SMark Brown WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1); 1753*a91eb199SMark Brown 1754*a91eb199SMark Brown return 0; 1755*a91eb199SMark Brown } 1756*a91eb199SMark Brown 1757*a91eb199SMark Brown struct _fll_div { 1758*a91eb199SMark Brown u16 fll_fratio; 1759*a91eb199SMark Brown u16 fll_outdiv; 1760*a91eb199SMark Brown u16 fll_clk_ref_div; 1761*a91eb199SMark Brown u16 n; 1762*a91eb199SMark Brown u16 k; 1763*a91eb199SMark Brown }; 1764*a91eb199SMark Brown 1765*a91eb199SMark Brown /* The size in bits of the FLL divide multiplied by 10 1766*a91eb199SMark Brown * to allow rounding later */ 1767*a91eb199SMark Brown #define FIXED_FLL_SIZE ((1 << 16) * 10) 1768*a91eb199SMark Brown 1769*a91eb199SMark Brown static struct { 1770*a91eb199SMark Brown unsigned int min; 1771*a91eb199SMark Brown unsigned int max; 1772*a91eb199SMark Brown u16 fll_fratio; 1773*a91eb199SMark Brown int ratio; 1774*a91eb199SMark Brown } fll_fratios[] = { 1775*a91eb199SMark Brown { 0, 64000, 4, 16 }, 1776*a91eb199SMark Brown { 64000, 128000, 3, 8 }, 1777*a91eb199SMark Brown { 128000, 256000, 2, 4 }, 1778*a91eb199SMark Brown { 256000, 1000000, 1, 2 }, 1779*a91eb199SMark Brown { 1000000, 13500000, 0, 1 }, 1780*a91eb199SMark Brown }; 1781*a91eb199SMark Brown 1782*a91eb199SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1783*a91eb199SMark Brown unsigned int Fout) 1784*a91eb199SMark Brown { 1785*a91eb199SMark Brown u64 Kpart; 1786*a91eb199SMark Brown unsigned int K, Ndiv, Nmod, target; 1787*a91eb199SMark Brown unsigned int div; 1788*a91eb199SMark Brown int i; 1789*a91eb199SMark Brown 1790*a91eb199SMark Brown /* Fref must be <=13.5MHz */ 1791*a91eb199SMark Brown div = 1; 1792*a91eb199SMark Brown fll_div->fll_clk_ref_div = 0; 1793*a91eb199SMark Brown while ((Fref / div) > 13500000) { 1794*a91eb199SMark Brown div *= 2; 1795*a91eb199SMark Brown fll_div->fll_clk_ref_div++; 1796*a91eb199SMark Brown 1797*a91eb199SMark Brown if (div > 8) { 1798*a91eb199SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1799*a91eb199SMark Brown Fref); 1800*a91eb199SMark Brown return -EINVAL; 1801*a91eb199SMark Brown } 1802*a91eb199SMark Brown } 1803*a91eb199SMark Brown 1804*a91eb199SMark Brown pr_debug("Fref=%u Fout=%u\n", Fref, Fout); 1805*a91eb199SMark Brown 1806*a91eb199SMark Brown /* Apply the division for our remaining calculations */ 1807*a91eb199SMark Brown Fref /= div; 1808*a91eb199SMark Brown 1809*a91eb199SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1810*a91eb199SMark Brown div = 4; 1811*a91eb199SMark Brown while (Fout * div < 90000000) { 1812*a91eb199SMark Brown div++; 1813*a91eb199SMark Brown if (div > 64) { 1814*a91eb199SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1815*a91eb199SMark Brown Fout); 1816*a91eb199SMark Brown return -EINVAL; 1817*a91eb199SMark Brown } 1818*a91eb199SMark Brown } 1819*a91eb199SMark Brown target = Fout * div; 1820*a91eb199SMark Brown fll_div->fll_outdiv = div - 1; 1821*a91eb199SMark Brown 1822*a91eb199SMark Brown pr_debug("Fvco=%dHz\n", target); 1823*a91eb199SMark Brown 1824*a91eb199SMark Brown /* Find an appropraite FLL_FRATIO and factor it out of the target */ 1825*a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1826*a91eb199SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1827*a91eb199SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1828*a91eb199SMark Brown target /= fll_fratios[i].ratio; 1829*a91eb199SMark Brown break; 1830*a91eb199SMark Brown } 1831*a91eb199SMark Brown } 1832*a91eb199SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1833*a91eb199SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1834*a91eb199SMark Brown return -EINVAL; 1835*a91eb199SMark Brown } 1836*a91eb199SMark Brown 1837*a91eb199SMark Brown /* Now, calculate N.K */ 1838*a91eb199SMark Brown Ndiv = target / Fref; 1839*a91eb199SMark Brown 1840*a91eb199SMark Brown fll_div->n = Ndiv; 1841*a91eb199SMark Brown Nmod = target % Fref; 1842*a91eb199SMark Brown pr_debug("Nmod=%d\n", Nmod); 1843*a91eb199SMark Brown 1844*a91eb199SMark Brown /* Calculate fractional part - scale up so we can round. */ 1845*a91eb199SMark Brown Kpart = FIXED_FLL_SIZE * (long long)Nmod; 1846*a91eb199SMark Brown 1847*a91eb199SMark Brown do_div(Kpart, Fref); 1848*a91eb199SMark Brown 1849*a91eb199SMark Brown K = Kpart & 0xFFFFFFFF; 1850*a91eb199SMark Brown 1851*a91eb199SMark Brown if ((K % 10) >= 5) 1852*a91eb199SMark Brown K += 5; 1853*a91eb199SMark Brown 1854*a91eb199SMark Brown /* Move down to proper range now rounding is done */ 1855*a91eb199SMark Brown fll_div->k = K / 10; 1856*a91eb199SMark Brown 1857*a91eb199SMark Brown pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", 1858*a91eb199SMark Brown fll_div->n, fll_div->k, 1859*a91eb199SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 1860*a91eb199SMark Brown fll_div->fll_clk_ref_div); 1861*a91eb199SMark Brown 1862*a91eb199SMark Brown return 0; 1863*a91eb199SMark Brown } 1864*a91eb199SMark Brown 1865*a91eb199SMark Brown static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source, 1866*a91eb199SMark Brown unsigned int Fref, unsigned int Fout) 1867*a91eb199SMark Brown { 1868*a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1869*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 1870*a91eb199SMark Brown struct _fll_div fll_div; 1871*a91eb199SMark Brown int ret, val; 1872*a91eb199SMark Brown int clock2, fll1; 1873*a91eb199SMark Brown 1874*a91eb199SMark Brown /* Any change? */ 1875*a91eb199SMark Brown if (source == wm8904->fll_src && Fref == wm8904->fll_fref && 1876*a91eb199SMark Brown Fout == wm8904->fll_fout) 1877*a91eb199SMark Brown return 0; 1878*a91eb199SMark Brown 1879*a91eb199SMark Brown if (Fout == 0) { 1880*a91eb199SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 1881*a91eb199SMark Brown 1882*a91eb199SMark Brown wm8904->fll_fref = 0; 1883*a91eb199SMark Brown wm8904->fll_fout = 0; 1884*a91eb199SMark Brown 1885*a91eb199SMark Brown /* Gate SYSCLK to avoid glitches */ 1886*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1887*a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1888*a91eb199SMark Brown 1889*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1890*a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1891*a91eb199SMark Brown 1892*a91eb199SMark Brown goto out; 1893*a91eb199SMark Brown } 1894*a91eb199SMark Brown 1895*a91eb199SMark Brown /* Validate the FLL ID */ 1896*a91eb199SMark Brown switch (source) { 1897*a91eb199SMark Brown case WM8904_FLL_MCLK: 1898*a91eb199SMark Brown case WM8904_FLL_LRCLK: 1899*a91eb199SMark Brown case WM8904_FLL_BCLK: 1900*a91eb199SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 1901*a91eb199SMark Brown if (ret != 0) 1902*a91eb199SMark Brown return ret; 1903*a91eb199SMark Brown break; 1904*a91eb199SMark Brown 1905*a91eb199SMark Brown case WM8904_FLL_FREE_RUNNING: 1906*a91eb199SMark Brown dev_dbg(codec->dev, "Using free running FLL\n"); 1907*a91eb199SMark Brown /* Force 12MHz and output/4 for now */ 1908*a91eb199SMark Brown Fout = 12000000; 1909*a91eb199SMark Brown Fref = 12000000; 1910*a91eb199SMark Brown 1911*a91eb199SMark Brown memset(&fll_div, 0, sizeof(fll_div)); 1912*a91eb199SMark Brown fll_div.fll_outdiv = 3; 1913*a91eb199SMark Brown break; 1914*a91eb199SMark Brown 1915*a91eb199SMark Brown default: 1916*a91eb199SMark Brown dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 1917*a91eb199SMark Brown return -EINVAL; 1918*a91eb199SMark Brown } 1919*a91eb199SMark Brown 1920*a91eb199SMark Brown /* Save current state then disable the FLL and SYSCLK to avoid 1921*a91eb199SMark Brown * misclocking */ 1922*a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 1923*a91eb199SMark Brown fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1); 1924*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1925*a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1926*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1927*a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1928*a91eb199SMark Brown 1929*a91eb199SMark Brown /* Unlock forced oscilator control to switch it on/off */ 1930*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1931*a91eb199SMark Brown WM8904_USER_KEY, WM8904_USER_KEY); 1932*a91eb199SMark Brown 1933*a91eb199SMark Brown if (fll_id == WM8904_FLL_FREE_RUNNING) { 1934*a91eb199SMark Brown val = WM8904_FLL_FRC_NCO; 1935*a91eb199SMark Brown } else { 1936*a91eb199SMark Brown val = 0; 1937*a91eb199SMark Brown } 1938*a91eb199SMark Brown 1939*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO, 1940*a91eb199SMark Brown val); 1941*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1942*a91eb199SMark Brown WM8904_USER_KEY, 0); 1943*a91eb199SMark Brown 1944*a91eb199SMark Brown switch (fll_id) { 1945*a91eb199SMark Brown case WM8904_FLL_MCLK: 1946*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1947*a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 0); 1948*a91eb199SMark Brown break; 1949*a91eb199SMark Brown 1950*a91eb199SMark Brown case WM8904_FLL_LRCLK: 1951*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1952*a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 1); 1953*a91eb199SMark Brown break; 1954*a91eb199SMark Brown 1955*a91eb199SMark Brown case WM8904_FLL_BCLK: 1956*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1957*a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 2); 1958*a91eb199SMark Brown break; 1959*a91eb199SMark Brown } 1960*a91eb199SMark Brown 1961*a91eb199SMark Brown if (fll_div.k) 1962*a91eb199SMark Brown val = WM8904_FLL_FRACN_ENA; 1963*a91eb199SMark Brown else 1964*a91eb199SMark Brown val = 0; 1965*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1966*a91eb199SMark Brown WM8904_FLL_FRACN_ENA, val); 1967*a91eb199SMark Brown 1968*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2, 1969*a91eb199SMark Brown WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK, 1970*a91eb199SMark Brown (fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) | 1971*a91eb199SMark Brown (fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT)); 1972*a91eb199SMark Brown 1973*a91eb199SMark Brown snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k); 1974*a91eb199SMark Brown 1975*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK, 1976*a91eb199SMark Brown fll_div.n << WM8904_FLL_N_SHIFT); 1977*a91eb199SMark Brown 1978*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1979*a91eb199SMark Brown WM8904_FLL_CLK_REF_DIV_MASK, 1980*a91eb199SMark Brown fll_div.fll_clk_ref_div 1981*a91eb199SMark Brown << WM8904_FLL_CLK_REF_DIV_SHIFT); 1982*a91eb199SMark Brown 1983*a91eb199SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 1984*a91eb199SMark Brown 1985*a91eb199SMark Brown wm8904->fll_fref = Fref; 1986*a91eb199SMark Brown wm8904->fll_fout = Fout; 1987*a91eb199SMark Brown wm8904->fll_src = source; 1988*a91eb199SMark Brown 1989*a91eb199SMark Brown /* Enable the FLL if it was previously active */ 1990*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1991*a91eb199SMark Brown WM8904_FLL_OSC_ENA, fll1); 1992*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1993*a91eb199SMark Brown WM8904_FLL_ENA, fll1); 1994*a91eb199SMark Brown 1995*a91eb199SMark Brown out: 1996*a91eb199SMark Brown /* Reenable SYSCLK if it was previously active */ 1997*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1998*a91eb199SMark Brown WM8904_CLK_SYS_ENA, clock2); 1999*a91eb199SMark Brown 2000*a91eb199SMark Brown return 0; 2001*a91eb199SMark Brown } 2002*a91eb199SMark Brown 2003*a91eb199SMark Brown static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) 2004*a91eb199SMark Brown { 2005*a91eb199SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 2006*a91eb199SMark Brown int val; 2007*a91eb199SMark Brown 2008*a91eb199SMark Brown if (mute) 2009*a91eb199SMark Brown val = WM8904_DAC_MUTE; 2010*a91eb199SMark Brown else 2011*a91eb199SMark Brown val = 0; 2012*a91eb199SMark Brown 2013*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val); 2014*a91eb199SMark Brown 2015*a91eb199SMark Brown return 0; 2016*a91eb199SMark Brown } 2017*a91eb199SMark Brown 2018*a91eb199SMark Brown static int wm8904_set_bias_level(struct snd_soc_codec *codec, 2019*a91eb199SMark Brown enum snd_soc_bias_level level) 2020*a91eb199SMark Brown { 2021*a91eb199SMark Brown struct wm8904_priv *wm8904 = codec->private_data; 2022*a91eb199SMark Brown int ret, i; 2023*a91eb199SMark Brown 2024*a91eb199SMark Brown switch (level) { 2025*a91eb199SMark Brown case SND_SOC_BIAS_ON: 2026*a91eb199SMark Brown break; 2027*a91eb199SMark Brown 2028*a91eb199SMark Brown case SND_SOC_BIAS_PREPARE: 2029*a91eb199SMark Brown /* VMID resistance 2*50k */ 2030*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2031*a91eb199SMark Brown WM8904_VMID_RES_MASK, 2032*a91eb199SMark Brown 0x1 << WM8904_VMID_RES_SHIFT); 2033*a91eb199SMark Brown 2034*a91eb199SMark Brown /* Normal bias current */ 2035*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2036*a91eb199SMark Brown WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT); 2037*a91eb199SMark Brown break; 2038*a91eb199SMark Brown 2039*a91eb199SMark Brown case SND_SOC_BIAS_STANDBY: 2040*a91eb199SMark Brown if (codec->bias_level == SND_SOC_BIAS_OFF) { 2041*a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2042*a91eb199SMark Brown wm8904->supplies); 2043*a91eb199SMark Brown if (ret != 0) { 2044*a91eb199SMark Brown dev_err(codec->dev, 2045*a91eb199SMark Brown "Failed to enable supplies: %d\n", 2046*a91eb199SMark Brown ret); 2047*a91eb199SMark Brown return ret; 2048*a91eb199SMark Brown } 2049*a91eb199SMark Brown 2050*a91eb199SMark Brown /* Sync back cached values if they're 2051*a91eb199SMark Brown * different from the hardware default. 2052*a91eb199SMark Brown */ 2053*a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(wm8904->reg_cache); i++) { 2054*a91eb199SMark Brown if (!wm8904_access[i].writable) 2055*a91eb199SMark Brown continue; 2056*a91eb199SMark Brown 2057*a91eb199SMark Brown if (wm8904->reg_cache[i] == wm8904_reg[i]) 2058*a91eb199SMark Brown continue; 2059*a91eb199SMark Brown 2060*a91eb199SMark Brown snd_soc_write(codec, i, wm8904->reg_cache[i]); 2061*a91eb199SMark Brown } 2062*a91eb199SMark Brown 2063*a91eb199SMark Brown /* Enable bias */ 2064*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2065*a91eb199SMark Brown WM8904_BIAS_ENA, WM8904_BIAS_ENA); 2066*a91eb199SMark Brown 2067*a91eb199SMark Brown /* Enable VMID, VMID buffering, 2*5k resistance */ 2068*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2069*a91eb199SMark Brown WM8904_VMID_ENA | 2070*a91eb199SMark Brown WM8904_VMID_RES_MASK, 2071*a91eb199SMark Brown WM8904_VMID_ENA | 2072*a91eb199SMark Brown 0x3 << WM8904_VMID_RES_SHIFT); 2073*a91eb199SMark Brown 2074*a91eb199SMark Brown /* Let VMID ramp */ 2075*a91eb199SMark Brown msleep(1); 2076*a91eb199SMark Brown } 2077*a91eb199SMark Brown 2078*a91eb199SMark Brown /* Maintain VMID with 2*250k */ 2079*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2080*a91eb199SMark Brown WM8904_VMID_RES_MASK, 2081*a91eb199SMark Brown 0x2 << WM8904_VMID_RES_SHIFT); 2082*a91eb199SMark Brown 2083*a91eb199SMark Brown /* Bias current *0.5 */ 2084*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2085*a91eb199SMark Brown WM8904_ISEL_MASK, 0); 2086*a91eb199SMark Brown break; 2087*a91eb199SMark Brown 2088*a91eb199SMark Brown case SND_SOC_BIAS_OFF: 2089*a91eb199SMark Brown /* Turn off VMID */ 2090*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 2091*a91eb199SMark Brown WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0); 2092*a91eb199SMark Brown 2093*a91eb199SMark Brown /* Stop bias generation */ 2094*a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2095*a91eb199SMark Brown WM8904_BIAS_ENA, 0); 2096*a91eb199SMark Brown 2097*a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), 2098*a91eb199SMark Brown wm8904->supplies); 2099*a91eb199SMark Brown break; 2100*a91eb199SMark Brown } 2101*a91eb199SMark Brown codec->bias_level = level; 2102*a91eb199SMark Brown return 0; 2103*a91eb199SMark Brown } 2104*a91eb199SMark Brown 2105*a91eb199SMark Brown #define WM8904_RATES SNDRV_PCM_RATE_8000_96000 2106*a91eb199SMark Brown 2107*a91eb199SMark Brown #define WM8904_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 2108*a91eb199SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 2109*a91eb199SMark Brown 2110*a91eb199SMark Brown static struct snd_soc_dai_ops wm8904_dai_ops = { 2111*a91eb199SMark Brown .set_sysclk = wm8904_set_sysclk, 2112*a91eb199SMark Brown .set_fmt = wm8904_set_fmt, 2113*a91eb199SMark Brown .set_tdm_slot = wm8904_set_tdm_slot, 2114*a91eb199SMark Brown .set_pll = wm8904_set_fll, 2115*a91eb199SMark Brown .hw_params = wm8904_hw_params, 2116*a91eb199SMark Brown .digital_mute = wm8904_digital_mute, 2117*a91eb199SMark Brown }; 2118*a91eb199SMark Brown 2119*a91eb199SMark Brown struct snd_soc_dai wm8904_dai = { 2120*a91eb199SMark Brown .name = "WM8904", 2121*a91eb199SMark Brown .playback = { 2122*a91eb199SMark Brown .stream_name = "Playback", 2123*a91eb199SMark Brown .channels_min = 2, 2124*a91eb199SMark Brown .channels_max = 2, 2125*a91eb199SMark Brown .rates = WM8904_RATES, 2126*a91eb199SMark Brown .formats = WM8904_FORMATS, 2127*a91eb199SMark Brown }, 2128*a91eb199SMark Brown .capture = { 2129*a91eb199SMark Brown .stream_name = "Capture", 2130*a91eb199SMark Brown .channels_min = 2, 2131*a91eb199SMark Brown .channels_max = 2, 2132*a91eb199SMark Brown .rates = WM8904_RATES, 2133*a91eb199SMark Brown .formats = WM8904_FORMATS, 2134*a91eb199SMark Brown }, 2135*a91eb199SMark Brown .ops = &wm8904_dai_ops, 2136*a91eb199SMark Brown .symmetric_rates = 1, 2137*a91eb199SMark Brown }; 2138*a91eb199SMark Brown EXPORT_SYMBOL_GPL(wm8904_dai); 2139*a91eb199SMark Brown 2140*a91eb199SMark Brown #ifdef CONFIG_PM 2141*a91eb199SMark Brown static int wm8904_suspend(struct platform_device *pdev, pm_message_t state) 2142*a91eb199SMark Brown { 2143*a91eb199SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 2144*a91eb199SMark Brown struct snd_soc_codec *codec = socdev->card->codec; 2145*a91eb199SMark Brown 2146*a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_OFF); 2147*a91eb199SMark Brown 2148*a91eb199SMark Brown return 0; 2149*a91eb199SMark Brown } 2150*a91eb199SMark Brown 2151*a91eb199SMark Brown static int wm8904_resume(struct platform_device *pdev) 2152*a91eb199SMark Brown { 2153*a91eb199SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 2154*a91eb199SMark Brown struct snd_soc_codec *codec = socdev->card->codec; 2155*a91eb199SMark Brown 2156*a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2157*a91eb199SMark Brown 2158*a91eb199SMark Brown return 0; 2159*a91eb199SMark Brown } 2160*a91eb199SMark Brown #else 2161*a91eb199SMark Brown #define wm8904_suspend NULL 2162*a91eb199SMark Brown #define wm8904_resume NULL 2163*a91eb199SMark Brown #endif 2164*a91eb199SMark Brown 2165*a91eb199SMark Brown static void wm8904_handle_retune_mobile_pdata(struct wm8904_priv *wm8904) 2166*a91eb199SMark Brown { 2167*a91eb199SMark Brown struct snd_soc_codec *codec = &wm8904->codec; 2168*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2169*a91eb199SMark Brown struct snd_kcontrol_new control = 2170*a91eb199SMark Brown SOC_ENUM_EXT("EQ Mode", 2171*a91eb199SMark Brown wm8904->retune_mobile_enum, 2172*a91eb199SMark Brown wm8904_get_retune_mobile_enum, 2173*a91eb199SMark Brown wm8904_put_retune_mobile_enum); 2174*a91eb199SMark Brown int ret, i, j; 2175*a91eb199SMark Brown const char **t; 2176*a91eb199SMark Brown 2177*a91eb199SMark Brown /* We need an array of texts for the enum API but the number 2178*a91eb199SMark Brown * of texts is likely to be less than the number of 2179*a91eb199SMark Brown * configurations due to the sample rate dependency of the 2180*a91eb199SMark Brown * configurations. */ 2181*a91eb199SMark Brown wm8904->num_retune_mobile_texts = 0; 2182*a91eb199SMark Brown wm8904->retune_mobile_texts = NULL; 2183*a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 2184*a91eb199SMark Brown for (j = 0; j < wm8904->num_retune_mobile_texts; j++) { 2185*a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 2186*a91eb199SMark Brown wm8904->retune_mobile_texts[j]) == 0) 2187*a91eb199SMark Brown break; 2188*a91eb199SMark Brown } 2189*a91eb199SMark Brown 2190*a91eb199SMark Brown if (j != wm8904->num_retune_mobile_texts) 2191*a91eb199SMark Brown continue; 2192*a91eb199SMark Brown 2193*a91eb199SMark Brown /* Expand the array... */ 2194*a91eb199SMark Brown t = krealloc(wm8904->retune_mobile_texts, 2195*a91eb199SMark Brown sizeof(char *) * 2196*a91eb199SMark Brown (wm8904->num_retune_mobile_texts + 1), 2197*a91eb199SMark Brown GFP_KERNEL); 2198*a91eb199SMark Brown if (t == NULL) 2199*a91eb199SMark Brown continue; 2200*a91eb199SMark Brown 2201*a91eb199SMark Brown /* ...store the new entry... */ 2202*a91eb199SMark Brown t[wm8904->num_retune_mobile_texts] = 2203*a91eb199SMark Brown pdata->retune_mobile_cfgs[i].name; 2204*a91eb199SMark Brown 2205*a91eb199SMark Brown /* ...and remember the new version. */ 2206*a91eb199SMark Brown wm8904->num_retune_mobile_texts++; 2207*a91eb199SMark Brown wm8904->retune_mobile_texts = t; 2208*a91eb199SMark Brown } 2209*a91eb199SMark Brown 2210*a91eb199SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 2211*a91eb199SMark Brown wm8904->num_retune_mobile_texts); 2212*a91eb199SMark Brown 2213*a91eb199SMark Brown wm8904->retune_mobile_enum.max = wm8904->num_retune_mobile_texts; 2214*a91eb199SMark Brown wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts; 2215*a91eb199SMark Brown 2216*a91eb199SMark Brown ret = snd_soc_add_controls(&wm8904->codec, &control, 1); 2217*a91eb199SMark Brown if (ret != 0) 2218*a91eb199SMark Brown dev_err(wm8904->codec.dev, 2219*a91eb199SMark Brown "Failed to add ReTune Mobile control: %d\n", ret); 2220*a91eb199SMark Brown } 2221*a91eb199SMark Brown 2222*a91eb199SMark Brown static void wm8904_handle_pdata(struct wm8904_priv *wm8904) 2223*a91eb199SMark Brown { 2224*a91eb199SMark Brown struct snd_soc_codec *codec = &wm8904->codec; 2225*a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2226*a91eb199SMark Brown int ret, i; 2227*a91eb199SMark Brown 2228*a91eb199SMark Brown if (!pdata) { 2229*a91eb199SMark Brown snd_soc_add_controls(&wm8904->codec, wm8904_eq_controls, 2230*a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2231*a91eb199SMark Brown return; 2232*a91eb199SMark Brown } 2233*a91eb199SMark Brown 2234*a91eb199SMark Brown dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); 2235*a91eb199SMark Brown 2236*a91eb199SMark Brown if (pdata->num_drc_cfgs) { 2237*a91eb199SMark Brown struct snd_kcontrol_new control = 2238*a91eb199SMark Brown SOC_ENUM_EXT("DRC Mode", wm8904->drc_enum, 2239*a91eb199SMark Brown wm8904_get_drc_enum, wm8904_put_drc_enum); 2240*a91eb199SMark Brown 2241*a91eb199SMark Brown /* We need an array of texts for the enum API */ 2242*a91eb199SMark Brown wm8904->drc_texts = kmalloc(sizeof(char *) 2243*a91eb199SMark Brown * pdata->num_drc_cfgs, GFP_KERNEL); 2244*a91eb199SMark Brown if (!wm8904->drc_texts) { 2245*a91eb199SMark Brown dev_err(wm8904->codec.dev, 2246*a91eb199SMark Brown "Failed to allocate %d DRC config texts\n", 2247*a91eb199SMark Brown pdata->num_drc_cfgs); 2248*a91eb199SMark Brown return; 2249*a91eb199SMark Brown } 2250*a91eb199SMark Brown 2251*a91eb199SMark Brown for (i = 0; i < pdata->num_drc_cfgs; i++) 2252*a91eb199SMark Brown wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; 2253*a91eb199SMark Brown 2254*a91eb199SMark Brown wm8904->drc_enum.max = pdata->num_drc_cfgs; 2255*a91eb199SMark Brown wm8904->drc_enum.texts = wm8904->drc_texts; 2256*a91eb199SMark Brown 2257*a91eb199SMark Brown ret = snd_soc_add_controls(&wm8904->codec, &control, 1); 2258*a91eb199SMark Brown if (ret != 0) 2259*a91eb199SMark Brown dev_err(wm8904->codec.dev, 2260*a91eb199SMark Brown "Failed to add DRC mode control: %d\n", ret); 2261*a91eb199SMark Brown 2262*a91eb199SMark Brown wm8904_set_drc(codec); 2263*a91eb199SMark Brown } 2264*a91eb199SMark Brown 2265*a91eb199SMark Brown dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", 2266*a91eb199SMark Brown pdata->num_retune_mobile_cfgs); 2267*a91eb199SMark Brown 2268*a91eb199SMark Brown if (pdata->num_retune_mobile_cfgs) 2269*a91eb199SMark Brown wm8904_handle_retune_mobile_pdata(wm8904); 2270*a91eb199SMark Brown else 2271*a91eb199SMark Brown snd_soc_add_controls(&wm8904->codec, wm8904_eq_controls, 2272*a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2273*a91eb199SMark Brown } 2274*a91eb199SMark Brown 2275*a91eb199SMark Brown static int wm8904_probe(struct platform_device *pdev) 2276*a91eb199SMark Brown { 2277*a91eb199SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 2278*a91eb199SMark Brown struct snd_soc_codec *codec; 2279*a91eb199SMark Brown int ret = 0; 2280*a91eb199SMark Brown 2281*a91eb199SMark Brown if (wm8904_codec == NULL) { 2282*a91eb199SMark Brown dev_err(&pdev->dev, "Codec device not registered\n"); 2283*a91eb199SMark Brown return -ENODEV; 2284*a91eb199SMark Brown } 2285*a91eb199SMark Brown 2286*a91eb199SMark Brown socdev->card->codec = wm8904_codec; 2287*a91eb199SMark Brown codec = wm8904_codec; 2288*a91eb199SMark Brown 2289*a91eb199SMark Brown /* register pcms */ 2290*a91eb199SMark Brown ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 2291*a91eb199SMark Brown if (ret < 0) { 2292*a91eb199SMark Brown dev_err(codec->dev, "failed to create pcms: %d\n", ret); 2293*a91eb199SMark Brown goto pcm_err; 2294*a91eb199SMark Brown } 2295*a91eb199SMark Brown 2296*a91eb199SMark Brown wm8904_handle_pdata(codec->private_data); 2297*a91eb199SMark Brown 2298*a91eb199SMark Brown wm8904_add_widgets(codec); 2299*a91eb199SMark Brown 2300*a91eb199SMark Brown return ret; 2301*a91eb199SMark Brown 2302*a91eb199SMark Brown pcm_err: 2303*a91eb199SMark Brown return ret; 2304*a91eb199SMark Brown } 2305*a91eb199SMark Brown 2306*a91eb199SMark Brown static int wm8904_remove(struct platform_device *pdev) 2307*a91eb199SMark Brown { 2308*a91eb199SMark Brown struct snd_soc_device *socdev = platform_get_drvdata(pdev); 2309*a91eb199SMark Brown 2310*a91eb199SMark Brown snd_soc_free_pcms(socdev); 2311*a91eb199SMark Brown snd_soc_dapm_free(socdev); 2312*a91eb199SMark Brown 2313*a91eb199SMark Brown return 0; 2314*a91eb199SMark Brown } 2315*a91eb199SMark Brown 2316*a91eb199SMark Brown struct snd_soc_codec_device soc_codec_dev_wm8904 = { 2317*a91eb199SMark Brown .probe = wm8904_probe, 2318*a91eb199SMark Brown .remove = wm8904_remove, 2319*a91eb199SMark Brown .suspend = wm8904_suspend, 2320*a91eb199SMark Brown .resume = wm8904_resume, 2321*a91eb199SMark Brown }; 2322*a91eb199SMark Brown EXPORT_SYMBOL_GPL(soc_codec_dev_wm8904); 2323*a91eb199SMark Brown 2324*a91eb199SMark Brown static int wm8904_register(struct wm8904_priv *wm8904, 2325*a91eb199SMark Brown enum snd_soc_control_type control) 2326*a91eb199SMark Brown { 2327*a91eb199SMark Brown int ret; 2328*a91eb199SMark Brown struct snd_soc_codec *codec = &wm8904->codec; 2329*a91eb199SMark Brown int i; 2330*a91eb199SMark Brown 2331*a91eb199SMark Brown if (wm8904_codec) { 2332*a91eb199SMark Brown dev_err(codec->dev, "Another WM8904 is registered\n"); 2333*a91eb199SMark Brown return -EINVAL; 2334*a91eb199SMark Brown } 2335*a91eb199SMark Brown 2336*a91eb199SMark Brown mutex_init(&codec->mutex); 2337*a91eb199SMark Brown INIT_LIST_HEAD(&codec->dapm_widgets); 2338*a91eb199SMark Brown INIT_LIST_HEAD(&codec->dapm_paths); 2339*a91eb199SMark Brown 2340*a91eb199SMark Brown codec->private_data = wm8904; 2341*a91eb199SMark Brown codec->name = "WM8904"; 2342*a91eb199SMark Brown codec->owner = THIS_MODULE; 2343*a91eb199SMark Brown codec->bias_level = SND_SOC_BIAS_OFF; 2344*a91eb199SMark Brown codec->set_bias_level = wm8904_set_bias_level; 2345*a91eb199SMark Brown codec->dai = &wm8904_dai; 2346*a91eb199SMark Brown codec->num_dai = 1; 2347*a91eb199SMark Brown codec->reg_cache_size = WM8904_MAX_REGISTER; 2348*a91eb199SMark Brown codec->reg_cache = &wm8904->reg_cache; 2349*a91eb199SMark Brown codec->volatile_register = wm8904_volatile_register; 2350*a91eb199SMark Brown 2351*a91eb199SMark Brown memcpy(codec->reg_cache, wm8904_reg, sizeof(wm8904_reg)); 2352*a91eb199SMark Brown 2353*a91eb199SMark Brown ret = snd_soc_codec_set_cache_io(codec, 8, 16, control); 2354*a91eb199SMark Brown if (ret != 0) { 2355*a91eb199SMark Brown dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 2356*a91eb199SMark Brown goto err; 2357*a91eb199SMark Brown } 2358*a91eb199SMark Brown 2359*a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(wm8904->supplies); i++) 2360*a91eb199SMark Brown wm8904->supplies[i].supply = wm8904_supply_names[i]; 2361*a91eb199SMark Brown 2362*a91eb199SMark Brown ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8904->supplies), 2363*a91eb199SMark Brown wm8904->supplies); 2364*a91eb199SMark Brown if (ret != 0) { 2365*a91eb199SMark Brown dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 2366*a91eb199SMark Brown goto err; 2367*a91eb199SMark Brown } 2368*a91eb199SMark Brown 2369*a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2370*a91eb199SMark Brown wm8904->supplies); 2371*a91eb199SMark Brown if (ret != 0) { 2372*a91eb199SMark Brown dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 2373*a91eb199SMark Brown goto err_get; 2374*a91eb199SMark Brown } 2375*a91eb199SMark Brown 2376*a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_SW_RESET_AND_ID); 2377*a91eb199SMark Brown if (ret < 0) { 2378*a91eb199SMark Brown dev_err(codec->dev, "Failed to read ID register\n"); 2379*a91eb199SMark Brown goto err_enable; 2380*a91eb199SMark Brown } 2381*a91eb199SMark Brown if (ret != wm8904_reg[WM8904_SW_RESET_AND_ID]) { 2382*a91eb199SMark Brown dev_err(codec->dev, "Device is not a WM8904, ID is %x\n", ret); 2383*a91eb199SMark Brown ret = -EINVAL; 2384*a91eb199SMark Brown goto err_enable; 2385*a91eb199SMark Brown } 2386*a91eb199SMark Brown 2387*a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_REVISION); 2388*a91eb199SMark Brown if (ret < 0) { 2389*a91eb199SMark Brown dev_err(codec->dev, "Failed to read device revision: %d\n", 2390*a91eb199SMark Brown ret); 2391*a91eb199SMark Brown goto err_enable; 2392*a91eb199SMark Brown } 2393*a91eb199SMark Brown dev_info(codec->dev, "revision %c\n", ret + 'A'); 2394*a91eb199SMark Brown 2395*a91eb199SMark Brown ret = wm8904_reset(codec); 2396*a91eb199SMark Brown if (ret < 0) { 2397*a91eb199SMark Brown dev_err(codec->dev, "Failed to issue reset\n"); 2398*a91eb199SMark Brown goto err_enable; 2399*a91eb199SMark Brown } 2400*a91eb199SMark Brown 2401*a91eb199SMark Brown wm8904_dai.dev = codec->dev; 2402*a91eb199SMark Brown 2403*a91eb199SMark Brown /* Change some default settings - latch VU and enable ZC */ 2404*a91eb199SMark Brown wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU; 2405*a91eb199SMark Brown wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU; 2406*a91eb199SMark Brown wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU; 2407*a91eb199SMark Brown wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU; 2408*a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU | 2409*a91eb199SMark Brown WM8904_HPOUTLZC; 2410*a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU | 2411*a91eb199SMark Brown WM8904_HPOUTRZC; 2412*a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU | 2413*a91eb199SMark Brown WM8904_LINEOUTLZC; 2414*a91eb199SMark Brown wm8904->reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU | 2415*a91eb199SMark Brown WM8904_LINEOUTRZC; 2416*a91eb199SMark Brown wm8904->reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE; 2417*a91eb199SMark Brown 2418*a91eb199SMark Brown /* Set Class W by default - this will be managed by the Class 2419*a91eb199SMark Brown * G widget at runtime where bypass paths are available. 2420*a91eb199SMark Brown */ 2421*a91eb199SMark Brown wm8904->reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR; 2422*a91eb199SMark Brown 2423*a91eb199SMark Brown /* Use normal bias source */ 2424*a91eb199SMark Brown wm8904->reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL; 2425*a91eb199SMark Brown 2426*a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2427*a91eb199SMark Brown 2428*a91eb199SMark Brown /* Bias level configuration will have done an extra enable */ 2429*a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2430*a91eb199SMark Brown 2431*a91eb199SMark Brown wm8904_codec = codec; 2432*a91eb199SMark Brown 2433*a91eb199SMark Brown ret = snd_soc_register_codec(codec); 2434*a91eb199SMark Brown if (ret != 0) { 2435*a91eb199SMark Brown dev_err(codec->dev, "Failed to register codec: %d\n", ret); 2436*a91eb199SMark Brown return ret; 2437*a91eb199SMark Brown } 2438*a91eb199SMark Brown 2439*a91eb199SMark Brown ret = snd_soc_register_dai(&wm8904_dai); 2440*a91eb199SMark Brown if (ret != 0) { 2441*a91eb199SMark Brown dev_err(codec->dev, "Failed to register DAI: %d\n", ret); 2442*a91eb199SMark Brown snd_soc_unregister_codec(codec); 2443*a91eb199SMark Brown return ret; 2444*a91eb199SMark Brown } 2445*a91eb199SMark Brown 2446*a91eb199SMark Brown return 0; 2447*a91eb199SMark Brown 2448*a91eb199SMark Brown err_enable: 2449*a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2450*a91eb199SMark Brown err_get: 2451*a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2452*a91eb199SMark Brown err: 2453*a91eb199SMark Brown kfree(wm8904); 2454*a91eb199SMark Brown return ret; 2455*a91eb199SMark Brown } 2456*a91eb199SMark Brown 2457*a91eb199SMark Brown static void wm8904_unregister(struct wm8904_priv *wm8904) 2458*a91eb199SMark Brown { 2459*a91eb199SMark Brown wm8904_set_bias_level(&wm8904->codec, SND_SOC_BIAS_OFF); 2460*a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2461*a91eb199SMark Brown snd_soc_unregister_dai(&wm8904_dai); 2462*a91eb199SMark Brown snd_soc_unregister_codec(&wm8904->codec); 2463*a91eb199SMark Brown kfree(wm8904); 2464*a91eb199SMark Brown wm8904_codec = NULL; 2465*a91eb199SMark Brown } 2466*a91eb199SMark Brown 2467*a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2468*a91eb199SMark Brown static __devinit int wm8904_i2c_probe(struct i2c_client *i2c, 2469*a91eb199SMark Brown const struct i2c_device_id *id) 2470*a91eb199SMark Brown { 2471*a91eb199SMark Brown struct wm8904_priv *wm8904; 2472*a91eb199SMark Brown struct snd_soc_codec *codec; 2473*a91eb199SMark Brown 2474*a91eb199SMark Brown wm8904 = kzalloc(sizeof(struct wm8904_priv), GFP_KERNEL); 2475*a91eb199SMark Brown if (wm8904 == NULL) 2476*a91eb199SMark Brown return -ENOMEM; 2477*a91eb199SMark Brown 2478*a91eb199SMark Brown codec = &wm8904->codec; 2479*a91eb199SMark Brown codec->hw_write = (hw_write_t)i2c_master_send; 2480*a91eb199SMark Brown 2481*a91eb199SMark Brown i2c_set_clientdata(i2c, wm8904); 2482*a91eb199SMark Brown codec->control_data = i2c; 2483*a91eb199SMark Brown wm8904->pdata = i2c->dev.platform_data; 2484*a91eb199SMark Brown 2485*a91eb199SMark Brown codec->dev = &i2c->dev; 2486*a91eb199SMark Brown 2487*a91eb199SMark Brown return wm8904_register(wm8904, SND_SOC_I2C); 2488*a91eb199SMark Brown } 2489*a91eb199SMark Brown 2490*a91eb199SMark Brown static __devexit int wm8904_i2c_remove(struct i2c_client *client) 2491*a91eb199SMark Brown { 2492*a91eb199SMark Brown struct wm8904_priv *wm8904 = i2c_get_clientdata(client); 2493*a91eb199SMark Brown wm8904_unregister(wm8904); 2494*a91eb199SMark Brown return 0; 2495*a91eb199SMark Brown } 2496*a91eb199SMark Brown 2497*a91eb199SMark Brown static const struct i2c_device_id wm8904_i2c_id[] = { 2498*a91eb199SMark Brown { "wm8904", 0 }, 2499*a91eb199SMark Brown { } 2500*a91eb199SMark Brown }; 2501*a91eb199SMark Brown MODULE_DEVICE_TABLE(i2c, wm8904_i2c_id); 2502*a91eb199SMark Brown 2503*a91eb199SMark Brown static struct i2c_driver wm8904_i2c_driver = { 2504*a91eb199SMark Brown .driver = { 2505*a91eb199SMark Brown .name = "WM8904", 2506*a91eb199SMark Brown .owner = THIS_MODULE, 2507*a91eb199SMark Brown }, 2508*a91eb199SMark Brown .probe = wm8904_i2c_probe, 2509*a91eb199SMark Brown .remove = __devexit_p(wm8904_i2c_remove), 2510*a91eb199SMark Brown .id_table = wm8904_i2c_id, 2511*a91eb199SMark Brown }; 2512*a91eb199SMark Brown #endif 2513*a91eb199SMark Brown 2514*a91eb199SMark Brown static int __init wm8904_modinit(void) 2515*a91eb199SMark Brown { 2516*a91eb199SMark Brown int ret; 2517*a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2518*a91eb199SMark Brown ret = i2c_add_driver(&wm8904_i2c_driver); 2519*a91eb199SMark Brown if (ret != 0) { 2520*a91eb199SMark Brown printk(KERN_ERR "Failed to register WM8904 I2C driver: %d\n", 2521*a91eb199SMark Brown ret); 2522*a91eb199SMark Brown } 2523*a91eb199SMark Brown #endif 2524*a91eb199SMark Brown return 0; 2525*a91eb199SMark Brown } 2526*a91eb199SMark Brown module_init(wm8904_modinit); 2527*a91eb199SMark Brown 2528*a91eb199SMark Brown static void __exit wm8904_exit(void) 2529*a91eb199SMark Brown { 2530*a91eb199SMark Brown #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 2531*a91eb199SMark Brown i2c_del_driver(&wm8904_i2c_driver); 2532*a91eb199SMark Brown #endif 2533*a91eb199SMark Brown } 2534*a91eb199SMark Brown module_exit(wm8904_exit); 2535*a91eb199SMark Brown 2536*a91eb199SMark Brown MODULE_DESCRIPTION("ASoC WM8904 driver"); 2537*a91eb199SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 2538*a91eb199SMark Brown MODULE_LICENSE("GPL"); 2539