1a91eb199SMark Brown /* 2a91eb199SMark Brown * wm8904.c -- WM8904 ALSA SoC Audio driver 3a91eb199SMark Brown * 4a91eb199SMark Brown * Copyright 2009 Wolfson Microelectronics plc 5a91eb199SMark Brown * 6a91eb199SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7a91eb199SMark Brown * 8a91eb199SMark Brown * 9a91eb199SMark Brown * This program is free software; you can redistribute it and/or modify 10a91eb199SMark Brown * it under the terms of the GNU General Public License version 2 as 11a91eb199SMark Brown * published by the Free Software Foundation. 12a91eb199SMark Brown */ 13a91eb199SMark Brown 14a91eb199SMark Brown #include <linux/module.h> 15a91eb199SMark Brown #include <linux/moduleparam.h> 16a91eb199SMark Brown #include <linux/init.h> 17a91eb199SMark Brown #include <linux/delay.h> 18a91eb199SMark Brown #include <linux/pm.h> 19a91eb199SMark Brown #include <linux/i2c.h> 20*84d0d831SMark Brown #include <linux/regmap.h> 21a91eb199SMark Brown #include <linux/regulator/consumer.h> 225a0e3ad6STejun Heo #include <linux/slab.h> 23a91eb199SMark Brown #include <sound/core.h> 24a91eb199SMark Brown #include <sound/pcm.h> 25a91eb199SMark Brown #include <sound/pcm_params.h> 26a91eb199SMark Brown #include <sound/soc.h> 27a91eb199SMark Brown #include <sound/initval.h> 28a91eb199SMark Brown #include <sound/tlv.h> 29a91eb199SMark Brown #include <sound/wm8904.h> 30a91eb199SMark Brown 31a91eb199SMark Brown #include "wm8904.h" 32a91eb199SMark Brown 338c126474SMark Brown enum wm8904_type { 348c126474SMark Brown WM8904, 358c126474SMark Brown WM8912, 368c126474SMark Brown }; 378c126474SMark Brown 38a91eb199SMark Brown #define WM8904_NUM_DCS_CHANNELS 4 39a91eb199SMark Brown 40a91eb199SMark Brown #define WM8904_NUM_SUPPLIES 5 41a91eb199SMark Brown static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = { 42a91eb199SMark Brown "DCVDD", 43a91eb199SMark Brown "DBVDD", 44a91eb199SMark Brown "AVDD", 45a91eb199SMark Brown "CPVDD", 46a91eb199SMark Brown "MICVDD", 47a91eb199SMark Brown }; 48a91eb199SMark Brown 49a91eb199SMark Brown /* codec private data */ 50a91eb199SMark Brown struct wm8904_priv { 51*84d0d831SMark Brown struct regmap *regmap; 52f0fba2adSLiam Girdwood 538c126474SMark Brown enum wm8904_type devtype; 548c126474SMark Brown 55a91eb199SMark Brown struct regulator_bulk_data supplies[WM8904_NUM_SUPPLIES]; 56a91eb199SMark Brown 57a91eb199SMark Brown struct wm8904_pdata *pdata; 58a91eb199SMark Brown 59a91eb199SMark Brown int deemph; 60a91eb199SMark Brown 61a91eb199SMark Brown /* Platform provided DRC configuration */ 62a91eb199SMark Brown const char **drc_texts; 63a91eb199SMark Brown int drc_cfg; 64a91eb199SMark Brown struct soc_enum drc_enum; 65a91eb199SMark Brown 66a91eb199SMark Brown /* Platform provided ReTune mobile configuration */ 67a91eb199SMark Brown int num_retune_mobile_texts; 68a91eb199SMark Brown const char **retune_mobile_texts; 69a91eb199SMark Brown int retune_mobile_cfg; 70a91eb199SMark Brown struct soc_enum retune_mobile_enum; 71a91eb199SMark Brown 72a91eb199SMark Brown /* FLL setup */ 73a91eb199SMark Brown int fll_src; 74a91eb199SMark Brown int fll_fref; 75a91eb199SMark Brown int fll_fout; 76a91eb199SMark Brown 77a91eb199SMark Brown /* Clocking configuration */ 78a91eb199SMark Brown unsigned int mclk_rate; 79a91eb199SMark Brown int sysclk_src; 80a91eb199SMark Brown unsigned int sysclk_rate; 81a91eb199SMark Brown 82a91eb199SMark Brown int tdm_width; 83a91eb199SMark Brown int tdm_slots; 84a91eb199SMark Brown int bclk; 85a91eb199SMark Brown int fs; 86a91eb199SMark Brown 87a91eb199SMark Brown /* DC servo configuration - cached offset values */ 88a91eb199SMark Brown int dcs_state[WM8904_NUM_DCS_CHANNELS]; 89a91eb199SMark Brown }; 90a91eb199SMark Brown 91*84d0d831SMark Brown static const struct reg_default wm8904_reg_defaults[] = { 92*84d0d831SMark Brown { 4, 0x0018 }, /* R4 - Bias Control 0 */ 93*84d0d831SMark Brown { 5, 0x0000 }, /* R5 - VMID Control 0 */ 94*84d0d831SMark Brown { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */ 95*84d0d831SMark Brown { 7, 0x0000 }, /* R7 - Mic Bias Control 1 */ 96*84d0d831SMark Brown { 8, 0x0001 }, /* R8 - Analogue DAC 0 */ 97*84d0d831SMark Brown { 9, 0x9696 }, /* R9 - mic Filter Control */ 98*84d0d831SMark Brown { 10, 0x0001 }, /* R10 - Analogue ADC 0 */ 99*84d0d831SMark Brown { 12, 0x0000 }, /* R12 - Power Management 0 */ 100*84d0d831SMark Brown { 14, 0x0000 }, /* R14 - Power Management 2 */ 101*84d0d831SMark Brown { 15, 0x0000 }, /* R15 - Power Management 3 */ 102*84d0d831SMark Brown { 18, 0x0000 }, /* R18 - Power Management 6 */ 103*84d0d831SMark Brown { 19, 0x945E }, /* R20 - Clock Rates 0 */ 104*84d0d831SMark Brown { 21, 0x0C05 }, /* R21 - Clock Rates 1 */ 105*84d0d831SMark Brown { 22, 0x0006 }, /* R22 - Clock Rates 2 */ 106*84d0d831SMark Brown { 24, 0x0050 }, /* R24 - Audio Interface 0 */ 107*84d0d831SMark Brown { 25, 0x000A }, /* R25 - Audio Interface 1 */ 108*84d0d831SMark Brown { 26, 0x00E4 }, /* R26 - Audio Interface 2 */ 109*84d0d831SMark Brown { 27, 0x0040 }, /* R27 - Audio Interface 3 */ 110*84d0d831SMark Brown { 30, 0x00C0 }, /* R30 - DAC Digital Volume Left */ 111*84d0d831SMark Brown { 31, 0x00C0 }, /* R31 - DAC Digital Volume Right */ 112*84d0d831SMark Brown { 32, 0x0000 }, /* R32 - DAC Digital 0 */ 113*84d0d831SMark Brown { 33, 0x0008 }, /* R33 - DAC Digital 1 */ 114*84d0d831SMark Brown { 36, 0x00C0 }, /* R36 - ADC Digital Volume Left */ 115*84d0d831SMark Brown { 37, 0x00C0 }, /* R37 - ADC Digital Volume Right */ 116*84d0d831SMark Brown { 38, 0x0010 }, /* R38 - ADC Digital 0 */ 117*84d0d831SMark Brown { 39, 0x0000 }, /* R39 - Digital Microphone 0 */ 118*84d0d831SMark Brown { 40, 0x01AF }, /* R40 - DRC 0 */ 119*84d0d831SMark Brown { 41, 0x3248 }, /* R41 - DRC 1 */ 120*84d0d831SMark Brown { 42, 0x0000 }, /* R42 - DRC 2 */ 121*84d0d831SMark Brown { 43, 0x0000 }, /* R43 - DRC 3 */ 122*84d0d831SMark Brown { 44, 0x0085 }, /* R44 - Analogue Left Input 0 */ 123*84d0d831SMark Brown { 45, 0x0085 }, /* R45 - Analogue Right Input 0 */ 124*84d0d831SMark Brown { 46, 0x0044 }, /* R46 - Analogue Left Input 1 */ 125*84d0d831SMark Brown { 47, 0x0044 }, /* R47 - Analogue Right Input 1 */ 126*84d0d831SMark Brown { 57, 0x002D }, /* R57 - Analogue OUT1 Left */ 127*84d0d831SMark Brown { 58, 0x002D }, /* R58 - Analogue OUT1 Right */ 128*84d0d831SMark Brown { 59, 0x0039 }, /* R59 - Analogue OUT2 Left */ 129*84d0d831SMark Brown { 60, 0x0039 }, /* R60 - Analogue OUT2 Right */ 130*84d0d831SMark Brown { 61, 0x0000 }, /* R61 - Analogue OUT12 ZC */ 131*84d0d831SMark Brown { 67, 0x0000 }, /* R67 - DC Servo 0 */ 132*84d0d831SMark Brown { 69, 0xAAAA }, /* R69 - DC Servo 2 */ 133*84d0d831SMark Brown { 71, 0xAAAA }, /* R71 - DC Servo 4 */ 134*84d0d831SMark Brown { 72, 0xAAAA }, /* R72 - DC Servo 5 */ 135*84d0d831SMark Brown { 90, 0x0000 }, /* R90 - Analogue HP 0 */ 136*84d0d831SMark Brown { 94, 0x0000 }, /* R94 - Analogue Lineout 0 */ 137*84d0d831SMark Brown { 98, 0x0000 }, /* R98 - Charge Pump 0 */ 138*84d0d831SMark Brown { 104, 0x0004 }, /* R104 - Class W 0 */ 139*84d0d831SMark Brown { 108, 0x0000 }, /* R108 - Write Sequencer 0 */ 140*84d0d831SMark Brown { 109, 0x0000 }, /* R109 - Write Sequencer 1 */ 141*84d0d831SMark Brown { 110, 0x0000 }, /* R110 - Write Sequencer 2 */ 142*84d0d831SMark Brown { 111, 0x0000 }, /* R111 - Write Sequencer 3 */ 143*84d0d831SMark Brown { 112, 0x0000 }, /* R112 - Write Sequencer 4 */ 144*84d0d831SMark Brown { 116, 0x0000 }, /* R116 - FLL Control 1 */ 145*84d0d831SMark Brown { 117, 0x0007 }, /* R117 - FLL Control 2 */ 146*84d0d831SMark Brown { 118, 0x0000 }, /* R118 - FLL Control 3 */ 147*84d0d831SMark Brown { 119, 0x2EE0 }, /* R119 - FLL Control 4 */ 148*84d0d831SMark Brown { 120, 0x0004 }, /* R120 - FLL Control 5 */ 149*84d0d831SMark Brown { 121, 0x0014 }, /* R121 - GPIO Control 1 */ 150*84d0d831SMark Brown { 122, 0x0010 }, /* R122 - GPIO Control 2 */ 151*84d0d831SMark Brown { 123, 0x0010 }, /* R123 - GPIO Control 3 */ 152*84d0d831SMark Brown { 124, 0x0000 }, /* R124 - GPIO Control 4 */ 153*84d0d831SMark Brown { 126, 0x0000 }, /* R126 - Digital Pulls */ 154*84d0d831SMark Brown { 128, 0xFFFF }, /* R128 - Interrupt Status Mask */ 155*84d0d831SMark Brown { 129, 0x0000 }, /* R129 - Interrupt Polarity */ 156*84d0d831SMark Brown { 130, 0x0000 }, /* R130 - Interrupt Debounce */ 157*84d0d831SMark Brown { 134, 0x0000 }, /* R134 - EQ1 */ 158*84d0d831SMark Brown { 135, 0x000C }, /* R135 - EQ2 */ 159*84d0d831SMark Brown { 136, 0x000C }, /* R136 - EQ3 */ 160*84d0d831SMark Brown { 137, 0x000C }, /* R137 - EQ4 */ 161*84d0d831SMark Brown { 138, 0x000C }, /* R138 - EQ5 */ 162*84d0d831SMark Brown { 139, 0x000C }, /* R139 - EQ6 */ 163*84d0d831SMark Brown { 140, 0x0FCA }, /* R140 - EQ7 */ 164*84d0d831SMark Brown { 141, 0x0400 }, /* R141 - EQ8 */ 165*84d0d831SMark Brown { 142, 0x00D8 }, /* R142 - EQ9 */ 166*84d0d831SMark Brown { 143, 0x1EB5 }, /* R143 - EQ10 */ 167*84d0d831SMark Brown { 144, 0xF145 }, /* R144 - EQ11 */ 168*84d0d831SMark Brown { 145, 0x0B75 }, /* R145 - EQ12 */ 169*84d0d831SMark Brown { 146, 0x01C5 }, /* R146 - EQ13 */ 170*84d0d831SMark Brown { 147, 0x1C58 }, /* R147 - EQ14 */ 171*84d0d831SMark Brown { 148, 0xF373 }, /* R148 - EQ15 */ 172*84d0d831SMark Brown { 149, 0x0A54 }, /* R149 - EQ16 */ 173*84d0d831SMark Brown { 150, 0x0558 }, /* R150 - EQ17 */ 174*84d0d831SMark Brown { 151, 0x168E }, /* R151 - EQ18 */ 175*84d0d831SMark Brown { 152, 0xF829 }, /* R152 - EQ19 */ 176*84d0d831SMark Brown { 153, 0x07AD }, /* R153 - EQ20 */ 177*84d0d831SMark Brown { 154, 0x1103 }, /* R154 - EQ21 */ 178*84d0d831SMark Brown { 155, 0x0564 }, /* R155 - EQ22 */ 179*84d0d831SMark Brown { 156, 0x0559 }, /* R156 - EQ23 */ 180*84d0d831SMark Brown { 157, 0x4000 }, /* R157 - EQ24 */ 181*84d0d831SMark Brown { 161, 0x0000 }, /* R161 - Control Interface Test 1 */ 182*84d0d831SMark Brown { 204, 0x0000 }, /* R204 - Analogue Output Bias 0 */ 183*84d0d831SMark Brown { 247, 0x0000 }, /* R247 - FLL NCO Test 0 */ 184*84d0d831SMark Brown { 248, 0x0019 }, /* R248 - FLL NCO Test 1 */ 185a91eb199SMark Brown }; 186a91eb199SMark Brown 187*84d0d831SMark Brown static bool wm8904_volatile_register(struct device *dev, unsigned int reg) 188a91eb199SMark Brown { 189*84d0d831SMark Brown switch (reg) { 190*84d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 191*84d0d831SMark Brown case WM8904_REVISION: 192*84d0d831SMark Brown case WM8904_DC_SERVO_1: 193*84d0d831SMark Brown case WM8904_DC_SERVO_6: 194*84d0d831SMark Brown case WM8904_DC_SERVO_7: 195*84d0d831SMark Brown case WM8904_DC_SERVO_8: 196*84d0d831SMark Brown case WM8904_DC_SERVO_9: 197*84d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 198*84d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 199*84d0d831SMark Brown return true; 200*84d0d831SMark Brown default: 201*84d0d831SMark Brown return false; 202*84d0d831SMark Brown } 203*84d0d831SMark Brown } 204*84d0d831SMark Brown 205*84d0d831SMark Brown static bool wm8904_readable_register(struct device *dev, unsigned int reg) 206*84d0d831SMark Brown { 207*84d0d831SMark Brown switch (reg) { 208*84d0d831SMark Brown case WM8904_SW_RESET_AND_ID: 209*84d0d831SMark Brown case WM8904_REVISION: 210*84d0d831SMark Brown case WM8904_BIAS_CONTROL_0: 211*84d0d831SMark Brown case WM8904_VMID_CONTROL_0: 212*84d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_0: 213*84d0d831SMark Brown case WM8904_MIC_BIAS_CONTROL_1: 214*84d0d831SMark Brown case WM8904_ANALOGUE_DAC_0: 215*84d0d831SMark Brown case WM8904_MIC_FILTER_CONTROL: 216*84d0d831SMark Brown case WM8904_ANALOGUE_ADC_0: 217*84d0d831SMark Brown case WM8904_POWER_MANAGEMENT_0: 218*84d0d831SMark Brown case WM8904_POWER_MANAGEMENT_2: 219*84d0d831SMark Brown case WM8904_POWER_MANAGEMENT_3: 220*84d0d831SMark Brown case WM8904_POWER_MANAGEMENT_6: 221*84d0d831SMark Brown case WM8904_CLOCK_RATES_0: 222*84d0d831SMark Brown case WM8904_CLOCK_RATES_1: 223*84d0d831SMark Brown case WM8904_CLOCK_RATES_2: 224*84d0d831SMark Brown case WM8904_AUDIO_INTERFACE_0: 225*84d0d831SMark Brown case WM8904_AUDIO_INTERFACE_1: 226*84d0d831SMark Brown case WM8904_AUDIO_INTERFACE_2: 227*84d0d831SMark Brown case WM8904_AUDIO_INTERFACE_3: 228*84d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_LEFT: 229*84d0d831SMark Brown case WM8904_DAC_DIGITAL_VOLUME_RIGHT: 230*84d0d831SMark Brown case WM8904_DAC_DIGITAL_0: 231*84d0d831SMark Brown case WM8904_DAC_DIGITAL_1: 232*84d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_LEFT: 233*84d0d831SMark Brown case WM8904_ADC_DIGITAL_VOLUME_RIGHT: 234*84d0d831SMark Brown case WM8904_ADC_DIGITAL_0: 235*84d0d831SMark Brown case WM8904_DIGITAL_MICROPHONE_0: 236*84d0d831SMark Brown case WM8904_DRC_0: 237*84d0d831SMark Brown case WM8904_DRC_1: 238*84d0d831SMark Brown case WM8904_DRC_2: 239*84d0d831SMark Brown case WM8904_DRC_3: 240*84d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_0: 241*84d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_0: 242*84d0d831SMark Brown case WM8904_ANALOGUE_LEFT_INPUT_1: 243*84d0d831SMark Brown case WM8904_ANALOGUE_RIGHT_INPUT_1: 244*84d0d831SMark Brown case WM8904_ANALOGUE_OUT1_LEFT: 245*84d0d831SMark Brown case WM8904_ANALOGUE_OUT1_RIGHT: 246*84d0d831SMark Brown case WM8904_ANALOGUE_OUT2_LEFT: 247*84d0d831SMark Brown case WM8904_ANALOGUE_OUT2_RIGHT: 248*84d0d831SMark Brown case WM8904_ANALOGUE_OUT12_ZC: 249*84d0d831SMark Brown case WM8904_DC_SERVO_0: 250*84d0d831SMark Brown case WM8904_DC_SERVO_1: 251*84d0d831SMark Brown case WM8904_DC_SERVO_2: 252*84d0d831SMark Brown case WM8904_DC_SERVO_4: 253*84d0d831SMark Brown case WM8904_DC_SERVO_5: 254*84d0d831SMark Brown case WM8904_DC_SERVO_6: 255*84d0d831SMark Brown case WM8904_DC_SERVO_7: 256*84d0d831SMark Brown case WM8904_DC_SERVO_8: 257*84d0d831SMark Brown case WM8904_DC_SERVO_9: 258*84d0d831SMark Brown case WM8904_DC_SERVO_READBACK_0: 259*84d0d831SMark Brown case WM8904_ANALOGUE_HP_0: 260*84d0d831SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 261*84d0d831SMark Brown case WM8904_CHARGE_PUMP_0: 262*84d0d831SMark Brown case WM8904_CLASS_W_0: 263*84d0d831SMark Brown case WM8904_WRITE_SEQUENCER_0: 264*84d0d831SMark Brown case WM8904_WRITE_SEQUENCER_1: 265*84d0d831SMark Brown case WM8904_WRITE_SEQUENCER_2: 266*84d0d831SMark Brown case WM8904_WRITE_SEQUENCER_3: 267*84d0d831SMark Brown case WM8904_WRITE_SEQUENCER_4: 268*84d0d831SMark Brown case WM8904_FLL_CONTROL_1: 269*84d0d831SMark Brown case WM8904_FLL_CONTROL_2: 270*84d0d831SMark Brown case WM8904_FLL_CONTROL_3: 271*84d0d831SMark Brown case WM8904_FLL_CONTROL_4: 272*84d0d831SMark Brown case WM8904_FLL_CONTROL_5: 273*84d0d831SMark Brown case WM8904_GPIO_CONTROL_1: 274*84d0d831SMark Brown case WM8904_GPIO_CONTROL_2: 275*84d0d831SMark Brown case WM8904_GPIO_CONTROL_3: 276*84d0d831SMark Brown case WM8904_GPIO_CONTROL_4: 277*84d0d831SMark Brown case WM8904_DIGITAL_PULLS: 278*84d0d831SMark Brown case WM8904_INTERRUPT_STATUS: 279*84d0d831SMark Brown case WM8904_INTERRUPT_STATUS_MASK: 280*84d0d831SMark Brown case WM8904_INTERRUPT_POLARITY: 281*84d0d831SMark Brown case WM8904_INTERRUPT_DEBOUNCE: 282*84d0d831SMark Brown case WM8904_EQ1: 283*84d0d831SMark Brown case WM8904_EQ2: 284*84d0d831SMark Brown case WM8904_EQ3: 285*84d0d831SMark Brown case WM8904_EQ4: 286*84d0d831SMark Brown case WM8904_EQ5: 287*84d0d831SMark Brown case WM8904_EQ6: 288*84d0d831SMark Brown case WM8904_EQ7: 289*84d0d831SMark Brown case WM8904_EQ8: 290*84d0d831SMark Brown case WM8904_EQ9: 291*84d0d831SMark Brown case WM8904_EQ10: 292*84d0d831SMark Brown case WM8904_EQ11: 293*84d0d831SMark Brown case WM8904_EQ12: 294*84d0d831SMark Brown case WM8904_EQ13: 295*84d0d831SMark Brown case WM8904_EQ14: 296*84d0d831SMark Brown case WM8904_EQ15: 297*84d0d831SMark Brown case WM8904_EQ16: 298*84d0d831SMark Brown case WM8904_EQ17: 299*84d0d831SMark Brown case WM8904_EQ18: 300*84d0d831SMark Brown case WM8904_EQ19: 301*84d0d831SMark Brown case WM8904_EQ20: 302*84d0d831SMark Brown case WM8904_EQ21: 303*84d0d831SMark Brown case WM8904_EQ22: 304*84d0d831SMark Brown case WM8904_EQ23: 305*84d0d831SMark Brown case WM8904_EQ24: 306*84d0d831SMark Brown case WM8904_CONTROL_INTERFACE_TEST_1: 307*84d0d831SMark Brown case WM8904_ANALOGUE_OUTPUT_BIAS_0: 308*84d0d831SMark Brown case WM8904_FLL_NCO_TEST_0: 309*84d0d831SMark Brown case WM8904_FLL_NCO_TEST_1: 310*84d0d831SMark Brown return true; 311*84d0d831SMark Brown default: 312*84d0d831SMark Brown return true; 313*84d0d831SMark Brown } 314a91eb199SMark Brown } 315a91eb199SMark Brown 316a91eb199SMark Brown static int wm8904_reset(struct snd_soc_codec *codec) 317a91eb199SMark Brown { 318a91eb199SMark Brown return snd_soc_write(codec, WM8904_SW_RESET_AND_ID, 0); 319a91eb199SMark Brown } 320a91eb199SMark Brown 321a91eb199SMark Brown static int wm8904_configure_clocking(struct snd_soc_codec *codec) 322a91eb199SMark Brown { 323b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 324a91eb199SMark Brown unsigned int clock0, clock2, rate; 325a91eb199SMark Brown 326a91eb199SMark Brown /* Gate the clock while we're updating to avoid misclocking */ 327a91eb199SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 328a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 329a91eb199SMark Brown WM8904_SYSCLK_SRC, 0); 330a91eb199SMark Brown 331a91eb199SMark Brown /* This should be done on init() for bypass paths */ 332a91eb199SMark Brown switch (wm8904->sysclk_src) { 333a91eb199SMark Brown case WM8904_CLK_MCLK: 334a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate); 335a91eb199SMark Brown 336a91eb199SMark Brown clock2 &= ~WM8904_SYSCLK_SRC; 337a91eb199SMark Brown rate = wm8904->mclk_rate; 338a91eb199SMark Brown 339a91eb199SMark Brown /* Ensure the FLL is stopped */ 340a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 341a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 342a91eb199SMark Brown break; 343a91eb199SMark Brown 344a91eb199SMark Brown case WM8904_CLK_FLL: 345a91eb199SMark Brown dev_dbg(codec->dev, "Using %dHz FLL clock\n", 346a91eb199SMark Brown wm8904->fll_fout); 347a91eb199SMark Brown 348a91eb199SMark Brown clock2 |= WM8904_SYSCLK_SRC; 349a91eb199SMark Brown rate = wm8904->fll_fout; 350a91eb199SMark Brown break; 351a91eb199SMark Brown 352a91eb199SMark Brown default: 353a91eb199SMark Brown dev_err(codec->dev, "System clock not configured\n"); 354a91eb199SMark Brown return -EINVAL; 355a91eb199SMark Brown } 356a91eb199SMark Brown 357a91eb199SMark Brown /* SYSCLK shouldn't be over 13.5MHz */ 358a91eb199SMark Brown if (rate > 13500000) { 359a91eb199SMark Brown clock0 = WM8904_MCLK_DIV; 360a91eb199SMark Brown wm8904->sysclk_rate = rate / 2; 361a91eb199SMark Brown } else { 362a91eb199SMark Brown clock0 = 0; 363a91eb199SMark Brown wm8904->sysclk_rate = rate; 364a91eb199SMark Brown } 365a91eb199SMark Brown 366a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV, 367a91eb199SMark Brown clock0); 368a91eb199SMark Brown 369a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 370a91eb199SMark Brown WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2); 371a91eb199SMark Brown 372a91eb199SMark Brown dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate); 373a91eb199SMark Brown 374a91eb199SMark Brown return 0; 375a91eb199SMark Brown } 376a91eb199SMark Brown 377a91eb199SMark Brown static void wm8904_set_drc(struct snd_soc_codec *codec) 378a91eb199SMark Brown { 379b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 380a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 381a91eb199SMark Brown int save, i; 382a91eb199SMark Brown 383a91eb199SMark Brown /* Save any enables; the configuration should clear them. */ 384a91eb199SMark Brown save = snd_soc_read(codec, WM8904_DRC_0); 385a91eb199SMark Brown 386a91eb199SMark Brown for (i = 0; i < WM8904_DRC_REGS; i++) 387a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff, 388a91eb199SMark Brown pdata->drc_cfgs[wm8904->drc_cfg].regs[i]); 389a91eb199SMark Brown 390a91eb199SMark Brown /* Reenable the DRC */ 391a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DRC_0, 392a91eb199SMark Brown WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save); 393a91eb199SMark Brown } 394a91eb199SMark Brown 395a91eb199SMark Brown static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol, 396a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 397a91eb199SMark Brown { 398a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 399b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 400a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 401a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 402a91eb199SMark Brown 403a91eb199SMark Brown if (value >= pdata->num_drc_cfgs) 404a91eb199SMark Brown return -EINVAL; 405a91eb199SMark Brown 406a91eb199SMark Brown wm8904->drc_cfg = value; 407a91eb199SMark Brown 408a91eb199SMark Brown wm8904_set_drc(codec); 409a91eb199SMark Brown 410a91eb199SMark Brown return 0; 411a91eb199SMark Brown } 412a91eb199SMark Brown 413a91eb199SMark Brown static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol, 414a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 415a91eb199SMark Brown { 416a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 417b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 418a91eb199SMark Brown 419a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->drc_cfg; 420a91eb199SMark Brown 421a91eb199SMark Brown return 0; 422a91eb199SMark Brown } 423a91eb199SMark Brown 424a91eb199SMark Brown static void wm8904_set_retune_mobile(struct snd_soc_codec *codec) 425a91eb199SMark Brown { 426b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 427a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 428a91eb199SMark Brown int best, best_val, save, i, cfg; 429a91eb199SMark Brown 430a91eb199SMark Brown if (!pdata || !wm8904->num_retune_mobile_texts) 431a91eb199SMark Brown return; 432a91eb199SMark Brown 433a91eb199SMark Brown /* Find the version of the currently selected configuration 434a91eb199SMark Brown * with the nearest sample rate. */ 435a91eb199SMark Brown cfg = wm8904->retune_mobile_cfg; 436a91eb199SMark Brown best = 0; 437a91eb199SMark Brown best_val = INT_MAX; 438a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 439a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 440a91eb199SMark Brown wm8904->retune_mobile_texts[cfg]) == 0 && 441a91eb199SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 442a91eb199SMark Brown - wm8904->fs) < best_val) { 443a91eb199SMark Brown best = i; 444a91eb199SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 445a91eb199SMark Brown - wm8904->fs); 446a91eb199SMark Brown } 447a91eb199SMark Brown } 448a91eb199SMark Brown 449a91eb199SMark Brown dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n", 450a91eb199SMark Brown pdata->retune_mobile_cfgs[best].name, 451a91eb199SMark Brown pdata->retune_mobile_cfgs[best].rate, 452a91eb199SMark Brown wm8904->fs); 453a91eb199SMark Brown 454a91eb199SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 455a91eb199SMark Brown * current configuration. 456a91eb199SMark Brown */ 457a91eb199SMark Brown save = snd_soc_read(codec, WM8904_EQ1); 458a91eb199SMark Brown 459a91eb199SMark Brown for (i = 0; i < WM8904_EQ_REGS; i++) 460a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff, 461a91eb199SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 462a91eb199SMark Brown 463a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save); 464a91eb199SMark Brown } 465a91eb199SMark Brown 466a91eb199SMark Brown static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 467a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 468a91eb199SMark Brown { 469a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 470b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 471a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 472a91eb199SMark Brown int value = ucontrol->value.integer.value[0]; 473a91eb199SMark Brown 474a91eb199SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 475a91eb199SMark Brown return -EINVAL; 476a91eb199SMark Brown 477a91eb199SMark Brown wm8904->retune_mobile_cfg = value; 478a91eb199SMark Brown 479a91eb199SMark Brown wm8904_set_retune_mobile(codec); 480a91eb199SMark Brown 481a91eb199SMark Brown return 0; 482a91eb199SMark Brown } 483a91eb199SMark Brown 484a91eb199SMark Brown static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 485a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 486a91eb199SMark Brown { 487a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 488b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 489a91eb199SMark Brown 490a91eb199SMark Brown ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg; 491a91eb199SMark Brown 492a91eb199SMark Brown return 0; 493a91eb199SMark Brown } 494a91eb199SMark Brown 495a91eb199SMark Brown static int deemph_settings[] = { 0, 32000, 44100, 48000 }; 496a91eb199SMark Brown 497a91eb199SMark Brown static int wm8904_set_deemph(struct snd_soc_codec *codec) 498a91eb199SMark Brown { 499b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 500a91eb199SMark Brown int val, i, best; 501a91eb199SMark Brown 502a91eb199SMark Brown /* If we're using deemphasis select the nearest available sample 503a91eb199SMark Brown * rate. 504a91eb199SMark Brown */ 505a91eb199SMark Brown if (wm8904->deemph) { 506a91eb199SMark Brown best = 1; 507a91eb199SMark Brown for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 508a91eb199SMark Brown if (abs(deemph_settings[i] - wm8904->fs) < 509a91eb199SMark Brown abs(deemph_settings[best] - wm8904->fs)) 510a91eb199SMark Brown best = i; 511a91eb199SMark Brown } 512a91eb199SMark Brown 513a91eb199SMark Brown val = best << WM8904_DEEMPH_SHIFT; 514a91eb199SMark Brown } else { 515a91eb199SMark Brown val = 0; 516a91eb199SMark Brown } 517a91eb199SMark Brown 518a91eb199SMark Brown dev_dbg(codec->dev, "Set deemphasis %d\n", val); 519a91eb199SMark Brown 520a91eb199SMark Brown return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 521a91eb199SMark Brown WM8904_DEEMPH_MASK, val); 522a91eb199SMark Brown } 523a91eb199SMark Brown 524a91eb199SMark Brown static int wm8904_get_deemph(struct snd_kcontrol *kcontrol, 525a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 526a91eb199SMark Brown { 527a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 528b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 529a91eb199SMark Brown 5303f343f85SDmitry Artamonow ucontrol->value.enumerated.item[0] = wm8904->deemph; 5313f343f85SDmitry Artamonow return 0; 532a91eb199SMark Brown } 533a91eb199SMark Brown 534a91eb199SMark Brown static int wm8904_put_deemph(struct snd_kcontrol *kcontrol, 535a91eb199SMark Brown struct snd_ctl_elem_value *ucontrol) 536a91eb199SMark Brown { 537a91eb199SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 538b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 539a91eb199SMark Brown int deemph = ucontrol->value.enumerated.item[0]; 540a91eb199SMark Brown 541a91eb199SMark Brown if (deemph > 1) 542a91eb199SMark Brown return -EINVAL; 543a91eb199SMark Brown 544a91eb199SMark Brown wm8904->deemph = deemph; 545a91eb199SMark Brown 546a91eb199SMark Brown return wm8904_set_deemph(codec); 547a91eb199SMark Brown } 548a91eb199SMark Brown 549a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0); 550a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 551a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 552a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); 553a91eb199SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 554a91eb199SMark Brown 555a91eb199SMark Brown static const char *input_mode_text[] = { 556a91eb199SMark Brown "Single-Ended", "Differential Line", "Differential Mic" 557a91eb199SMark Brown }; 558a91eb199SMark Brown 559a91eb199SMark Brown static const struct soc_enum lin_mode = 560a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text); 561a91eb199SMark Brown 562a91eb199SMark Brown static const struct soc_enum rin_mode = 563a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text); 564a91eb199SMark Brown 565a91eb199SMark Brown static const char *hpf_mode_text[] = { 566a91eb199SMark Brown "Hi-fi", "Voice 1", "Voice 2", "Voice 3" 567a91eb199SMark Brown }; 568a91eb199SMark Brown 569a91eb199SMark Brown static const struct soc_enum hpf_mode = 570a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ADC_DIGITAL_0, 5, 4, hpf_mode_text); 571a91eb199SMark Brown 572a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { 573a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, 574a91eb199SMark Brown WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), 575a91eb199SMark Brown 576a91eb199SMark Brown SOC_ENUM("Left Caputure Mode", lin_mode), 577a91eb199SMark Brown SOC_ENUM("Right Capture Mode", rin_mode), 578a91eb199SMark Brown 579a91eb199SMark Brown /* No TLV since it depends on mode */ 580a91eb199SMark Brown SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, 581a91eb199SMark Brown WM8904_ANALOGUE_RIGHT_INPUT_0, 0, 31, 0), 582a91eb199SMark Brown SOC_DOUBLE_R("Capture Switch", WM8904_ANALOGUE_LEFT_INPUT_0, 5835a7c5f26SHong Xu WM8904_ANALOGUE_RIGHT_INPUT_0, 7, 1, 1), 584a91eb199SMark Brown 585a91eb199SMark Brown SOC_SINGLE("High Pass Filter Switch", WM8904_ADC_DIGITAL_0, 4, 1, 0), 586a91eb199SMark Brown SOC_ENUM("High Pass Filter Mode", hpf_mode), 587a91eb199SMark Brown 588a91eb199SMark Brown SOC_SINGLE("ADC 128x OSR Switch", WM8904_ANALOGUE_ADC_0, 0, 1, 0), 589a91eb199SMark Brown }; 590a91eb199SMark Brown 591a91eb199SMark Brown static const char *drc_path_text[] = { 592a91eb199SMark Brown "ADC", "DAC" 593a91eb199SMark Brown }; 594a91eb199SMark Brown 595a91eb199SMark Brown static const struct soc_enum drc_path = 596a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DRC_0, 14, 2, drc_path_text); 597a91eb199SMark Brown 598a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_dac_snd_controls[] = { 599a91eb199SMark Brown SOC_SINGLE_TLV("Digital Playback Boost Volume", 600a91eb199SMark Brown WM8904_AUDIO_INTERFACE_0, 9, 3, 0, dac_boost_tlv), 601a91eb199SMark Brown SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8904_DAC_DIGITAL_VOLUME_LEFT, 602a91eb199SMark Brown WM8904_DAC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv), 603a91eb199SMark Brown 604a91eb199SMark Brown SOC_DOUBLE_R_TLV("Headphone Volume", WM8904_ANALOGUE_OUT1_LEFT, 605a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 0, 63, 0, out_tlv), 606a91eb199SMark Brown SOC_DOUBLE_R("Headphone Switch", WM8904_ANALOGUE_OUT1_LEFT, 607a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 8, 1, 1), 608a91eb199SMark Brown SOC_DOUBLE_R("Headphone ZC Switch", WM8904_ANALOGUE_OUT1_LEFT, 609a91eb199SMark Brown WM8904_ANALOGUE_OUT1_RIGHT, 6, 1, 0), 610a91eb199SMark Brown 611a91eb199SMark Brown SOC_DOUBLE_R_TLV("Line Output Volume", WM8904_ANALOGUE_OUT2_LEFT, 612a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 0, 63, 0, out_tlv), 613a91eb199SMark Brown SOC_DOUBLE_R("Line Output Switch", WM8904_ANALOGUE_OUT2_LEFT, 614a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 8, 1, 1), 615a91eb199SMark Brown SOC_DOUBLE_R("Line Output ZC Switch", WM8904_ANALOGUE_OUT2_LEFT, 616a91eb199SMark Brown WM8904_ANALOGUE_OUT2_RIGHT, 6, 1, 0), 617a91eb199SMark Brown 618a91eb199SMark Brown SOC_SINGLE("EQ Switch", WM8904_EQ1, 0, 1, 0), 619a91eb199SMark Brown SOC_SINGLE("DRC Switch", WM8904_DRC_0, 15, 1, 0), 620a91eb199SMark Brown SOC_ENUM("DRC Path", drc_path), 621a91eb199SMark Brown SOC_SINGLE("DAC OSRx2 Switch", WM8904_DAC_DIGITAL_1, 6, 1, 0), 622a91eb199SMark Brown SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 623a91eb199SMark Brown wm8904_get_deemph, wm8904_put_deemph), 624a91eb199SMark Brown }; 625a91eb199SMark Brown 626a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_snd_controls[] = { 627a91eb199SMark Brown SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8904_DAC_DIGITAL_0, 4, 8, 15, 0, 628a91eb199SMark Brown sidetone_tlv), 629a91eb199SMark Brown }; 630a91eb199SMark Brown 631a91eb199SMark Brown static const struct snd_kcontrol_new wm8904_eq_controls[] = { 632a91eb199SMark Brown SOC_SINGLE_TLV("EQ1 Volume", WM8904_EQ2, 0, 24, 0, eq_tlv), 633a91eb199SMark Brown SOC_SINGLE_TLV("EQ2 Volume", WM8904_EQ3, 0, 24, 0, eq_tlv), 634a91eb199SMark Brown SOC_SINGLE_TLV("EQ3 Volume", WM8904_EQ4, 0, 24, 0, eq_tlv), 635a91eb199SMark Brown SOC_SINGLE_TLV("EQ4 Volume", WM8904_EQ5, 0, 24, 0, eq_tlv), 636a91eb199SMark Brown SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), 637a91eb199SMark Brown }; 638a91eb199SMark Brown 639a91eb199SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 640a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 641a91eb199SMark Brown { 642a91eb199SMark Brown BUG_ON(event != SND_SOC_DAPM_POST_PMU); 643a91eb199SMark Brown 644a91eb199SMark Brown /* Maximum startup time */ 645a91eb199SMark Brown udelay(500); 646a91eb199SMark Brown 647a91eb199SMark Brown return 0; 648a91eb199SMark Brown } 649a91eb199SMark Brown 650a91eb199SMark Brown static int sysclk_event(struct snd_soc_dapm_widget *w, 651a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 652a91eb199SMark Brown { 653a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 654b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 655a91eb199SMark Brown 656a91eb199SMark Brown switch (event) { 657a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMU: 658a91eb199SMark Brown /* If we're using the FLL then we only start it when 659a91eb199SMark Brown * required; we assume that the configuration has been 660a91eb199SMark Brown * done previously and all we need to do is kick it 661a91eb199SMark Brown * off. 662a91eb199SMark Brown */ 663a91eb199SMark Brown switch (wm8904->sysclk_src) { 664a91eb199SMark Brown case WM8904_CLK_FLL: 665a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 666a91eb199SMark Brown WM8904_FLL_OSC_ENA, 667a91eb199SMark Brown WM8904_FLL_OSC_ENA); 668a91eb199SMark Brown 669a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 670a91eb199SMark Brown WM8904_FLL_ENA, 671a91eb199SMark Brown WM8904_FLL_ENA); 672a91eb199SMark Brown break; 673a91eb199SMark Brown 674a91eb199SMark Brown default: 675a91eb199SMark Brown break; 676a91eb199SMark Brown } 677a91eb199SMark Brown break; 678a91eb199SMark Brown 679a91eb199SMark Brown case SND_SOC_DAPM_POST_PMD: 680a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 681a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 682a91eb199SMark Brown break; 683a91eb199SMark Brown } 684a91eb199SMark Brown 685a91eb199SMark Brown return 0; 686a91eb199SMark Brown } 687a91eb199SMark Brown 688a91eb199SMark Brown static int out_pga_event(struct snd_soc_dapm_widget *w, 689a91eb199SMark Brown struct snd_kcontrol *kcontrol, int event) 690a91eb199SMark Brown { 691a91eb199SMark Brown struct snd_soc_codec *codec = w->codec; 692b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 693a91eb199SMark Brown int reg, val; 694a91eb199SMark Brown int dcs_mask; 695a91eb199SMark Brown int dcs_l, dcs_r; 696a91eb199SMark Brown int dcs_l_reg, dcs_r_reg; 697a91eb199SMark Brown int timeout; 698e4bc6696SMark Brown int pwr_reg; 699a91eb199SMark Brown 700a91eb199SMark Brown /* This code is shared between HP and LINEOUT; we do all our 701a91eb199SMark Brown * power management in stereo pairs to avoid latency issues so 702a91eb199SMark Brown * we reuse shift to identify which rather than strcmp() the 703a91eb199SMark Brown * name. */ 704a91eb199SMark Brown reg = w->shift; 705a91eb199SMark Brown 706a91eb199SMark Brown switch (reg) { 707a91eb199SMark Brown case WM8904_ANALOGUE_HP_0: 708e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_2; 709a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; 710a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_8; 711a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_9; 712a91eb199SMark Brown dcs_l = 0; 713a91eb199SMark Brown dcs_r = 1; 714a91eb199SMark Brown break; 715a91eb199SMark Brown case WM8904_ANALOGUE_LINEOUT_0: 716e4bc6696SMark Brown pwr_reg = WM8904_POWER_MANAGEMENT_3; 717a91eb199SMark Brown dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; 718a91eb199SMark Brown dcs_r_reg = WM8904_DC_SERVO_6; 719a91eb199SMark Brown dcs_l_reg = WM8904_DC_SERVO_7; 720a91eb199SMark Brown dcs_l = 2; 721a91eb199SMark Brown dcs_r = 3; 722a91eb199SMark Brown break; 723a91eb199SMark Brown default: 724a91eb199SMark Brown BUG(); 725a91eb199SMark Brown return -EINVAL; 726a91eb199SMark Brown } 727a91eb199SMark Brown 728a91eb199SMark Brown switch (event) { 729e4bc6696SMark Brown case SND_SOC_DAPM_PRE_PMU: 730e4bc6696SMark Brown /* Power on the PGAs */ 731e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 732e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 733e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA); 734e4bc6696SMark Brown 735a91eb199SMark Brown /* Power on the amplifier */ 736a91eb199SMark Brown snd_soc_update_bits(codec, reg, 737a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA, 738a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA); 739a91eb199SMark Brown 740e4bc6696SMark Brown 741a91eb199SMark Brown /* Enable the first stage */ 742a91eb199SMark Brown snd_soc_update_bits(codec, reg, 743a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY, 744a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY); 745a91eb199SMark Brown 746a91eb199SMark Brown /* Power up the DC servo */ 747a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 748a91eb199SMark Brown dcs_mask, dcs_mask); 749a91eb199SMark Brown 750a91eb199SMark Brown /* Either calibrate the DC servo or restore cached state 751a91eb199SMark Brown * if we have that. 752a91eb199SMark Brown */ 753a91eb199SMark Brown if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) { 754a91eb199SMark Brown dev_dbg(codec->dev, "Restoring DC servo state\n"); 755a91eb199SMark Brown 756a91eb199SMark Brown snd_soc_write(codec, dcs_l_reg, 757a91eb199SMark Brown wm8904->dcs_state[dcs_l]); 758a91eb199SMark Brown snd_soc_write(codec, dcs_r_reg, 759a91eb199SMark Brown wm8904->dcs_state[dcs_r]); 760a91eb199SMark Brown 761a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask); 762a91eb199SMark Brown 763a91eb199SMark Brown timeout = 20; 764a91eb199SMark Brown } else { 765a91eb199SMark Brown dev_dbg(codec->dev, "Calibrating DC servo\n"); 766a91eb199SMark Brown 767a91eb199SMark Brown snd_soc_write(codec, WM8904_DC_SERVO_1, 768a91eb199SMark Brown dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT); 769a91eb199SMark Brown 770a91eb199SMark Brown timeout = 500; 771a91eb199SMark Brown } 772a91eb199SMark Brown 773a91eb199SMark Brown /* Wait for DC servo to complete */ 774a91eb199SMark Brown dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; 775a91eb199SMark Brown do { 776a91eb199SMark Brown val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0); 777a91eb199SMark Brown if ((val & dcs_mask) == dcs_mask) 778a91eb199SMark Brown break; 779a91eb199SMark Brown 780a91eb199SMark Brown msleep(1); 781a91eb199SMark Brown } while (--timeout); 782a91eb199SMark Brown 783a91eb199SMark Brown if ((val & dcs_mask) != dcs_mask) 784a91eb199SMark Brown dev_warn(codec->dev, "DC servo timed out\n"); 785a91eb199SMark Brown else 786a91eb199SMark Brown dev_dbg(codec->dev, "DC servo ready\n"); 787a91eb199SMark Brown 788a91eb199SMark Brown /* Enable the output stage */ 789a91eb199SMark Brown snd_soc_update_bits(codec, reg, 790a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 791a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); 792e4bc6696SMark Brown break; 793a91eb199SMark Brown 794e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMU: 795a91eb199SMark Brown /* Unshort the output itself */ 796a91eb199SMark Brown snd_soc_update_bits(codec, reg, 797a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 798a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 799a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 800a91eb199SMark Brown WM8904_HPR_RMV_SHORT); 801a91eb199SMark Brown 802a91eb199SMark Brown break; 803a91eb199SMark Brown 804a91eb199SMark Brown case SND_SOC_DAPM_PRE_PMD: 805a91eb199SMark Brown /* Short the output */ 806a91eb199SMark Brown snd_soc_update_bits(codec, reg, 807a91eb199SMark Brown WM8904_HPL_RMV_SHORT | 808a91eb199SMark Brown WM8904_HPR_RMV_SHORT, 0); 809e4bc6696SMark Brown break; 810a91eb199SMark Brown 811e4bc6696SMark Brown case SND_SOC_DAPM_POST_PMD: 812a91eb199SMark Brown /* Cache the DC servo configuration; this will be 813a91eb199SMark Brown * invalidated if we change the configuration. */ 814a91eb199SMark Brown wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg); 815a91eb199SMark Brown wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg); 816a91eb199SMark Brown 817a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DC_SERVO_0, 818a91eb199SMark Brown dcs_mask, 0); 819a91eb199SMark Brown 820a91eb199SMark Brown /* Disable the amplifier input and output stages */ 821a91eb199SMark Brown snd_soc_update_bits(codec, reg, 822a91eb199SMark Brown WM8904_HPL_ENA | WM8904_HPR_ENA | 823a91eb199SMark Brown WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY | 824a91eb199SMark Brown WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, 825a91eb199SMark Brown 0); 826e4bc6696SMark Brown 827e4bc6696SMark Brown /* PGAs too */ 828e4bc6696SMark Brown snd_soc_update_bits(codec, pwr_reg, 829e4bc6696SMark Brown WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA, 830e4bc6696SMark Brown 0); 831a91eb199SMark Brown break; 832a91eb199SMark Brown } 833a91eb199SMark Brown 834a91eb199SMark Brown return 0; 835a91eb199SMark Brown } 836a91eb199SMark Brown 837a91eb199SMark Brown static const char *lin_text[] = { 838a91eb199SMark Brown "IN1L", "IN2L", "IN3L" 839a91eb199SMark Brown }; 840a91eb199SMark Brown 841a91eb199SMark Brown static const struct soc_enum lin_enum = 842a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 2, 3, lin_text); 843a91eb199SMark Brown 844a91eb199SMark Brown static const struct snd_kcontrol_new lin_mux = 845a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Mux", lin_enum); 846a91eb199SMark Brown 847a91eb199SMark Brown static const struct soc_enum lin_inv_enum = 848a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_LEFT_INPUT_1, 4, 3, lin_text); 849a91eb199SMark Brown 850a91eb199SMark Brown static const struct snd_kcontrol_new lin_inv_mux = 851a91eb199SMark Brown SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); 852a91eb199SMark Brown 853a91eb199SMark Brown static const char *rin_text[] = { 854a91eb199SMark Brown "IN1R", "IN2R", "IN3R" 855a91eb199SMark Brown }; 856a91eb199SMark Brown 857a91eb199SMark Brown static const struct soc_enum rin_enum = 858a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 2, 3, rin_text); 859a91eb199SMark Brown 860a91eb199SMark Brown static const struct snd_kcontrol_new rin_mux = 861a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Mux", rin_enum); 862a91eb199SMark Brown 863a91eb199SMark Brown static const struct soc_enum rin_inv_enum = 864a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_RIGHT_INPUT_1, 4, 3, rin_text); 865a91eb199SMark Brown 866a91eb199SMark Brown static const struct snd_kcontrol_new rin_inv_mux = 867a91eb199SMark Brown SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); 868a91eb199SMark Brown 869a91eb199SMark Brown static const char *aif_text[] = { 870a91eb199SMark Brown "Left", "Right" 871a91eb199SMark Brown }; 872a91eb199SMark Brown 873a91eb199SMark Brown static const struct soc_enum aifoutl_enum = 874a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 7, 2, aif_text); 875a91eb199SMark Brown 876a91eb199SMark Brown static const struct snd_kcontrol_new aifoutl_mux = 877a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum); 878a91eb199SMark Brown 879a91eb199SMark Brown static const struct soc_enum aifoutr_enum = 880a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 6, 2, aif_text); 881a91eb199SMark Brown 882a91eb199SMark Brown static const struct snd_kcontrol_new aifoutr_mux = 883a91eb199SMark Brown SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum); 884a91eb199SMark Brown 885a91eb199SMark Brown static const struct soc_enum aifinl_enum = 886a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 5, 2, aif_text); 887a91eb199SMark Brown 888a91eb199SMark Brown static const struct snd_kcontrol_new aifinl_mux = 889a91eb199SMark Brown SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum); 890a91eb199SMark Brown 891a91eb199SMark Brown static const struct soc_enum aifinr_enum = 892a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_AUDIO_INTERFACE_0, 4, 2, aif_text); 893a91eb199SMark Brown 894a91eb199SMark Brown static const struct snd_kcontrol_new aifinr_mux = 895a91eb199SMark Brown SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum); 896a91eb199SMark Brown 897a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_core_dapm_widgets[] = { 898a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("SYSCLK", WM8904_CLOCK_RATES_2, 2, 0, sysclk_event, 899a91eb199SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 900a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8904_CLOCK_RATES_2, 1, 0, NULL, 0), 901a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("TOCLK", WM8904_CLOCK_RATES_2, 0, 0, NULL, 0), 902a91eb199SMark Brown }; 903a91eb199SMark Brown 904a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_adc_dapm_widgets[] = { 905a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1L"), 906a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN1R"), 907a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2L"), 908a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN2R"), 909a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3L"), 910a91eb199SMark Brown SND_SOC_DAPM_INPUT("IN3R"), 911a91eb199SMark Brown 912dcd658c5SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS", WM8904_MIC_BIAS_CONTROL_0, 0, 0, NULL, 0), 913a91eb199SMark Brown 914a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), 915a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 916a91eb199SMark Brown &lin_inv_mux), 917a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), 918a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, 919a91eb199SMark Brown &rin_inv_mux), 920a91eb199SMark Brown 921a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, 922a91eb199SMark Brown NULL, 0), 923a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Capture PGA", WM8904_POWER_MANAGEMENT_0, 0, 0, 924a91eb199SMark Brown NULL, 0), 925a91eb199SMark Brown 926a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8904_POWER_MANAGEMENT_6, 1, 0), 927a91eb199SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8904_POWER_MANAGEMENT_6, 0, 0), 928a91eb199SMark Brown 929a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux), 930a91eb199SMark Brown SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux), 931a91eb199SMark Brown 932a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), 933a91eb199SMark Brown SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), 934a91eb199SMark Brown }; 935a91eb199SMark Brown 936a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dac_dapm_widgets[] = { 937a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), 938a91eb199SMark Brown SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), 939a91eb199SMark Brown 940a91eb199SMark Brown SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux), 941a91eb199SMark Brown SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux), 942a91eb199SMark Brown 943a91eb199SMark Brown SND_SOC_DAPM_DAC("DACL", NULL, WM8904_POWER_MANAGEMENT_6, 3, 0), 944a91eb199SMark Brown SND_SOC_DAPM_DAC("DACR", NULL, WM8904_POWER_MANAGEMENT_6, 2, 0), 945a91eb199SMark Brown 946a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Charge pump", WM8904_CHARGE_PUMP_0, 0, 0, cp_event, 947a91eb199SMark Brown SND_SOC_DAPM_POST_PMU), 948a91eb199SMark Brown 949e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 950e4bc6696SMark Brown SND_SOC_DAPM_PGA("HPR PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 951a91eb199SMark Brown 952e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINEL PGA", SND_SOC_NOPM, 1, 0, NULL, 0), 953e4bc6696SMark Brown SND_SOC_DAPM_PGA("LINER PGA", SND_SOC_NOPM, 0, 0, NULL, 0), 954a91eb199SMark Brown 955a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Headphone Output", SND_SOC_NOPM, WM8904_ANALOGUE_HP_0, 956a91eb199SMark Brown 0, NULL, 0, out_pga_event, 957e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 958e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 959a91eb199SMark Brown SND_SOC_DAPM_PGA_E("Line Output", SND_SOC_NOPM, WM8904_ANALOGUE_LINEOUT_0, 960a91eb199SMark Brown 0, NULL, 0, out_pga_event, 961e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | 962e4bc6696SMark Brown SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), 963a91eb199SMark Brown 964a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTL"), 965a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("HPOUTR"), 966a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTL"), 967a91eb199SMark Brown SND_SOC_DAPM_OUTPUT("LINEOUTR"), 968a91eb199SMark Brown }; 969a91eb199SMark Brown 970a91eb199SMark Brown static const char *out_mux_text[] = { 971a91eb199SMark Brown "DAC", "Bypass" 972a91eb199SMark Brown }; 973a91eb199SMark Brown 974a91eb199SMark Brown static const struct soc_enum hpl_enum = 975a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 3, 2, out_mux_text); 976a91eb199SMark Brown 977a91eb199SMark Brown static const struct snd_kcontrol_new hpl_mux = 978a91eb199SMark Brown SOC_DAPM_ENUM("HPL Mux", hpl_enum); 979a91eb199SMark Brown 980a91eb199SMark Brown static const struct soc_enum hpr_enum = 981a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 2, 2, out_mux_text); 982a91eb199SMark Brown 983a91eb199SMark Brown static const struct snd_kcontrol_new hpr_mux = 984a91eb199SMark Brown SOC_DAPM_ENUM("HPR Mux", hpr_enum); 985a91eb199SMark Brown 986a91eb199SMark Brown static const struct soc_enum linel_enum = 987a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 1, 2, out_mux_text); 988a91eb199SMark Brown 989a91eb199SMark Brown static const struct snd_kcontrol_new linel_mux = 990a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", linel_enum); 991a91eb199SMark Brown 992a91eb199SMark Brown static const struct soc_enum liner_enum = 993a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_ANALOGUE_OUT12_ZC, 0, 2, out_mux_text); 994a91eb199SMark Brown 995a91eb199SMark Brown static const struct snd_kcontrol_new liner_mux = 996a91eb199SMark Brown SOC_DAPM_ENUM("LINEL Mux", liner_enum); 997a91eb199SMark Brown 998a91eb199SMark Brown static const char *sidetone_text[] = { 999a91eb199SMark Brown "None", "Left", "Right" 1000a91eb199SMark Brown }; 1001a91eb199SMark Brown 1002a91eb199SMark Brown static const struct soc_enum dacl_sidetone_enum = 1003a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 2, 3, sidetone_text); 1004a91eb199SMark Brown 1005a91eb199SMark Brown static const struct snd_kcontrol_new dacl_sidetone_mux = 1006a91eb199SMark Brown SOC_DAPM_ENUM("Left Sidetone Mux", dacl_sidetone_enum); 1007a91eb199SMark Brown 1008a91eb199SMark Brown static const struct soc_enum dacr_sidetone_enum = 1009a91eb199SMark Brown SOC_ENUM_SINGLE(WM8904_DAC_DIGITAL_0, 0, 3, sidetone_text); 1010a91eb199SMark Brown 1011a91eb199SMark Brown static const struct snd_kcontrol_new dacr_sidetone_mux = 1012a91eb199SMark Brown SOC_DAPM_ENUM("Right Sidetone Mux", dacr_sidetone_enum); 1013a91eb199SMark Brown 1014a91eb199SMark Brown static const struct snd_soc_dapm_widget wm8904_dapm_widgets[] = { 1015a91eb199SMark Brown SND_SOC_DAPM_SUPPLY("Class G", WM8904_CLASS_W_0, 0, 1, NULL, 0), 1016a91eb199SMark Brown SND_SOC_DAPM_PGA("Left Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1017a91eb199SMark Brown SND_SOC_DAPM_PGA("Right Bypass", SND_SOC_NOPM, 0, 0, NULL, 0), 1018a91eb199SMark Brown 1019a91eb199SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &dacl_sidetone_mux), 1020a91eb199SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &dacr_sidetone_mux), 1021a91eb199SMark Brown 1022a91eb199SMark Brown SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), 1023a91eb199SMark Brown SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_mux), 1024a91eb199SMark Brown SND_SOC_DAPM_MUX("LINEL Mux", SND_SOC_NOPM, 0, 0, &linel_mux), 1025a91eb199SMark Brown SND_SOC_DAPM_MUX("LINER Mux", SND_SOC_NOPM, 0, 0, &liner_mux), 1026a91eb199SMark Brown }; 1027a91eb199SMark Brown 1028a91eb199SMark Brown static const struct snd_soc_dapm_route core_intercon[] = { 1029a91eb199SMark Brown { "CLK_DSP", NULL, "SYSCLK" }, 1030a91eb199SMark Brown { "TOCLK", NULL, "SYSCLK" }, 1031a91eb199SMark Brown }; 1032a91eb199SMark Brown 1033a91eb199SMark Brown static const struct snd_soc_dapm_route adc_intercon[] = { 1034a91eb199SMark Brown { "Left Capture Mux", "IN1L", "IN1L" }, 1035a91eb199SMark Brown { "Left Capture Mux", "IN2L", "IN2L" }, 1036a91eb199SMark Brown { "Left Capture Mux", "IN3L", "IN3L" }, 1037a91eb199SMark Brown 1038a91eb199SMark Brown { "Left Capture Inverting Mux", "IN1L", "IN1L" }, 1039a91eb199SMark Brown { "Left Capture Inverting Mux", "IN2L", "IN2L" }, 1040a91eb199SMark Brown { "Left Capture Inverting Mux", "IN3L", "IN3L" }, 1041a91eb199SMark Brown 1042a91eb199SMark Brown { "Right Capture Mux", "IN1R", "IN1R" }, 1043a91eb199SMark Brown { "Right Capture Mux", "IN2R", "IN2R" }, 1044a91eb199SMark Brown { "Right Capture Mux", "IN3R", "IN3R" }, 1045a91eb199SMark Brown 1046a91eb199SMark Brown { "Right Capture Inverting Mux", "IN1R", "IN1R" }, 1047a91eb199SMark Brown { "Right Capture Inverting Mux", "IN2R", "IN2R" }, 1048a91eb199SMark Brown { "Right Capture Inverting Mux", "IN3R", "IN3R" }, 1049a91eb199SMark Brown 1050a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Mux" }, 1051a91eb199SMark Brown { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, 1052a91eb199SMark Brown 1053a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Mux" }, 1054a91eb199SMark Brown { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, 1055a91eb199SMark Brown 1056a91eb199SMark Brown { "AIFOUTL", "Left", "ADCL" }, 1057a91eb199SMark Brown { "AIFOUTL", "Right", "ADCR" }, 1058a91eb199SMark Brown { "AIFOUTR", "Left", "ADCL" }, 1059a91eb199SMark Brown { "AIFOUTR", "Right", "ADCR" }, 1060a91eb199SMark Brown 1061a91eb199SMark Brown { "ADCL", NULL, "CLK_DSP" }, 1062a91eb199SMark Brown { "ADCL", NULL, "Left Capture PGA" }, 1063a91eb199SMark Brown 1064a91eb199SMark Brown { "ADCR", NULL, "CLK_DSP" }, 1065a91eb199SMark Brown { "ADCR", NULL, "Right Capture PGA" }, 1066a91eb199SMark Brown }; 1067a91eb199SMark Brown 1068a91eb199SMark Brown static const struct snd_soc_dapm_route dac_intercon[] = { 1069a91eb199SMark Brown { "DACL", "Right", "AIFINR" }, 1070a91eb199SMark Brown { "DACL", "Left", "AIFINL" }, 1071a91eb199SMark Brown { "DACL", NULL, "CLK_DSP" }, 1072a91eb199SMark Brown 1073a91eb199SMark Brown { "DACR", "Right", "AIFINR" }, 1074a91eb199SMark Brown { "DACR", "Left", "AIFINL" }, 1075a91eb199SMark Brown { "DACR", NULL, "CLK_DSP" }, 1076a91eb199SMark Brown 1077a91eb199SMark Brown { "Charge pump", NULL, "SYSCLK" }, 1078a91eb199SMark Brown 1079a91eb199SMark Brown { "Headphone Output", NULL, "HPL PGA" }, 1080a91eb199SMark Brown { "Headphone Output", NULL, "HPR PGA" }, 1081a91eb199SMark Brown { "Headphone Output", NULL, "Charge pump" }, 1082a91eb199SMark Brown { "Headphone Output", NULL, "TOCLK" }, 1083a91eb199SMark Brown 1084a91eb199SMark Brown { "Line Output", NULL, "LINEL PGA" }, 1085a91eb199SMark Brown { "Line Output", NULL, "LINER PGA" }, 1086a91eb199SMark Brown { "Line Output", NULL, "Charge pump" }, 1087a91eb199SMark Brown { "Line Output", NULL, "TOCLK" }, 1088a91eb199SMark Brown 1089a91eb199SMark Brown { "HPOUTL", NULL, "Headphone Output" }, 1090a91eb199SMark Brown { "HPOUTR", NULL, "Headphone Output" }, 1091a91eb199SMark Brown 1092a91eb199SMark Brown { "LINEOUTL", NULL, "Line Output" }, 1093a91eb199SMark Brown { "LINEOUTR", NULL, "Line Output" }, 1094a91eb199SMark Brown }; 1095a91eb199SMark Brown 1096a91eb199SMark Brown static const struct snd_soc_dapm_route wm8904_intercon[] = { 1097a91eb199SMark Brown { "Left Sidetone", "Left", "ADCL" }, 1098a91eb199SMark Brown { "Left Sidetone", "Right", "ADCR" }, 1099a91eb199SMark Brown { "DACL", NULL, "Left Sidetone" }, 1100a91eb199SMark Brown 1101a91eb199SMark Brown { "Right Sidetone", "Left", "ADCL" }, 1102a91eb199SMark Brown { "Right Sidetone", "Right", "ADCR" }, 1103a91eb199SMark Brown { "DACR", NULL, "Right Sidetone" }, 1104a91eb199SMark Brown 1105a91eb199SMark Brown { "Left Bypass", NULL, "Class G" }, 1106a91eb199SMark Brown { "Left Bypass", NULL, "Left Capture PGA" }, 1107a91eb199SMark Brown 1108a91eb199SMark Brown { "Right Bypass", NULL, "Class G" }, 1109a91eb199SMark Brown { "Right Bypass", NULL, "Right Capture PGA" }, 1110a91eb199SMark Brown 1111a91eb199SMark Brown { "HPL Mux", "DAC", "DACL" }, 1112a91eb199SMark Brown { "HPL Mux", "Bypass", "Left Bypass" }, 1113a91eb199SMark Brown 1114a91eb199SMark Brown { "HPR Mux", "DAC", "DACR" }, 1115a91eb199SMark Brown { "HPR Mux", "Bypass", "Right Bypass" }, 1116a91eb199SMark Brown 1117a91eb199SMark Brown { "LINEL Mux", "DAC", "DACL" }, 1118a91eb199SMark Brown { "LINEL Mux", "Bypass", "Left Bypass" }, 1119a91eb199SMark Brown 1120a91eb199SMark Brown { "LINER Mux", "DAC", "DACR" }, 1121a91eb199SMark Brown { "LINER Mux", "Bypass", "Right Bypass" }, 1122a91eb199SMark Brown 1123a91eb199SMark Brown { "HPL PGA", NULL, "HPL Mux" }, 1124a91eb199SMark Brown { "HPR PGA", NULL, "HPR Mux" }, 1125a91eb199SMark Brown 1126a91eb199SMark Brown { "LINEL PGA", NULL, "LINEL Mux" }, 1127a91eb199SMark Brown { "LINER PGA", NULL, "LINER Mux" }, 1128a91eb199SMark Brown }; 1129a91eb199SMark Brown 11308c126474SMark Brown static const struct snd_soc_dapm_route wm8912_intercon[] = { 11318c126474SMark Brown { "HPL PGA", NULL, "DACL" }, 11328c126474SMark Brown { "HPR PGA", NULL, "DACR" }, 11338c126474SMark Brown 11348c126474SMark Brown { "LINEL PGA", NULL, "DACL" }, 11358c126474SMark Brown { "LINER PGA", NULL, "DACR" }, 11368c126474SMark Brown }; 11378c126474SMark Brown 1138a91eb199SMark Brown static int wm8904_add_widgets(struct snd_soc_codec *codec) 1139a91eb199SMark Brown { 1140b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1141ce6120ccSLiam Girdwood struct snd_soc_dapm_context *dapm = &codec->dapm; 11428c126474SMark Brown 1143ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_core_dapm_widgets, 11448c126474SMark Brown ARRAY_SIZE(wm8904_core_dapm_widgets)); 1145ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, core_intercon, 11468c126474SMark Brown ARRAY_SIZE(core_intercon)); 11478c126474SMark Brown 11488c126474SMark Brown switch (wm8904->devtype) { 11498c126474SMark Brown case WM8904: 1150a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_adc_snd_controls, 1151a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_snd_controls)); 1152a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_dac_snd_controls, 1153a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 1154a91eb199SMark Brown snd_soc_add_controls(codec, wm8904_snd_controls, 1155a91eb199SMark Brown ARRAY_SIZE(wm8904_snd_controls)); 1156a91eb199SMark Brown 1157ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_adc_dapm_widgets, 1158a91eb199SMark Brown ARRAY_SIZE(wm8904_adc_dapm_widgets)); 1159ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 1160a91eb199SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 1161ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dapm_widgets, 1162a91eb199SMark Brown ARRAY_SIZE(wm8904_dapm_widgets)); 1163a91eb199SMark Brown 1164ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, core_intercon, 1165a91eb199SMark Brown ARRAY_SIZE(core_intercon)); 1166ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, adc_intercon, 11678c126474SMark Brown ARRAY_SIZE(adc_intercon)); 1168ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 11698c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1170ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8904_intercon, 1171a91eb199SMark Brown ARRAY_SIZE(wm8904_intercon)); 11728c126474SMark Brown break; 11738c126474SMark Brown 11748c126474SMark Brown case WM8912: 11758c126474SMark Brown snd_soc_add_controls(codec, wm8904_dac_snd_controls, 11768c126474SMark Brown ARRAY_SIZE(wm8904_dac_snd_controls)); 11778c126474SMark Brown 1178ce6120ccSLiam Girdwood snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets, 11798c126474SMark Brown ARRAY_SIZE(wm8904_dac_dapm_widgets)); 11808c126474SMark Brown 1181ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, dac_intercon, 11828c126474SMark Brown ARRAY_SIZE(dac_intercon)); 1183ce6120ccSLiam Girdwood snd_soc_dapm_add_routes(dapm, wm8912_intercon, 11848c126474SMark Brown ARRAY_SIZE(wm8912_intercon)); 11858c126474SMark Brown break; 11868c126474SMark Brown } 1187a91eb199SMark Brown 1188ce6120ccSLiam Girdwood snd_soc_dapm_new_widgets(dapm); 1189a91eb199SMark Brown return 0; 1190a91eb199SMark Brown } 1191a91eb199SMark Brown 1192a91eb199SMark Brown static struct { 1193a91eb199SMark Brown int ratio; 1194a91eb199SMark Brown unsigned int clk_sys_rate; 1195a91eb199SMark Brown } clk_sys_rates[] = { 1196a91eb199SMark Brown { 64, 0 }, 1197a91eb199SMark Brown { 128, 1 }, 1198a91eb199SMark Brown { 192, 2 }, 1199a91eb199SMark Brown { 256, 3 }, 1200a91eb199SMark Brown { 384, 4 }, 1201a91eb199SMark Brown { 512, 5 }, 1202a91eb199SMark Brown { 786, 6 }, 1203a91eb199SMark Brown { 1024, 7 }, 1204a91eb199SMark Brown { 1408, 8 }, 1205a91eb199SMark Brown { 1536, 9 }, 1206a91eb199SMark Brown }; 1207a91eb199SMark Brown 1208a91eb199SMark Brown static struct { 1209a91eb199SMark Brown int rate; 1210a91eb199SMark Brown int sample_rate; 1211a91eb199SMark Brown } sample_rates[] = { 1212a91eb199SMark Brown { 8000, 0 }, 1213a91eb199SMark Brown { 11025, 1 }, 1214a91eb199SMark Brown { 12000, 1 }, 1215a91eb199SMark Brown { 16000, 2 }, 1216a91eb199SMark Brown { 22050, 3 }, 1217a91eb199SMark Brown { 24000, 3 }, 1218a91eb199SMark Brown { 32000, 4 }, 1219a91eb199SMark Brown { 44100, 5 }, 1220a91eb199SMark Brown { 48000, 5 }, 1221a91eb199SMark Brown }; 1222a91eb199SMark Brown 1223a91eb199SMark Brown static struct { 1224a91eb199SMark Brown int div; /* *10 due to .5s */ 1225a91eb199SMark Brown int bclk_div; 1226a91eb199SMark Brown } bclk_divs[] = { 1227a91eb199SMark Brown { 10, 0 }, 1228a91eb199SMark Brown { 15, 1 }, 1229a91eb199SMark Brown { 20, 2 }, 1230a91eb199SMark Brown { 30, 3 }, 1231a91eb199SMark Brown { 40, 4 }, 1232a91eb199SMark Brown { 50, 5 }, 1233a91eb199SMark Brown { 55, 6 }, 1234a91eb199SMark Brown { 60, 7 }, 1235a91eb199SMark Brown { 80, 8 }, 1236a91eb199SMark Brown { 100, 9 }, 1237a91eb199SMark Brown { 110, 10 }, 1238a91eb199SMark Brown { 120, 11 }, 1239a91eb199SMark Brown { 160, 12 }, 1240a91eb199SMark Brown { 200, 13 }, 1241a91eb199SMark Brown { 220, 14 }, 1242a91eb199SMark Brown { 240, 16 }, 1243a91eb199SMark Brown { 200, 17 }, 1244a91eb199SMark Brown { 320, 18 }, 1245a91eb199SMark Brown { 440, 19 }, 1246a91eb199SMark Brown { 480, 20 }, 1247a91eb199SMark Brown }; 1248a91eb199SMark Brown 1249a91eb199SMark Brown 1250a91eb199SMark Brown static int wm8904_hw_params(struct snd_pcm_substream *substream, 1251a91eb199SMark Brown struct snd_pcm_hw_params *params, 1252a91eb199SMark Brown struct snd_soc_dai *dai) 1253a91eb199SMark Brown { 1254a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1255b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1256a91eb199SMark Brown int ret, i, best, best_val, cur_val; 1257a91eb199SMark Brown unsigned int aif1 = 0; 1258a91eb199SMark Brown unsigned int aif2 = 0; 1259a91eb199SMark Brown unsigned int aif3 = 0; 1260a91eb199SMark Brown unsigned int clock1 = 0; 1261a91eb199SMark Brown unsigned int dac_digital1 = 0; 1262a91eb199SMark Brown 1263a91eb199SMark Brown /* What BCLK do we need? */ 1264a91eb199SMark Brown wm8904->fs = params_rate(params); 1265a91eb199SMark Brown if (wm8904->tdm_slots) { 1266a91eb199SMark Brown dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n", 1267a91eb199SMark Brown wm8904->tdm_slots, wm8904->tdm_width); 1268a91eb199SMark Brown wm8904->bclk = snd_soc_calc_bclk(wm8904->fs, 1269a91eb199SMark Brown wm8904->tdm_width, 2, 1270a91eb199SMark Brown wm8904->tdm_slots); 1271a91eb199SMark Brown } else { 1272a91eb199SMark Brown wm8904->bclk = snd_soc_params_to_bclk(params); 1273a91eb199SMark Brown } 1274a91eb199SMark Brown 127556927eb0SMark Brown switch (params_format(params)) { 127656927eb0SMark Brown case SNDRV_PCM_FORMAT_S16_LE: 127756927eb0SMark Brown break; 127856927eb0SMark Brown case SNDRV_PCM_FORMAT_S20_3LE: 127956927eb0SMark Brown aif1 |= 0x40; 128056927eb0SMark Brown break; 128156927eb0SMark Brown case SNDRV_PCM_FORMAT_S24_LE: 128256927eb0SMark Brown aif1 |= 0x80; 128356927eb0SMark Brown break; 128456927eb0SMark Brown case SNDRV_PCM_FORMAT_S32_LE: 128556927eb0SMark Brown aif1 |= 0xc0; 128656927eb0SMark Brown break; 128756927eb0SMark Brown default: 128856927eb0SMark Brown return -EINVAL; 128956927eb0SMark Brown } 129056927eb0SMark Brown 129156927eb0SMark Brown 1292a91eb199SMark Brown dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk); 1293a91eb199SMark Brown 1294a91eb199SMark Brown ret = wm8904_configure_clocking(codec); 1295a91eb199SMark Brown if (ret != 0) 1296a91eb199SMark Brown return ret; 1297a91eb199SMark Brown 1298a91eb199SMark Brown /* Select nearest CLK_SYS_RATE */ 1299a91eb199SMark Brown best = 0; 1300a91eb199SMark Brown best_val = abs((wm8904->sysclk_rate / clk_sys_rates[0].ratio) 1301a91eb199SMark Brown - wm8904->fs); 1302a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { 1303a91eb199SMark Brown cur_val = abs((wm8904->sysclk_rate / 1304ef995e3aSJoe Perches clk_sys_rates[i].ratio) - wm8904->fs); 1305a91eb199SMark Brown if (cur_val < best_val) { 1306a91eb199SMark Brown best = i; 1307a91eb199SMark Brown best_val = cur_val; 1308a91eb199SMark Brown } 1309a91eb199SMark Brown } 1310a91eb199SMark Brown dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", 1311a91eb199SMark Brown clk_sys_rates[best].ratio); 1312a91eb199SMark Brown clock1 |= (clk_sys_rates[best].clk_sys_rate 1313a91eb199SMark Brown << WM8904_CLK_SYS_RATE_SHIFT); 1314a91eb199SMark Brown 1315a91eb199SMark Brown /* SAMPLE_RATE */ 1316a91eb199SMark Brown best = 0; 1317a91eb199SMark Brown best_val = abs(wm8904->fs - sample_rates[0].rate); 1318a91eb199SMark Brown for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { 1319a91eb199SMark Brown /* Closest match */ 1320a91eb199SMark Brown cur_val = abs(wm8904->fs - sample_rates[i].rate); 1321a91eb199SMark Brown if (cur_val < best_val) { 1322a91eb199SMark Brown best = i; 1323a91eb199SMark Brown best_val = cur_val; 1324a91eb199SMark Brown } 1325a91eb199SMark Brown } 1326a91eb199SMark Brown dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", 1327a91eb199SMark Brown sample_rates[best].rate); 1328a91eb199SMark Brown clock1 |= (sample_rates[best].sample_rate 1329a91eb199SMark Brown << WM8904_SAMPLE_RATE_SHIFT); 1330a91eb199SMark Brown 1331a91eb199SMark Brown /* Enable sloping stopband filter for low sample rates */ 1332a91eb199SMark Brown if (wm8904->fs <= 24000) 1333a91eb199SMark Brown dac_digital1 |= WM8904_DAC_SB_FILT; 1334a91eb199SMark Brown 1335a91eb199SMark Brown /* BCLK_DIV */ 1336a91eb199SMark Brown best = 0; 1337a91eb199SMark Brown best_val = INT_MAX; 1338a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1339a91eb199SMark Brown cur_val = ((wm8904->sysclk_rate * 10) / bclk_divs[i].div) 1340a91eb199SMark Brown - wm8904->bclk; 1341a91eb199SMark Brown if (cur_val < 0) /* Table is sorted */ 1342a91eb199SMark Brown break; 1343a91eb199SMark Brown if (cur_val < best_val) { 1344a91eb199SMark Brown best = i; 1345a91eb199SMark Brown best_val = cur_val; 1346a91eb199SMark Brown } 1347a91eb199SMark Brown } 1348a91eb199SMark Brown wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div; 1349a91eb199SMark Brown dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", 1350a91eb199SMark Brown bclk_divs[best].div, wm8904->bclk); 1351a91eb199SMark Brown aif2 |= bclk_divs[best].bclk_div; 1352a91eb199SMark Brown 1353a91eb199SMark Brown /* LRCLK is a simple fraction of BCLK */ 1354a91eb199SMark Brown dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs); 1355a91eb199SMark Brown aif3 |= wm8904->bclk / wm8904->fs; 1356a91eb199SMark Brown 1357a91eb199SMark Brown /* Apply the settings */ 1358a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, 1359a91eb199SMark Brown WM8904_DAC_SB_FILT, dac_digital1); 1360a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1361a91eb199SMark Brown WM8904_AIF_WL_MASK, aif1); 1362a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2, 1363a91eb199SMark Brown WM8904_BCLK_DIV_MASK, aif2); 1364a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1365a91eb199SMark Brown WM8904_LRCLK_RATE_MASK, aif3); 1366a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1, 1367a91eb199SMark Brown WM8904_SAMPLE_RATE_MASK | 1368a91eb199SMark Brown WM8904_CLK_SYS_RATE_MASK, clock1); 1369a91eb199SMark Brown 1370a91eb199SMark Brown /* Update filters for the new settings */ 1371a91eb199SMark Brown wm8904_set_retune_mobile(codec); 1372a91eb199SMark Brown wm8904_set_deemph(codec); 1373a91eb199SMark Brown 1374a91eb199SMark Brown return 0; 1375a91eb199SMark Brown } 1376a91eb199SMark Brown 1377a91eb199SMark Brown 1378a91eb199SMark Brown static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, 1379a91eb199SMark Brown unsigned int freq, int dir) 1380a91eb199SMark Brown { 1381a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1382b2c812e2SMark Brown struct wm8904_priv *priv = snd_soc_codec_get_drvdata(codec); 1383a91eb199SMark Brown 1384a91eb199SMark Brown switch (clk_id) { 1385a91eb199SMark Brown case WM8904_CLK_MCLK: 1386a91eb199SMark Brown priv->sysclk_src = clk_id; 1387a91eb199SMark Brown priv->mclk_rate = freq; 1388a91eb199SMark Brown break; 1389a91eb199SMark Brown 1390a91eb199SMark Brown case WM8904_CLK_FLL: 1391a91eb199SMark Brown priv->sysclk_src = clk_id; 1392a91eb199SMark Brown break; 1393a91eb199SMark Brown 1394a91eb199SMark Brown default: 1395a91eb199SMark Brown return -EINVAL; 1396a91eb199SMark Brown } 1397a91eb199SMark Brown 1398a91eb199SMark Brown dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); 1399a91eb199SMark Brown 1400a91eb199SMark Brown wm8904_configure_clocking(codec); 1401a91eb199SMark Brown 1402a91eb199SMark Brown return 0; 1403a91eb199SMark Brown } 1404a91eb199SMark Brown 1405a91eb199SMark Brown static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1406a91eb199SMark Brown { 1407a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1408a91eb199SMark Brown unsigned int aif1 = 0; 1409a91eb199SMark Brown unsigned int aif3 = 0; 1410a91eb199SMark Brown 1411a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1412a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1413a91eb199SMark Brown break; 1414a91eb199SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1415a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1416a91eb199SMark Brown break; 1417a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1418a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1419a91eb199SMark Brown break; 1420a91eb199SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1421a91eb199SMark Brown aif1 |= WM8904_BCLK_DIR; 1422a91eb199SMark Brown aif3 |= WM8904_LRCLK_DIR; 1423a91eb199SMark Brown break; 1424a91eb199SMark Brown default: 1425a91eb199SMark Brown return -EINVAL; 1426a91eb199SMark Brown } 1427a91eb199SMark Brown 1428a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1429a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1430a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1431a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1432a91eb199SMark Brown aif1 |= 0x3; 1433a91eb199SMark Brown break; 1434a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1435a91eb199SMark Brown aif1 |= 0x2; 1436a91eb199SMark Brown break; 1437a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1438a91eb199SMark Brown break; 1439a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1440a91eb199SMark Brown aif1 |= 0x1; 1441a91eb199SMark Brown break; 1442a91eb199SMark Brown default: 1443a91eb199SMark Brown return -EINVAL; 1444a91eb199SMark Brown } 1445a91eb199SMark Brown 1446a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1447a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_A: 1448a91eb199SMark Brown case SND_SOC_DAIFMT_DSP_B: 1449a91eb199SMark Brown /* frame inversion not valid for DSP modes */ 1450a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1451a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1452a91eb199SMark Brown break; 1453a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1454a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1455a91eb199SMark Brown break; 1456a91eb199SMark Brown default: 1457a91eb199SMark Brown return -EINVAL; 1458a91eb199SMark Brown } 1459a91eb199SMark Brown break; 1460a91eb199SMark Brown 1461a91eb199SMark Brown case SND_SOC_DAIFMT_I2S: 1462a91eb199SMark Brown case SND_SOC_DAIFMT_RIGHT_J: 1463a91eb199SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1464a91eb199SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1465a91eb199SMark Brown case SND_SOC_DAIFMT_NB_NF: 1466a91eb199SMark Brown break; 1467a91eb199SMark Brown case SND_SOC_DAIFMT_IB_IF: 1468a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV; 1469a91eb199SMark Brown break; 1470a91eb199SMark Brown case SND_SOC_DAIFMT_IB_NF: 1471a91eb199SMark Brown aif1 |= WM8904_AIF_BCLK_INV; 1472a91eb199SMark Brown break; 1473a91eb199SMark Brown case SND_SOC_DAIFMT_NB_IF: 1474a91eb199SMark Brown aif1 |= WM8904_AIF_LRCLK_INV; 1475a91eb199SMark Brown break; 1476a91eb199SMark Brown default: 1477a91eb199SMark Brown return -EINVAL; 1478a91eb199SMark Brown } 1479a91eb199SMark Brown break; 1480a91eb199SMark Brown default: 1481a91eb199SMark Brown return -EINVAL; 1482a91eb199SMark Brown } 1483a91eb199SMark Brown 1484a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1485a91eb199SMark Brown WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV | 1486a91eb199SMark Brown WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1); 1487a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3, 1488a91eb199SMark Brown WM8904_LRCLK_DIR, aif3); 1489a91eb199SMark Brown 1490a91eb199SMark Brown return 0; 1491a91eb199SMark Brown } 1492a91eb199SMark Brown 1493a91eb199SMark Brown 1494a91eb199SMark Brown static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, 1495a91eb199SMark Brown unsigned int rx_mask, int slots, int slot_width) 1496a91eb199SMark Brown { 1497a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1498b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1499a91eb199SMark Brown int aif1 = 0; 1500a91eb199SMark Brown 1501a91eb199SMark Brown /* Don't need to validate anything if we're turning off TDM */ 1502a91eb199SMark Brown if (slots == 0) 1503a91eb199SMark Brown goto out; 1504a91eb199SMark Brown 1505a91eb199SMark Brown /* Note that we allow configurations we can't handle ourselves - 1506a91eb199SMark Brown * for example, we can generate clocks for slots 2 and up even if 1507a91eb199SMark Brown * we can't use those slots ourselves. 1508a91eb199SMark Brown */ 1509a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM | WM8904_AIFDAC_TDM; 1510a91eb199SMark Brown 1511a91eb199SMark Brown switch (rx_mask) { 1512a91eb199SMark Brown case 3: 1513a91eb199SMark Brown break; 1514a91eb199SMark Brown case 0xc: 1515a91eb199SMark Brown aif1 |= WM8904_AIFADC_TDM_CHAN; 1516a91eb199SMark Brown break; 1517a91eb199SMark Brown default: 1518a91eb199SMark Brown return -EINVAL; 1519a91eb199SMark Brown } 1520a91eb199SMark Brown 1521a91eb199SMark Brown 1522a91eb199SMark Brown switch (tx_mask) { 1523a91eb199SMark Brown case 3: 1524a91eb199SMark Brown break; 1525a91eb199SMark Brown case 0xc: 1526a91eb199SMark Brown aif1 |= WM8904_AIFDAC_TDM_CHAN; 1527a91eb199SMark Brown break; 1528a91eb199SMark Brown default: 1529a91eb199SMark Brown return -EINVAL; 1530a91eb199SMark Brown } 1531a91eb199SMark Brown 1532a91eb199SMark Brown out: 1533a91eb199SMark Brown wm8904->tdm_width = slot_width; 1534a91eb199SMark Brown wm8904->tdm_slots = slots / 2; 1535a91eb199SMark Brown 1536a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1, 1537a91eb199SMark Brown WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN | 1538a91eb199SMark Brown WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1); 1539a91eb199SMark Brown 1540a91eb199SMark Brown return 0; 1541a91eb199SMark Brown } 1542a91eb199SMark Brown 1543a91eb199SMark Brown struct _fll_div { 1544a91eb199SMark Brown u16 fll_fratio; 1545a91eb199SMark Brown u16 fll_outdiv; 1546a91eb199SMark Brown u16 fll_clk_ref_div; 1547a91eb199SMark Brown u16 n; 1548a91eb199SMark Brown u16 k; 1549a91eb199SMark Brown }; 1550a91eb199SMark Brown 1551a91eb199SMark Brown /* The size in bits of the FLL divide multiplied by 10 1552a91eb199SMark Brown * to allow rounding later */ 1553a91eb199SMark Brown #define FIXED_FLL_SIZE ((1 << 16) * 10) 1554a91eb199SMark Brown 1555a91eb199SMark Brown static struct { 1556a91eb199SMark Brown unsigned int min; 1557a91eb199SMark Brown unsigned int max; 1558a91eb199SMark Brown u16 fll_fratio; 1559a91eb199SMark Brown int ratio; 1560a91eb199SMark Brown } fll_fratios[] = { 1561a91eb199SMark Brown { 0, 64000, 4, 16 }, 1562a91eb199SMark Brown { 64000, 128000, 3, 8 }, 1563a91eb199SMark Brown { 128000, 256000, 2, 4 }, 1564a91eb199SMark Brown { 256000, 1000000, 1, 2 }, 1565a91eb199SMark Brown { 1000000, 13500000, 0, 1 }, 1566a91eb199SMark Brown }; 1567a91eb199SMark Brown 1568a91eb199SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1569a91eb199SMark Brown unsigned int Fout) 1570a91eb199SMark Brown { 1571a91eb199SMark Brown u64 Kpart; 1572a91eb199SMark Brown unsigned int K, Ndiv, Nmod, target; 1573a91eb199SMark Brown unsigned int div; 1574a91eb199SMark Brown int i; 1575a91eb199SMark Brown 1576a91eb199SMark Brown /* Fref must be <=13.5MHz */ 1577a91eb199SMark Brown div = 1; 1578a91eb199SMark Brown fll_div->fll_clk_ref_div = 0; 1579a91eb199SMark Brown while ((Fref / div) > 13500000) { 1580a91eb199SMark Brown div *= 2; 1581a91eb199SMark Brown fll_div->fll_clk_ref_div++; 1582a91eb199SMark Brown 1583a91eb199SMark Brown if (div > 8) { 1584a91eb199SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1585a91eb199SMark Brown Fref); 1586a91eb199SMark Brown return -EINVAL; 1587a91eb199SMark Brown } 1588a91eb199SMark Brown } 1589a91eb199SMark Brown 1590a91eb199SMark Brown pr_debug("Fref=%u Fout=%u\n", Fref, Fout); 1591a91eb199SMark Brown 1592a91eb199SMark Brown /* Apply the division for our remaining calculations */ 1593a91eb199SMark Brown Fref /= div; 1594a91eb199SMark Brown 1595a91eb199SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1596a91eb199SMark Brown div = 4; 1597a91eb199SMark Brown while (Fout * div < 90000000) { 1598a91eb199SMark Brown div++; 1599a91eb199SMark Brown if (div > 64) { 1600a91eb199SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1601a91eb199SMark Brown Fout); 1602a91eb199SMark Brown return -EINVAL; 1603a91eb199SMark Brown } 1604a91eb199SMark Brown } 1605a91eb199SMark Brown target = Fout * div; 1606a91eb199SMark Brown fll_div->fll_outdiv = div - 1; 1607a91eb199SMark Brown 1608a91eb199SMark Brown pr_debug("Fvco=%dHz\n", target); 1609a91eb199SMark Brown 161025985edcSLucas De Marchi /* Find an appropriate FLL_FRATIO and factor it out of the target */ 1611a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1612a91eb199SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1613a91eb199SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1614a91eb199SMark Brown target /= fll_fratios[i].ratio; 1615a91eb199SMark Brown break; 1616a91eb199SMark Brown } 1617a91eb199SMark Brown } 1618a91eb199SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1619a91eb199SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1620a91eb199SMark Brown return -EINVAL; 1621a91eb199SMark Brown } 1622a91eb199SMark Brown 1623a91eb199SMark Brown /* Now, calculate N.K */ 1624a91eb199SMark Brown Ndiv = target / Fref; 1625a91eb199SMark Brown 1626a91eb199SMark Brown fll_div->n = Ndiv; 1627a91eb199SMark Brown Nmod = target % Fref; 1628a91eb199SMark Brown pr_debug("Nmod=%d\n", Nmod); 1629a91eb199SMark Brown 1630a91eb199SMark Brown /* Calculate fractional part - scale up so we can round. */ 1631a91eb199SMark Brown Kpart = FIXED_FLL_SIZE * (long long)Nmod; 1632a91eb199SMark Brown 1633a91eb199SMark Brown do_div(Kpart, Fref); 1634a91eb199SMark Brown 1635a91eb199SMark Brown K = Kpart & 0xFFFFFFFF; 1636a91eb199SMark Brown 1637a91eb199SMark Brown if ((K % 10) >= 5) 1638a91eb199SMark Brown K += 5; 1639a91eb199SMark Brown 1640a91eb199SMark Brown /* Move down to proper range now rounding is done */ 1641a91eb199SMark Brown fll_div->k = K / 10; 1642a91eb199SMark Brown 1643a91eb199SMark Brown pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", 1644a91eb199SMark Brown fll_div->n, fll_div->k, 1645a91eb199SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 1646a91eb199SMark Brown fll_div->fll_clk_ref_div); 1647a91eb199SMark Brown 1648a91eb199SMark Brown return 0; 1649a91eb199SMark Brown } 1650a91eb199SMark Brown 1651a91eb199SMark Brown static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source, 1652a91eb199SMark Brown unsigned int Fref, unsigned int Fout) 1653a91eb199SMark Brown { 1654a91eb199SMark Brown struct snd_soc_codec *codec = dai->codec; 1655b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1656a91eb199SMark Brown struct _fll_div fll_div; 1657a91eb199SMark Brown int ret, val; 1658a91eb199SMark Brown int clock2, fll1; 1659a91eb199SMark Brown 1660a91eb199SMark Brown /* Any change? */ 1661a91eb199SMark Brown if (source == wm8904->fll_src && Fref == wm8904->fll_fref && 1662a91eb199SMark Brown Fout == wm8904->fll_fout) 1663a91eb199SMark Brown return 0; 1664a91eb199SMark Brown 166518240b67SMark Brown clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2); 166618240b67SMark Brown 1667a91eb199SMark Brown if (Fout == 0) { 1668a91eb199SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 1669a91eb199SMark Brown 1670a91eb199SMark Brown wm8904->fll_fref = 0; 1671a91eb199SMark Brown wm8904->fll_fout = 0; 1672a91eb199SMark Brown 1673a91eb199SMark Brown /* Gate SYSCLK to avoid glitches */ 1674a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1675a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1676a91eb199SMark Brown 1677a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1678a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1679a91eb199SMark Brown 1680a91eb199SMark Brown goto out; 1681a91eb199SMark Brown } 1682a91eb199SMark Brown 1683a91eb199SMark Brown /* Validate the FLL ID */ 1684a91eb199SMark Brown switch (source) { 1685a91eb199SMark Brown case WM8904_FLL_MCLK: 1686a91eb199SMark Brown case WM8904_FLL_LRCLK: 1687a91eb199SMark Brown case WM8904_FLL_BCLK: 1688a91eb199SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 1689a91eb199SMark Brown if (ret != 0) 1690a91eb199SMark Brown return ret; 1691a91eb199SMark Brown break; 1692a91eb199SMark Brown 1693a91eb199SMark Brown case WM8904_FLL_FREE_RUNNING: 1694a91eb199SMark Brown dev_dbg(codec->dev, "Using free running FLL\n"); 1695a91eb199SMark Brown /* Force 12MHz and output/4 for now */ 1696a91eb199SMark Brown Fout = 12000000; 1697a91eb199SMark Brown Fref = 12000000; 1698a91eb199SMark Brown 1699a91eb199SMark Brown memset(&fll_div, 0, sizeof(fll_div)); 1700a91eb199SMark Brown fll_div.fll_outdiv = 3; 1701a91eb199SMark Brown break; 1702a91eb199SMark Brown 1703a91eb199SMark Brown default: 1704a91eb199SMark Brown dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); 1705a91eb199SMark Brown return -EINVAL; 1706a91eb199SMark Brown } 1707a91eb199SMark Brown 1708a91eb199SMark Brown /* Save current state then disable the FLL and SYSCLK to avoid 1709a91eb199SMark Brown * misclocking */ 1710a91eb199SMark Brown fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1); 1711a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1712a91eb199SMark Brown WM8904_CLK_SYS_ENA, 0); 1713a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1714a91eb199SMark Brown WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0); 1715a91eb199SMark Brown 1716a91eb199SMark Brown /* Unlock forced oscilator control to switch it on/off */ 1717a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1718a91eb199SMark Brown WM8904_USER_KEY, WM8904_USER_KEY); 1719a91eb199SMark Brown 1720a91eb199SMark Brown if (fll_id == WM8904_FLL_FREE_RUNNING) { 1721a91eb199SMark Brown val = WM8904_FLL_FRC_NCO; 1722a91eb199SMark Brown } else { 1723a91eb199SMark Brown val = 0; 1724a91eb199SMark Brown } 1725a91eb199SMark Brown 1726a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO, 1727a91eb199SMark Brown val); 1728a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1, 1729a91eb199SMark Brown WM8904_USER_KEY, 0); 1730a91eb199SMark Brown 1731a91eb199SMark Brown switch (fll_id) { 1732a91eb199SMark Brown case WM8904_FLL_MCLK: 1733a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1734a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 0); 1735a91eb199SMark Brown break; 1736a91eb199SMark Brown 1737a91eb199SMark Brown case WM8904_FLL_LRCLK: 1738a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1739a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 1); 1740a91eb199SMark Brown break; 1741a91eb199SMark Brown 1742a91eb199SMark Brown case WM8904_FLL_BCLK: 1743a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1744a91eb199SMark Brown WM8904_FLL_CLK_REF_SRC_MASK, 2); 1745a91eb199SMark Brown break; 1746a91eb199SMark Brown } 1747a91eb199SMark Brown 1748a91eb199SMark Brown if (fll_div.k) 1749a91eb199SMark Brown val = WM8904_FLL_FRACN_ENA; 1750a91eb199SMark Brown else 1751a91eb199SMark Brown val = 0; 1752a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1753a91eb199SMark Brown WM8904_FLL_FRACN_ENA, val); 1754a91eb199SMark Brown 1755a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2, 1756a91eb199SMark Brown WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK, 1757a91eb199SMark Brown (fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) | 1758a91eb199SMark Brown (fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT)); 1759a91eb199SMark Brown 1760a91eb199SMark Brown snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k); 1761a91eb199SMark Brown 1762a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK, 1763a91eb199SMark Brown fll_div.n << WM8904_FLL_N_SHIFT); 1764a91eb199SMark Brown 1765a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5, 1766a91eb199SMark Brown WM8904_FLL_CLK_REF_DIV_MASK, 1767a91eb199SMark Brown fll_div.fll_clk_ref_div 1768a91eb199SMark Brown << WM8904_FLL_CLK_REF_DIV_SHIFT); 1769a91eb199SMark Brown 1770a91eb199SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 1771a91eb199SMark Brown 1772a91eb199SMark Brown wm8904->fll_fref = Fref; 1773a91eb199SMark Brown wm8904->fll_fout = Fout; 1774a91eb199SMark Brown wm8904->fll_src = source; 1775a91eb199SMark Brown 1776a91eb199SMark Brown /* Enable the FLL if it was previously active */ 1777a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1778a91eb199SMark Brown WM8904_FLL_OSC_ENA, fll1); 1779a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1, 1780a91eb199SMark Brown WM8904_FLL_ENA, fll1); 1781a91eb199SMark Brown 1782a91eb199SMark Brown out: 1783a91eb199SMark Brown /* Reenable SYSCLK if it was previously active */ 1784a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2, 1785a91eb199SMark Brown WM8904_CLK_SYS_ENA, clock2); 1786a91eb199SMark Brown 1787a91eb199SMark Brown return 0; 1788a91eb199SMark Brown } 1789a91eb199SMark Brown 1790a91eb199SMark Brown static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) 1791a91eb199SMark Brown { 1792a91eb199SMark Brown struct snd_soc_codec *codec = codec_dai->codec; 1793a91eb199SMark Brown int val; 1794a91eb199SMark Brown 1795a91eb199SMark Brown if (mute) 1796a91eb199SMark Brown val = WM8904_DAC_MUTE; 1797a91eb199SMark Brown else 1798a91eb199SMark Brown val = 0; 1799a91eb199SMark Brown 1800a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val); 1801a91eb199SMark Brown 1802a91eb199SMark Brown return 0; 1803a91eb199SMark Brown } 1804a91eb199SMark Brown 1805a91eb199SMark Brown static int wm8904_set_bias_level(struct snd_soc_codec *codec, 1806a91eb199SMark Brown enum snd_soc_bias_level level) 1807a91eb199SMark Brown { 1808b2c812e2SMark Brown struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1809c1334218SMark Brown int ret; 1810a91eb199SMark Brown 1811a91eb199SMark Brown switch (level) { 1812a91eb199SMark Brown case SND_SOC_BIAS_ON: 1813a91eb199SMark Brown break; 1814a91eb199SMark Brown 1815a91eb199SMark Brown case SND_SOC_BIAS_PREPARE: 1816a91eb199SMark Brown /* VMID resistance 2*50k */ 1817a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1818a91eb199SMark Brown WM8904_VMID_RES_MASK, 1819a91eb199SMark Brown 0x1 << WM8904_VMID_RES_SHIFT); 1820a91eb199SMark Brown 1821a91eb199SMark Brown /* Normal bias current */ 1822a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1823a91eb199SMark Brown WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT); 1824a91eb199SMark Brown break; 1825a91eb199SMark Brown 1826a91eb199SMark Brown case SND_SOC_BIAS_STANDBY: 1827ce6120ccSLiam Girdwood if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1828a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 1829a91eb199SMark Brown wm8904->supplies); 1830a91eb199SMark Brown if (ret != 0) { 1831a91eb199SMark Brown dev_err(codec->dev, 1832a91eb199SMark Brown "Failed to enable supplies: %d\n", 1833a91eb199SMark Brown ret); 1834a91eb199SMark Brown return ret; 1835a91eb199SMark Brown } 1836a91eb199SMark Brown 1837*84d0d831SMark Brown regcache_sync(wm8904->regmap); 1838a91eb199SMark Brown 1839a91eb199SMark Brown /* Enable bias */ 1840a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1841a91eb199SMark Brown WM8904_BIAS_ENA, WM8904_BIAS_ENA); 1842a91eb199SMark Brown 1843a91eb199SMark Brown /* Enable VMID, VMID buffering, 2*5k resistance */ 1844a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1845a91eb199SMark Brown WM8904_VMID_ENA | 1846a91eb199SMark Brown WM8904_VMID_RES_MASK, 1847a91eb199SMark Brown WM8904_VMID_ENA | 1848a91eb199SMark Brown 0x3 << WM8904_VMID_RES_SHIFT); 1849a91eb199SMark Brown 1850a91eb199SMark Brown /* Let VMID ramp */ 1851a91eb199SMark Brown msleep(1); 1852a91eb199SMark Brown } 1853a91eb199SMark Brown 1854a91eb199SMark Brown /* Maintain VMID with 2*250k */ 1855a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1856a91eb199SMark Brown WM8904_VMID_RES_MASK, 1857a91eb199SMark Brown 0x2 << WM8904_VMID_RES_SHIFT); 1858a91eb199SMark Brown 1859a91eb199SMark Brown /* Bias current *0.5 */ 1860a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1861a91eb199SMark Brown WM8904_ISEL_MASK, 0); 1862a91eb199SMark Brown break; 1863a91eb199SMark Brown 1864a91eb199SMark Brown case SND_SOC_BIAS_OFF: 1865a91eb199SMark Brown /* Turn off VMID */ 1866a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0, 1867a91eb199SMark Brown WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0); 1868a91eb199SMark Brown 1869a91eb199SMark Brown /* Stop bias generation */ 1870a91eb199SMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 1871a91eb199SMark Brown WM8904_BIAS_ENA, 0); 1872a91eb199SMark Brown 1873c1334218SMark Brown #ifdef CONFIG_REGULATOR 1874c1334218SMark Brown /* Post 2.6.34 we will be able to get a callback when 1875c1334218SMark Brown * the regulators are disabled which we can use but 1876c1334218SMark Brown * for now just assume that the power will be cut if 1877c1334218SMark Brown * the regulator API is in use. 1878c1334218SMark Brown */ 1879c1334218SMark Brown codec->cache_sync = 1; 1880c1334218SMark Brown #endif 1881c1334218SMark Brown 1882a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), 1883a91eb199SMark Brown wm8904->supplies); 1884a91eb199SMark Brown break; 1885a91eb199SMark Brown } 1886ce6120ccSLiam Girdwood codec->dapm.bias_level = level; 1887a91eb199SMark Brown return 0; 1888a91eb199SMark Brown } 1889a91eb199SMark Brown 1890a91eb199SMark Brown #define WM8904_RATES SNDRV_PCM_RATE_8000_96000 1891a91eb199SMark Brown 1892a91eb199SMark Brown #define WM8904_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1893a91eb199SMark Brown SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1894a91eb199SMark Brown 189585e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8904_dai_ops = { 1896a91eb199SMark Brown .set_sysclk = wm8904_set_sysclk, 1897a91eb199SMark Brown .set_fmt = wm8904_set_fmt, 1898a91eb199SMark Brown .set_tdm_slot = wm8904_set_tdm_slot, 1899a91eb199SMark Brown .set_pll = wm8904_set_fll, 1900a91eb199SMark Brown .hw_params = wm8904_hw_params, 1901a91eb199SMark Brown .digital_mute = wm8904_digital_mute, 1902a91eb199SMark Brown }; 1903a91eb199SMark Brown 1904f0fba2adSLiam Girdwood static struct snd_soc_dai_driver wm8904_dai = { 1905f0fba2adSLiam Girdwood .name = "wm8904-hifi", 1906a91eb199SMark Brown .playback = { 1907a91eb199SMark Brown .stream_name = "Playback", 1908a91eb199SMark Brown .channels_min = 2, 1909a91eb199SMark Brown .channels_max = 2, 1910a91eb199SMark Brown .rates = WM8904_RATES, 1911a91eb199SMark Brown .formats = WM8904_FORMATS, 1912a91eb199SMark Brown }, 1913a91eb199SMark Brown .capture = { 1914a91eb199SMark Brown .stream_name = "Capture", 1915a91eb199SMark Brown .channels_min = 2, 1916a91eb199SMark Brown .channels_max = 2, 1917a91eb199SMark Brown .rates = WM8904_RATES, 1918a91eb199SMark Brown .formats = WM8904_FORMATS, 1919a91eb199SMark Brown }, 1920a91eb199SMark Brown .ops = &wm8904_dai_ops, 1921a91eb199SMark Brown .symmetric_rates = 1, 1922a91eb199SMark Brown }; 1923a91eb199SMark Brown 1924a91eb199SMark Brown #ifdef CONFIG_PM 192584b315eeSLars-Peter Clausen static int wm8904_suspend(struct snd_soc_codec *codec) 1926a91eb199SMark Brown { 1927a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_OFF); 1928a91eb199SMark Brown 1929a91eb199SMark Brown return 0; 1930a91eb199SMark Brown } 1931a91eb199SMark Brown 1932f0fba2adSLiam Girdwood static int wm8904_resume(struct snd_soc_codec *codec) 1933a91eb199SMark Brown { 1934a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 1935a91eb199SMark Brown 1936a91eb199SMark Brown return 0; 1937a91eb199SMark Brown } 1938a91eb199SMark Brown #else 1939a91eb199SMark Brown #define wm8904_suspend NULL 1940a91eb199SMark Brown #define wm8904_resume NULL 1941a91eb199SMark Brown #endif 1942a91eb199SMark Brown 1943f0fba2adSLiam Girdwood static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec) 1944a91eb199SMark Brown { 1945f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 1946a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 1947a91eb199SMark Brown struct snd_kcontrol_new control = 1948a91eb199SMark Brown SOC_ENUM_EXT("EQ Mode", 1949a91eb199SMark Brown wm8904->retune_mobile_enum, 1950a91eb199SMark Brown wm8904_get_retune_mobile_enum, 1951a91eb199SMark Brown wm8904_put_retune_mobile_enum); 1952a91eb199SMark Brown int ret, i, j; 1953a91eb199SMark Brown const char **t; 1954a91eb199SMark Brown 1955a91eb199SMark Brown /* We need an array of texts for the enum API but the number 1956a91eb199SMark Brown * of texts is likely to be less than the number of 1957a91eb199SMark Brown * configurations due to the sample rate dependency of the 1958a91eb199SMark Brown * configurations. */ 1959a91eb199SMark Brown wm8904->num_retune_mobile_texts = 0; 1960a91eb199SMark Brown wm8904->retune_mobile_texts = NULL; 1961a91eb199SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 1962a91eb199SMark Brown for (j = 0; j < wm8904->num_retune_mobile_texts; j++) { 1963a91eb199SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 1964a91eb199SMark Brown wm8904->retune_mobile_texts[j]) == 0) 1965a91eb199SMark Brown break; 1966a91eb199SMark Brown } 1967a91eb199SMark Brown 1968a91eb199SMark Brown if (j != wm8904->num_retune_mobile_texts) 1969a91eb199SMark Brown continue; 1970a91eb199SMark Brown 1971a91eb199SMark Brown /* Expand the array... */ 1972a91eb199SMark Brown t = krealloc(wm8904->retune_mobile_texts, 1973a91eb199SMark Brown sizeof(char *) * 1974a91eb199SMark Brown (wm8904->num_retune_mobile_texts + 1), 1975a91eb199SMark Brown GFP_KERNEL); 1976a91eb199SMark Brown if (t == NULL) 1977a91eb199SMark Brown continue; 1978a91eb199SMark Brown 1979a91eb199SMark Brown /* ...store the new entry... */ 1980a91eb199SMark Brown t[wm8904->num_retune_mobile_texts] = 1981a91eb199SMark Brown pdata->retune_mobile_cfgs[i].name; 1982a91eb199SMark Brown 1983a91eb199SMark Brown /* ...and remember the new version. */ 1984a91eb199SMark Brown wm8904->num_retune_mobile_texts++; 1985a91eb199SMark Brown wm8904->retune_mobile_texts = t; 1986a91eb199SMark Brown } 1987a91eb199SMark Brown 1988a91eb199SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 1989a91eb199SMark Brown wm8904->num_retune_mobile_texts); 1990a91eb199SMark Brown 1991a91eb199SMark Brown wm8904->retune_mobile_enum.max = wm8904->num_retune_mobile_texts; 1992a91eb199SMark Brown wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts; 1993a91eb199SMark Brown 1994f0fba2adSLiam Girdwood ret = snd_soc_add_controls(codec, &control, 1); 1995a91eb199SMark Brown if (ret != 0) 1996f0fba2adSLiam Girdwood dev_err(codec->dev, 1997a91eb199SMark Brown "Failed to add ReTune Mobile control: %d\n", ret); 1998a91eb199SMark Brown } 1999a91eb199SMark Brown 2000f0fba2adSLiam Girdwood static void wm8904_handle_pdata(struct snd_soc_codec *codec) 2001a91eb199SMark Brown { 2002f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2003a91eb199SMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2004a91eb199SMark Brown int ret, i; 2005a91eb199SMark Brown 2006a91eb199SMark Brown if (!pdata) { 2007f0fba2adSLiam Girdwood snd_soc_add_controls(codec, wm8904_eq_controls, 2008a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2009a91eb199SMark Brown return; 2010a91eb199SMark Brown } 2011a91eb199SMark Brown 2012a91eb199SMark Brown dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs); 2013a91eb199SMark Brown 2014a91eb199SMark Brown if (pdata->num_drc_cfgs) { 2015a91eb199SMark Brown struct snd_kcontrol_new control = 2016a91eb199SMark Brown SOC_ENUM_EXT("DRC Mode", wm8904->drc_enum, 2017a91eb199SMark Brown wm8904_get_drc_enum, wm8904_put_drc_enum); 2018a91eb199SMark Brown 2019a91eb199SMark Brown /* We need an array of texts for the enum API */ 2020a91eb199SMark Brown wm8904->drc_texts = kmalloc(sizeof(char *) 2021a91eb199SMark Brown * pdata->num_drc_cfgs, GFP_KERNEL); 2022a91eb199SMark Brown if (!wm8904->drc_texts) { 2023f0fba2adSLiam Girdwood dev_err(codec->dev, 2024a91eb199SMark Brown "Failed to allocate %d DRC config texts\n", 2025a91eb199SMark Brown pdata->num_drc_cfgs); 2026a91eb199SMark Brown return; 2027a91eb199SMark Brown } 2028a91eb199SMark Brown 2029a91eb199SMark Brown for (i = 0; i < pdata->num_drc_cfgs; i++) 2030a91eb199SMark Brown wm8904->drc_texts[i] = pdata->drc_cfgs[i].name; 2031a91eb199SMark Brown 2032a91eb199SMark Brown wm8904->drc_enum.max = pdata->num_drc_cfgs; 2033a91eb199SMark Brown wm8904->drc_enum.texts = wm8904->drc_texts; 2034a91eb199SMark Brown 2035f0fba2adSLiam Girdwood ret = snd_soc_add_controls(codec, &control, 1); 2036a91eb199SMark Brown if (ret != 0) 2037f0fba2adSLiam Girdwood dev_err(codec->dev, 2038a91eb199SMark Brown "Failed to add DRC mode control: %d\n", ret); 2039a91eb199SMark Brown 2040a91eb199SMark Brown wm8904_set_drc(codec); 2041a91eb199SMark Brown } 2042a91eb199SMark Brown 2043a91eb199SMark Brown dev_dbg(codec->dev, "%d ReTune Mobile configurations\n", 2044a91eb199SMark Brown pdata->num_retune_mobile_cfgs); 2045a91eb199SMark Brown 2046a91eb199SMark Brown if (pdata->num_retune_mobile_cfgs) 2047f0fba2adSLiam Girdwood wm8904_handle_retune_mobile_pdata(codec); 2048a91eb199SMark Brown else 2049f0fba2adSLiam Girdwood snd_soc_add_controls(codec, wm8904_eq_controls, 2050a91eb199SMark Brown ARRAY_SIZE(wm8904_eq_controls)); 2051a91eb199SMark Brown } 2052a91eb199SMark Brown 2053f0fba2adSLiam Girdwood 2054f0fba2adSLiam Girdwood static int wm8904_probe(struct snd_soc_codec *codec) 2055a91eb199SMark Brown { 2056f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2057cdce4e9bSMark Brown struct wm8904_pdata *pdata = wm8904->pdata; 2058f578a188SLars-Peter Clausen u16 *reg_cache = codec->reg_cache; 2059f0fba2adSLiam Girdwood int ret, i; 2060a91eb199SMark Brown 2061c1334218SMark Brown codec->cache_sync = 1; 2062ce6120ccSLiam Girdwood codec->dapm.idle_bias_off = 1; 2063*84d0d831SMark Brown codec->control_data = wm8904->regmap; 2064a91eb199SMark Brown 20658c126474SMark Brown switch (wm8904->devtype) { 20668c126474SMark Brown case WM8904: 20678c126474SMark Brown break; 20688c126474SMark Brown case WM8912: 20698c126474SMark Brown memset(&wm8904_dai.capture, 0, sizeof(wm8904_dai.capture)); 20708c126474SMark Brown break; 20718c126474SMark Brown default: 20728c126474SMark Brown dev_err(codec->dev, "Unknown device type %d\n", 20738c126474SMark Brown wm8904->devtype); 2074f0fba2adSLiam Girdwood return -EINVAL; 20758c126474SMark Brown } 20768c126474SMark Brown 2077*84d0d831SMark Brown ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); 2078a91eb199SMark Brown if (ret != 0) { 2079a91eb199SMark Brown dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 2080f0fba2adSLiam Girdwood return ret; 2081a91eb199SMark Brown } 2082a91eb199SMark Brown 2083a91eb199SMark Brown for (i = 0; i < ARRAY_SIZE(wm8904->supplies); i++) 2084a91eb199SMark Brown wm8904->supplies[i].supply = wm8904_supply_names[i]; 2085a91eb199SMark Brown 2086a91eb199SMark Brown ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8904->supplies), 2087a91eb199SMark Brown wm8904->supplies); 2088a91eb199SMark Brown if (ret != 0) { 2089a91eb199SMark Brown dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 2090f0fba2adSLiam Girdwood return ret; 2091a91eb199SMark Brown } 2092a91eb199SMark Brown 2093a91eb199SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies), 2094a91eb199SMark Brown wm8904->supplies); 2095a91eb199SMark Brown if (ret != 0) { 2096a91eb199SMark Brown dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 2097a91eb199SMark Brown goto err_get; 2098a91eb199SMark Brown } 2099a91eb199SMark Brown 2100a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_SW_RESET_AND_ID); 2101a91eb199SMark Brown if (ret < 0) { 2102a91eb199SMark Brown dev_err(codec->dev, "Failed to read ID register\n"); 2103a91eb199SMark Brown goto err_enable; 2104a91eb199SMark Brown } 2105*84d0d831SMark Brown if (ret != 0x8904) { 2106a91eb199SMark Brown dev_err(codec->dev, "Device is not a WM8904, ID is %x\n", ret); 2107a91eb199SMark Brown ret = -EINVAL; 2108a91eb199SMark Brown goto err_enable; 2109a91eb199SMark Brown } 2110a91eb199SMark Brown 2111a91eb199SMark Brown ret = snd_soc_read(codec, WM8904_REVISION); 2112a91eb199SMark Brown if (ret < 0) { 2113a91eb199SMark Brown dev_err(codec->dev, "Failed to read device revision: %d\n", 2114a91eb199SMark Brown ret); 2115a91eb199SMark Brown goto err_enable; 2116a91eb199SMark Brown } 2117a91eb199SMark Brown dev_info(codec->dev, "revision %c\n", ret + 'A'); 2118a91eb199SMark Brown 2119a91eb199SMark Brown ret = wm8904_reset(codec); 2120a91eb199SMark Brown if (ret < 0) { 2121a91eb199SMark Brown dev_err(codec->dev, "Failed to issue reset\n"); 2122a91eb199SMark Brown goto err_enable; 2123a91eb199SMark Brown } 2124a91eb199SMark Brown 2125a91eb199SMark Brown /* Change some default settings - latch VU and enable ZC */ 2126a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_LEFT, 2127a1b3b5eeSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2128a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_RIGHT, 2129a1b3b5eeSMark Brown WM8904_ADC_VU, WM8904_ADC_VU); 2130a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_VOLUME_LEFT, 2131a1b3b5eeSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2132a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_VOLUME_RIGHT, 2133a1b3b5eeSMark Brown WM8904_DAC_VU, WM8904_DAC_VU); 2134a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT1_LEFT, 2135a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC, 2136a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTLZC); 2137a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT1_RIGHT, 2138a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC, 2139a1b3b5eeSMark Brown WM8904_HPOUT_VU | WM8904_HPOUTRZC); 2140a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT2_LEFT, 2141a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC, 2142a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTLZC); 2143a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_ANALOGUE_OUT2_RIGHT, 2144a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC, 2145a1b3b5eeSMark Brown WM8904_LINEOUT_VU | WM8904_LINEOUTRZC); 2146a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, 2147a1b3b5eeSMark Brown WM8904_SR_MODE, 0); 2148a91eb199SMark Brown 2149cdce4e9bSMark Brown /* Apply configuration from the platform data. */ 2150cdce4e9bSMark Brown if (wm8904->pdata) { 2151cdce4e9bSMark Brown for (i = 0; i < WM8904_GPIO_REGS; i++) { 2152cdce4e9bSMark Brown if (!pdata->gpio_cfg[i]) 2153cdce4e9bSMark Brown continue; 2154cdce4e9bSMark Brown 2155f578a188SLars-Peter Clausen reg_cache[WM8904_GPIO_CONTROL_1 + i] 2156cdce4e9bSMark Brown = pdata->gpio_cfg[i] & 0xffff; 2157cdce4e9bSMark Brown } 2158fbc2dae8SMark Brown 2159fbc2dae8SMark Brown /* Zero is the default value for these anyway */ 2160fbc2dae8SMark Brown for (i = 0; i < WM8904_MIC_REGS; i++) 2161f578a188SLars-Peter Clausen reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i] 2162fbc2dae8SMark Brown = pdata->mic_cfg[i]; 2163cdce4e9bSMark Brown } 2164cdce4e9bSMark Brown 2165a91eb199SMark Brown /* Set Class W by default - this will be managed by the Class 2166a91eb199SMark Brown * G widget at runtime where bypass paths are available. 2167a91eb199SMark Brown */ 2168a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_CLASS_W_0, 2169a1b3b5eeSMark Brown WM8904_CP_DYN_PWR, WM8904_CP_DYN_PWR); 2170a91eb199SMark Brown 2171a91eb199SMark Brown /* Use normal bias source */ 2172a1b3b5eeSMark Brown snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0, 2173a1b3b5eeSMark Brown WM8904_POBCTRL, 0); 2174a91eb199SMark Brown 2175a91eb199SMark Brown wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 2176a91eb199SMark Brown 2177a91eb199SMark Brown /* Bias level configuration will have done an extra enable */ 2178a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2179a91eb199SMark Brown 2180f0fba2adSLiam Girdwood wm8904_handle_pdata(codec); 2181a91eb199SMark Brown 2182f0fba2adSLiam Girdwood wm8904_add_widgets(codec); 2183a91eb199SMark Brown 2184a91eb199SMark Brown return 0; 2185a91eb199SMark Brown 2186a91eb199SMark Brown err_enable: 2187a91eb199SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2188a91eb199SMark Brown err_get: 2189a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2190a91eb199SMark Brown return ret; 2191a91eb199SMark Brown } 2192a91eb199SMark Brown 2193f0fba2adSLiam Girdwood static int wm8904_remove(struct snd_soc_codec *codec) 2194a91eb199SMark Brown { 2195f0fba2adSLiam Girdwood struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 2196f0fba2adSLiam Girdwood 2197f0fba2adSLiam Girdwood wm8904_set_bias_level(codec, SND_SOC_BIAS_OFF); 2198a91eb199SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); 2199cd70978cSAxel Lin kfree(wm8904->retune_mobile_texts); 2200cd70978cSAxel Lin kfree(wm8904->drc_texts); 2201f0fba2adSLiam Girdwood 2202f0fba2adSLiam Girdwood return 0; 2203a91eb199SMark Brown } 2204a91eb199SMark Brown 2205f0fba2adSLiam Girdwood static struct snd_soc_codec_driver soc_codec_dev_wm8904 = { 2206f0fba2adSLiam Girdwood .probe = wm8904_probe, 2207f0fba2adSLiam Girdwood .remove = wm8904_remove, 2208f0fba2adSLiam Girdwood .suspend = wm8904_suspend, 2209f0fba2adSLiam Girdwood .resume = wm8904_resume, 2210f0fba2adSLiam Girdwood .set_bias_level = wm8904_set_bias_level, 2211*84d0d831SMark Brown }; 2212*84d0d831SMark Brown 2213*84d0d831SMark Brown static const struct regmap_config wm8904_regmap = { 2214*84d0d831SMark Brown .reg_bits = 8, 2215*84d0d831SMark Brown .val_bits = 16, 2216*84d0d831SMark Brown 2217*84d0d831SMark Brown .max_register = WM8904_MAX_REGISTER, 2218*84d0d831SMark Brown .volatile_reg = wm8904_volatile_register, 2219*84d0d831SMark Brown .readable_reg = wm8904_readable_register, 2220*84d0d831SMark Brown 2221*84d0d831SMark Brown .cache_type = REGCACHE_RBTREE, 2222*84d0d831SMark Brown .reg_defaults = wm8904_reg_defaults, 2223*84d0d831SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8904_reg_defaults), 2224f0fba2adSLiam Girdwood }; 2225f0fba2adSLiam Girdwood 2226a91eb199SMark Brown static __devinit int wm8904_i2c_probe(struct i2c_client *i2c, 2227a91eb199SMark Brown const struct i2c_device_id *id) 2228a91eb199SMark Brown { 2229a91eb199SMark Brown struct wm8904_priv *wm8904; 2230f0fba2adSLiam Girdwood int ret; 2231a91eb199SMark Brown 223293e26d4eSMark Brown wm8904 = devm_kzalloc(&i2c->dev, sizeof(struct wm8904_priv), 223393e26d4eSMark Brown GFP_KERNEL); 2234a91eb199SMark Brown if (wm8904 == NULL) 2235a91eb199SMark Brown return -ENOMEM; 2236a91eb199SMark Brown 2237*84d0d831SMark Brown wm8904->regmap = regmap_init_i2c(i2c, &wm8904_regmap); 2238*84d0d831SMark Brown if (IS_ERR(wm8904->regmap)) { 2239*84d0d831SMark Brown ret = PTR_ERR(wm8904->regmap); 2240*84d0d831SMark Brown dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 2241*84d0d831SMark Brown ret); 2242*84d0d831SMark Brown return ret; 2243*84d0d831SMark Brown } 2244*84d0d831SMark Brown 22458c126474SMark Brown wm8904->devtype = id->driver_data; 2246a91eb199SMark Brown i2c_set_clientdata(i2c, wm8904); 2247a91eb199SMark Brown wm8904->pdata = i2c->dev.platform_data; 2248a91eb199SMark Brown 2249f0fba2adSLiam Girdwood ret = snd_soc_register_codec(&i2c->dev, 2250f0fba2adSLiam Girdwood &soc_codec_dev_wm8904, &wm8904_dai, 1); 2251*84d0d831SMark Brown if (ret != 0) 2252*84d0d831SMark Brown goto err; 225393e26d4eSMark Brown 2254*84d0d831SMark Brown return 0; 2255*84d0d831SMark Brown 2256*84d0d831SMark Brown err: 2257*84d0d831SMark Brown regmap_exit(wm8904->regmap); 2258f0fba2adSLiam Girdwood return ret; 2259a91eb199SMark Brown } 2260a91eb199SMark Brown 2261a91eb199SMark Brown static __devexit int wm8904_i2c_remove(struct i2c_client *client) 2262a91eb199SMark Brown { 2263*84d0d831SMark Brown struct wm8904_priv *wm8904 = i2c_get_clientdata(client); 2264f0fba2adSLiam Girdwood snd_soc_unregister_codec(&client->dev); 2265*84d0d831SMark Brown regmap_exit(wm8904->regmap); 2266a91eb199SMark Brown return 0; 2267a91eb199SMark Brown } 2268a91eb199SMark Brown 2269a91eb199SMark Brown static const struct i2c_device_id wm8904_i2c_id[] = { 22708c126474SMark Brown { "wm8904", WM8904 }, 22718c126474SMark Brown { "wm8912", WM8912 }, 2272df1553c8SMark Brown { "wm8918", WM8904 }, /* Actually a subset, updates to follow */ 2273a91eb199SMark Brown { } 2274a91eb199SMark Brown }; 2275a91eb199SMark Brown MODULE_DEVICE_TABLE(i2c, wm8904_i2c_id); 2276a91eb199SMark Brown 2277a91eb199SMark Brown static struct i2c_driver wm8904_i2c_driver = { 2278a91eb199SMark Brown .driver = { 2279091edccfSMark Brown .name = "wm8904", 2280a91eb199SMark Brown .owner = THIS_MODULE, 2281a91eb199SMark Brown }, 2282a91eb199SMark Brown .probe = wm8904_i2c_probe, 2283a91eb199SMark Brown .remove = __devexit_p(wm8904_i2c_remove), 2284a91eb199SMark Brown .id_table = wm8904_i2c_id, 2285a91eb199SMark Brown }; 2286a91eb199SMark Brown 2287a91eb199SMark Brown static int __init wm8904_modinit(void) 2288a91eb199SMark Brown { 2289f0fba2adSLiam Girdwood int ret = 0; 2290a91eb199SMark Brown ret = i2c_add_driver(&wm8904_i2c_driver); 2291a91eb199SMark Brown if (ret != 0) { 2292f0fba2adSLiam Girdwood printk(KERN_ERR "Failed to register wm8904 I2C driver: %d\n", 2293a91eb199SMark Brown ret); 2294a91eb199SMark Brown } 2295f0fba2adSLiam Girdwood return ret; 2296a91eb199SMark Brown } 2297a91eb199SMark Brown module_init(wm8904_modinit); 2298a91eb199SMark Brown 2299a91eb199SMark Brown static void __exit wm8904_exit(void) 2300a91eb199SMark Brown { 2301a91eb199SMark Brown i2c_del_driver(&wm8904_i2c_driver); 2302a91eb199SMark Brown } 2303a91eb199SMark Brown module_exit(wm8904_exit); 2304a91eb199SMark Brown 2305a91eb199SMark Brown MODULE_DESCRIPTION("ASoC WM8904 driver"); 2306a91eb199SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 2307a91eb199SMark Brown MODULE_LICENSE("GPL"); 2308